DATA SHEET
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High-Efficiency Step-Down
DC-DC Converter
1A
WDFN6
CASE 511CP
FAN2001/FAN2002
MARKING DIAGRAM
Description
Designed for use in battery−powered applications, the FAN2001/
FAN2002 is a high−efficiency, low−noise synchronous PWM current
mode and Pulse Skip (Power Save) mode dc−dc converter. It can
provide up to 1 A of output current over a wide input range from 2.5 V
to 5.5 V. The output voltage can be externally adjusted over a wide
range of 0.8 V to 5.5 V by means of an external voltage divider.
At moderate and light loads, pulse skipping modulation is used.
Dynamic voltage positioning is applied, and the output voltage is
shifted 0.8% above nominal value for increased headroom during load
transients. At higher loads the system automatically switches over to
current mode PWM control, operating at 1.3 MHz. A current mode
control loop with fast transient response ensures excellent line and
load regulation. To achieve high efficiency and ensure long battery
life, the quiescent current is reduced to 25 mA in Power Save mode,
and the supply current drops below 1 mA in shut−down mode. The
FAN2001/FAN2002 is available in a 3x3 mm 6−lead MLP package.
FAN2001MPX
Features
FAN2002MPX
•
•
•
•
•
•
•
•
•
•
•
•
•
96% Efficiency, Synchronous Operation
Adjustable Output Voltage Options from 0.8 V to VIN
2.5 V to 5.5 V Input Voltage Range
Up to 1 A Output Current
Fixed Frequency 1.3 MHz PWM Operation
High Efficiency Power Save Mode
100% Duty Cycle Low Dropout Operation
Soft Start
Output Over−Voltage Protection
Dynamic Output Voltage Positioning
25 mA Quiescent Current
Thermal Shutdown and Short Circuit Protection
Pb−Free and Halide Free
$Y&Z&2&K
200x
C
$Y
&Z
&2
&K
200xC
= onsemi Logo
= Assembly Plant Code
= 2−Digit Data Code
= Lot Run Traceability Code
= Specific Device Code
x = 1 or 2
ORDERING INFORMATION
Device
Package
Shipping†
WDFN6
(Pb−Free,
Halide Free)
3000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Applications
•
•
•
•
•
•
•
•
•
Pocket PCs, PDAs
Cell Phones
Battery−Powered Portable Devices
Digital Cameras
Hard Disk Drives
Set−Top−Boxes
Point−of−Load Power
Notebook Computers
Communications Equipment
© Semiconductor Components Industries, LLC, 2005
November, 2021 − Rev. 2
1
Publication Order Number:
FAN2002/D
FAN2001/FAN2002
TYPICAL APPLICATION
VIN
CIN
10 mF
PGND
EN
3.3 mH
1
2
6
P1
(AGND)
3
5
4
NC
R1
R1
5kW
COUT
2 x 10 mF
5 kW
FB
R2
FB
VOUT
1.2 V (1 A)
SW
R2
10 kW
VOUT
1.2 V (1 A)
PGND
L1
SW
3.3 mH
10 kW
1
6
P1
(AGND)
2
3
5
4
EN
VIN
PVIN
10 mF
2 x 10 mF
FAN2002
FAN2001
Figure 1. Typical Application
PIN ASSIGNMENT AND DESCRIPTION
VIN
1
PGND
2
EN
3
P1
(AGND)
6
SW
FB
1
5
NC
PGND
2
4
FB
SW
3
P1
(AGND)
6
EN
5
VIN
4
PVIN
FAN2002
FAN2001
Figure 2. Pin Assignment (Top View)
PIN DESCRIPTION
Pin No.
Pin Name
Description
FAN2001
P1
AGND
Analog Ground. P1 must be soldered to the PCB ground.
1
VIN
2
PGND
3
EN
Enable Input. Logic high enables the chip and logic low disables the chip, reducing the supply
current to less than 1 mA. Do not float this pin.
4
FB
Feedback Input. Adjustable voltage option, connect this pin to the resistor divider.
5
NC
No Connection Pin.
6
SW
Switching Node. This pin is connected to the internal MOSFET switches.
Supply Voltage Input.
Power Ground. This pin is connected to the internal MOSFET switches. This pin must be
externally connected to AGND.
FAN2002
P1
AGND
Analog Ground. P1 must be soldered to the PCB ground.
1
FB
2
PGND
Feedback Input. Adjustable voltage option, connect this pin to the resistor divider.
3
SW
Switching Node. This pin is connected to the internal MOSFET switches.
4
PVIN
Supply Voltage Input. This pin is connected to the internal MOSFET switches.
5
VIN
Supply Voltage Input.
6
EN
Enable Input. Logic high enables the chip and logic low disables the chip, reducing the supply
current to less than 1 mA. Do not float this pin.
Power Ground. This pin is connected to the internal MOSFET switches. This pin must be
externally connected to AGND.
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2
FAN2001/FAN2002
ABSOLUTE MAXIMUM RATINGS (Unless otherwise specified, all other voltages are referenced to AGND.)
Min
Max
Unit
VIN, PVIN
−0.3
7
V
Voltage On Any Other Pin
−0.3
Parameter
VIN
V
Lead Soldering Temperature (10 seconds)
260
_C
Junction Temperature
150
_C
150
_C
8
_C/W
Storage Temperature
−65
Thermal Resistance−Junction to Tab (qJC), 3x3 mm 6−lead MLP (Note 1)
Electrostatic Discharge Protection (ESD) Level (Note 2)
HBM
4
CDM
1
kV
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Junction to ambient thermal resistance, qJA, is a strong function of PCB material, board thickness, thickness and number of copper planes,
number of via used, diameter of via used, available copper surface, and attached heat sink characteristics.
2. Using Mil Std. 883E, method 3015.7(Human Body Model) and EIA/JESD22C101−A (Charge Device Model).
RECOMMENDED OPERATING CONDITIONS (Unless otherwise specified, all other voltages are referenced to AGND.)
Min
Parameter
Typ
Max
Unit
Supply Voltage Range
2.5
5.5
V
Output Voltage Range, Adjustable Version
0.8
VIN
V
1
A
Output Current
Inductor (Note 3)
3.3
mH
Input Capacitor (Note 3)
10
mF
2 x 10
mF
Output Capacitor (Note 3)
Operating Ambient Temperature Range
−40
+85
_C
Operating Junction Temperature Range
−40
+125
_C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
3. Refer to the Applications section for further details.
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3
FAN2001/FAN2002
ELECTRICAL CHARACTERISTICS
(VIN = VOUT + 0.6 V (min. 2.5 V) to 5.5 V, IOUT = 350 mA, VOUT = 1.2 V, EN = VIN, TA = −40_C to +85_C, Unless otherwise noted. Typical
values are at TA = 25_C.)
Symbol
Parameter
VIN
Input Voltage
IQ
Quiescent Current
Test Conditions
Min
0 mA ≤ IOUT ≤ 600 mA
2.5
0 mA ≤ IOUT ≤ 1000 mA
2.7
V
5.5
V
35
mA
R2 = 10 kW
50
mA
R2 = 100 kW
25
mA
VIN Rising
1.9
Hysteresis
Enable Low Input Voltage
5.5
IOUT = 0 mA, Device is
switching (Note 4)
EN = GND
Enable High Input Voltage
Unit
20
Undervoltage Lockout Threshold
VENL
Max
IOUT = 0 mA, Device is not switching
Shutdown Supply Current
VENH
Typ
0.1
1
2.1
2.3
150
mA
V
mV
1.3
V
0.4
V
IEN
EN Input Bias Current
EN = VIN or GND
0.01
0.1
mA
RDS(on)
PMOS On Resistance
VIN = VGS = 5.5 V
250
350
mW
VIN = VGS = 2.5 V
300
400
VIN = VGS = 5.5 V
200
300
VIN = VGS = 2.5 V
250
350
1300
1500
2000
mA
1000
1300
1500
kHz
0.1
1
mA
1
NMOS On Resistance
ILIM
P−channel Current Limit
2.5 V < VIN < 5.5 V
Oscillator Frequency
mW
Ilkg_(N)
N−channel Leakage Current
VDS = 5.5 V
Ilkg_(P)
P−channel Leakage Current
VDS = 5.5 V
0.1
Line Regulation
IOUT ≤ 10 mA
0.16
%/V
Load Regulation
350 mA ≤ IOUT ≤ 1000 mA
0.15
%
0.8
V
Vref
Reference Voltage
Output DC Voltage Accuracy
(Note 5)
0 mA ≤ IOUT ≤ 1000 mA
−3
Over−Temperature Protection
PWM Mode Only
350 mA ≤ IOUT ≤ 1000 mA
Start−Up Time
IOUT = 1000 mA, COUT = 20 mF
Rising Temperature
Hysteresis
+3
mA
%
150
_C
20
_C
800
ms
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Refer to the applications section for further details.
5. For output voltages ≤ 1.2 V a 40 mF output capacitor value is required to achieve a maximum output accuracy of 3% while operating in power
save mode (PFM mode).
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4
FAN2001/FAN2002
TYPICAL PERFORMANCE CHARACTERISTICS
(TA = 25°C, CIN = 10 mF, COUT = 20 mF, L = 3.3 mH, R2 = 10 kW, unless otherwise noted.)
100
95
Efficiency (%)
Efficiency (%)
90
85
VIN = 5 V
VOUT = 3.3 V
80
VIN = 3.6 V
VOUT = 3 V
75
70
VIN = 3.6 V
VOUT = 1.2 V
65
60
1
10
100
1000
100
95
90
85
80
75
70
65
60
55
50
45
40
35
0.1
VIN = 3.9 V
VIN = 5.5 V
VOUT = 3.3 V
R2 = 100 kW
1
10
Figure 3. Efficiency vs. Load Current
1.214
VOUT = 1.2 V
R2 = 100 kW
1.210
80
70
VIN = 5.5 V
VIN = 2.5 V
60
50
VIN = 5 V
1.212
Output Voltage (V)
90
Efficiency (%)
1000
Figure 4. Efficiency vs. Load Current
100
VIN = 3.6 V
1.208
1.206
1.204
1.202
1.200
1.198
1.196
40
1.194
30
0.1
1
10
100
1.192
1000
0
200
400
Figure 5. Efficiency vs. Load Current
80
R2 = 10 kW
50
40
30
R2 = 100 kW
20
10
1380
1360
VIN = 5.5 V
1340
1320
1300
VIN = 3.6 V
1280
1260
1240
VIN = 2.5 V
1220
0
2.5
3.0
1000
1400
Oscillator Frequency (kHz)
60
800
Figure 6. Output Voltage vs. Load Current
VOUT = 1.2 V
70
600
Load Current (mA)
Load Current (mA)
Quiescent Current (mA)
100
Load Current (mA)
Load Current (mA)
3.5
4.0
4.5
5.0
1200
−40
5.5
−20
0
20
40
60
80
Temperature (5C)
Input Voltage (V)
Figure 7. Quiescent Current vs. Input Voltage
Figure 8. Frequency vs. Temperature
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5
100
FAN2001/FAN2002
Inductor
Current
(200 mA/div)
Inductor
Current
(200 mA/div)
Output
Voltage
(5 mV/div)
Output
Voltage
(20 mV/div)
SW Node
Voltage
(2 V/div)
SW Node
Voltage
(2 V/div)
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(TA = 25°C, CIN = 10 mF, COUT = 20 mF, L = 3.3 mH, R2 = 10 kW, unless otherwise noted.)
Time (1 ms/div)
Time (5 ms/div)
100 mA
Figure 10. Power Save Mode
Load
Current
Step
Load
Current
Step
Figure 9. PWM Mode
600 mA
VOUT = 1.2 V
Inductor
Current
(500 mA/div)
Output
Voltage
(50 mV/div)
Output
Voltage
(50 mV/div)
Inductor
Current
(500 mA/div)
VOUT = 1.2 V
Time (10 ms/div)
Time (10 ms/div)
Inductor
Current
(500 mA/div)
Inductor
Current
(200 mA/div)
Voltage at
Enable Pin
(5 V/div)
Figure 12. Load Transient Response
Voltage at
Enable Pin
(5 V/div)
Figure 11. Load Transient Response
VOUT = 1.2 V
IOUT = 10 mA
Output
Voltage
(500 mV/div)
Output
Voltage
(500 mV/div)
100 mA
600 mA
Time (100 ms/div)
VOUT = 1.2 V
IOUT = 1000 mA
Time (200 ms/div)
Figure 14. Start−Up Response
Figure 13. Start−Up Response
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6
FAN2001/FAN2002
BLOCK DIAGRAM
EN
VIN
DIGITAL
SOFT START
IS
REF
FB
ERROR
AMP
CURRENT
SENSE
IS
UNDER−VOLGATE
LOCKOUT
PFM
COMP
MOSFET
DRIVER
LOGIC
CONTROL
COMP
SW
0.8 V
GND
IS
OVER
VOLTAGE
COMP
OSC
SLOPE COMPENSATION
REF
FB
NEG.
LIMIT
SENSE
NEG.
LIMIT
COMP
GND
Figure 15. Block Diagram
DETAILED OPERATION DESCRIPTION
PFM (Power Save) Mode
The FAN2001/FAN2002 is a step−down converter
operating in a current−mode PFM/PWM architecture with a
typical switching frequency of 1.3 MHz. At moderate to
heavy loads, the converter operates in pulse−width−
modulation (PWM) mode. At light loads the converter
enters a power−save mode (PFM pulse skipping) to keep the
efficiency high.
As the load current decreases and the inductor current
reaches negative value, the converter enters
pulse−frequency−modulation (PFM) mode. The transition
point for the PFM mode is given by the equation:
1*
I OUT + V OUT
PWM Mode
2
ǒ Ǔ
V OUT
V IN
L
f
(eq. 1)
The typical output current when the device enters PFM
mode is 150 mA for input voltage of 3.6 V and output
voltage of 1.2 V. In minimum. Consequently, the high
efficiency is maintained at light loads. As soon as the output
voltage falls below a threshold, set at 0.8% above the
nominal value, the P−channel transistor is turned on and the
inductor current ramps up. The P−channel switch turns off
and the N−channel turns on as the peak inductor current is
reached (typical 450 mA).
The N−channel transistor is turned off before the inductor
current becomes negative. At this time the P−channel is
switched on again starting the next pulse. The converter
In PWM mode, the device operates at a fixed frequency of
1.3 MHz. At the beginning of each clock cycle, the
P−channel transistor is turned on. The inductor current
ramps up and is monitored via an internal circuit. The
P−channel switch is turned off when the sensed current
causes the PWM comparator to trip when the output voltage
is in regulation or when the inductor current reaches the
current limit (set internally to typically 1500 mA). After
a minimum dead time the N−channel transistor is turned on
and the inductor current ramps down. As the clock cycle is
completed, the N−channel switch is turned off and the next
clock cycle starts.
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FAN2001/FAN2002
UVLO and Soft Start
continues these pulses until the high threshold (typical 1.6%
above nominal value) is reached. A higher output voltage in
PFM mode gives additional headroom for the voltage drop
during a load transient from light to full load. The voltage
overshoot during this load transient is also minimized due to
active regulation during turn on of the N−channel rectifier
switch. The device stays in sleep mode until the output
voltage falls below the low threshold. The FAN2001/
FAN2002 enters the PWM mode as soon as the output
voltage can no longer be regulated in PFM with constant
peak current.
The reference and the circuit remain reset until the VIN
crosses its UVLO threshold.
The FAN2001/FAN2002 has an internal soft−start circuit
that limits the in−rush current during start−up. This prevents
possible voltage drops of the input voltage and eliminates
the output voltage overshoot. The soft−start is implemented
as a digital circuit increasing the switch current in four steps
to the P−channel current limit (1500 mA). Typical start−up
time for a 20 mF output capacitor and a load current of
1000 mA is 800 ms.
100% Duty Cycle Operation
Short Circuit Protection
The switch peak current is limited cycle−by−cycle to
a typical value of 1500 mA. In the event of an output voltage
short circuit, the device operates with a frequency of
400 kHz and minimum duty cycle, therefore the average
input current is typically 200 mA.
As the input voltage approaches the output voltage and the
duty cycle exceeds the typical 95%, the converter turns the
P−channel transistor continuously on. In this mode the
output voltage is equal to the input voltage minus the voltage
drop across the P−channel transistor:
V OUT + V IN * I LOAD
(eq. 2)
(R DS(on) ) R L)
Thermal Shutdown
When the die temperature exceeds 150°C, a reset occurs
and will remain in effect until the die cools to 130°C, at that
time the circuit will be allowed to restart.
where:
RDS(on) = P−channel Switch ON Resistance
ILOAD = Output Current
= Inductor DC Resistance
RL
APPLICATIONS INFORMATION
Setting the Output Voltage
Inductor Selection
The internal reference is 0.8 V (Typical). The output
voltage is divided by a resistor divider, R1 and R2 to the FB
pin. The output voltage is given by:
The inductor parameters directly related to the device’s
performances are saturation current and dc resistance. The
FAN2001/FAN2002 operates with a typical inductor value
of 3.3 mH. The lower the dc resistance, the higher the
efficiency. For saturation current, the inductor should be
rated higher than the maximum load current plus half of the
inductor ripple current.
This is calculated as follows:
ǒ
V OUT + V REF
1)
R1
R2
Ǔ
(eq. 3)
where:
R1 + R2 < 800 kW
1*
According to this equation, and assuming desired output
voltage of 1.5096 V, and given R2 = 10 kW, the calculated
value of R1 is 8.87 kW. If quiescent current is a key design
parameter a higher value feedback resistor can be used (e.g.
R2 = 100 kW) and a small bypass capacitor of 10 pF is
required in parallel with the upper resistor as shown in
Figure 16.
VIN
CIN
10 mF
PGND
EN
3.3 mH
1
2
3
6
P1
(AGND)
5
4
R1
5 kW
FB
L
V OUT
V IN
(eq. 4)
f
where:
= Inductor Ripple Current
DIL
f
= Switching Frequency
L
= Inductor Value
Some recommended inductors are suggested in the table
below:
VOUT
1.2 V (1 A)
SW
NC
DI L + V OUT
ǒ Ǔ
COUT
2 x 10 mF
Table 1. RECOMMENDED INDUCTORS
Inductor Value
Vendor
3.3 mH
Panasonic
ELL6PM3R3N
3.3 mH
Murata
LQS66C3R3M04
R2
10 kW
Figure 16. Setting the Output Voltage
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8
Part Number
FAN2001/FAN2002
Capacitors Selection
For best performances, a low ESR input capacitor is
required. A ceramic capacitor of at least 10 mF, placed as
close to the VIN and AGND pins of the device is
recommended. The output capacitor determines the output
ripple and the transient response.
Table 2. RECOMMENDED CAPACITORS
Capacitor Value
Vendor
Part Number
10 mF
Taiyo Yuden
JMK212BJ106MG
TDK
C2012X5ROJ106K
JMK316BJ106KL
C3216X5ROJ106M
Murata
Figure 18. Recommended PCB Layout (FAN2002)
GRM32ER61C106K
Therefore, use wide traces for high current paths and place
the input capacitor, the inductor, and the output capacitor as
close as possible to the integrated circuit terminals. In order
to minimize voltage stress to the device resulting from ever
present switching spikes, use an input bypass capacitor with
low ESR. Note that the peak amplitude of the switching
spikes depends upon the load current; the higher the load
current, the higher the switching spikes. The resistor divider
that sets the output voltage should be routed away from the
inductor to avoid RF coupling. The ground plane at the
bottom side of the PCB acts as an electromagnetic shield to
reduce EMI.
For more board layout recommendations download the
application note “PCB Grounding System and
FAN2001/FAN2011
High
Performance
DC−DC
Converters” (AN−42036/D).
PCB Layout Recommendations
The recommended PCB layout is shown in Figures 17 and
18. The inherently high peak currents and switching
frequency of power supplies require a careful PCB layout
design.
Figure 17. Recommended PCB Layout (FAN2001)
FAIRCHILD SEMICONDUCTOR is a registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries
in the United States and/or other countries.
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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
WDFN6 3x3, 0.95P
CASE 511CP
ISSUE O
DOCUMENT NUMBER:
DESCRIPTION:
98AON13603G
WDFN6 3X3, 0.95P
DATE 31 JUL 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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