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FAN5702UC15X

FAN5702UC15X

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    UFBGA16

  • 描述:

    LED DRIVER WITH I2C INTERFACE

  • 数据手册
  • 价格&库存
FAN5702UC15X 数据手册
DATA SHEET www.onsemi.com Configurable 180 mA 6-LED Driver with I2C Control FAN5702 WLCSP16 1.61 x 1.61 x 0.586 CASE 567SB Description The FAN5702 is a highly integrated and configurable charge−pump− based multi−LED driver. The device can drive up to six LEDs in parallel with a total output current of 180 mA. Regulated internal current sinks deliver excellent current and brightness matching to all LEDs. The FAN5702 has an I 2 C interface that allows the user to independently control the brightness with a default grouping of 2,1,1,1,1 for a maximum of five independent lighting channels. The LED driver can be programmed in a multitude of configurations to address broad lighting requirements for different platforms. Each LED can be configured through I2C as five independent channels (Group A has two LEDs by default) or any additional LEDs can join Group A to increase the backlighting needs as the display size increases. The device offers a second dimming control using the EN/PWM pin. Applying a PWM dimming signal to this pin allows control of the dimming of Group A LEDs so that the average current is the linear value multiplied by the PWM dimming duty−cycle. The device provides excellent efficiency, without an inductor, by operating the charge pump in 1.5x or pass−through mode. The FAN5702 can be ordered with default ISET values of 30 mA, 20 mA, 15 mA, or 8 mA. The default ISET is always determined by the ISET ordered (see Ordering Information). Features • • • • • • • • • • • • • MARKING DIAGRAM Six (6) Parallel LEDs (up to 30 mA Each) Total Package Load Current Capability: 180 mA Group from 2 to 6 LEDs for Flexible Backlighting I2C Interface for Easy Programming >600:1 Dimming Ratio for 100 Hz PWM Frequency Logarithmically Controlled Dimming with 64 Steps Secondary Brightness Control Using PWM Dimming up to 20 kHz in Conjunction with I2C Dimming − Dynamic Backlight Control (DBC) to Reduce Current Consumption Up to 92% Efficiency Built−in 1.5x Charge Pump with Low Drop−Out Bypass Switch and Automatic Switching to 1x Mode 1.2 MHz Switching Frequency for Small−Sized Capacitors 16−Bump 1.6 mm x 1.6 mm WLCSP (0.6 mm Height) 16−Lead 3.0 mm x 3.0 mm UQFN (0.55 mm Height) These are Pb−Free and Halide Free Devices Y2 K &. &2 Z Y2&K &.&2&Z = Device Marking = Lot Code = Pin One Dot = 2 Digit Date Code = Assembly Plant Code MARKING DIAGRAM 1 UQFN16 3 x 3, 0.5P CASE 523BB $Y &Z &2 K 5702C xx xx $Y&Z&2&K 5702 C xx = onsemi Logo = Assembly Plant Code = Numeric Date Code = Lot Code = Specific Device Code = 30, 20, 15, 08 ORDERING INFORMATION See detailed ordering and shipping information on page 15 of this data sheet. Applications • LCD Backlighting • Mobile Handsets / Smartphones • Portable Media Players © Semiconductor Components Industries, LLC, 2010 August, 2021 − Rev. 2 1 Publication Order Number: FAN5702/D FAN5702 Typical Application VOUT C1+ 1 mF CHARGE PUMP C2– D2A GND EN / PWM SDA LOGIC AND CONTROL SCL CURRENT SINKS VIN 1 mF D1A GROUP A expandable to 6 LEDs C2+ 1 mF COUT 1 mF C1– D3 D4 D5 D6 Figure 1. Typical Application WLCSP Pin Configuration A1 A2 A3 A4 A4 A3 A2 A1 B1 B2 B3 B4 B4 B3 B2 B1 C1 C2 C3 C4 C4 C3 C2 C1 D1 D2 D3 D4 D4 D3 D2 D1 Bumps Facing Up Bumps Facing Down Figure 2. WLCSP−16, 0.4 mm Pitch, 1.61 x 1.61 mm PIN DEFINITIONS Pin # Name Description D2 VIN Input Supply Voltage. Connect to 2.7 – 5.5 VDC input power source. B4 GND Ground D1 VOUT Charge Pump Output Voltage. Connect to LED anodes. D3, D4 C1+, C1− Charge pump flying capacitor #1 C3, C4 C2+, C2− Charge pump flying capacitor #2 A1, A2 B1, B2 C1, C2 D2A, D1A D4, D3 D6, D5 LED Outputs A4 EN / PWM Enable / PWM dimming input. By default, this pin acts as a simple enable / disable function. When this pin is HIGH, normal operation is enabled. When LOW, the IC is reset and all functions (including I2C communications) are disabled. By setting General Purpose register bit 7 = 1, the pin functions as a PWM dimming input for Group A. To restore the Enable function, the General Purpose register bit 7 must be set LOW. B3 SDA I2C interface serial data A3 SCL I2C interface serial clock www.onsemi.com 2 FAN5702 UQFN Pin Configuration 5 8 9 4 12 1 16 13 Bottom View Figure 3. UQFN−16, 0.5 mm Pitch, 3 mm x 3 mm PIN DEFINITIONS Pin # Name 11 VIN Input Supply Voltage. Connect to 2.7 – 5.5 VDC input power source. Description 6 GND Ground 12 VOUT Charge Pump Output Voltage. Connect to LED anodes. 10, 9 C1+, C1− Charge pump flying capacitor #1 8, 7 C2+, C2− Charge pump flying capacitor #2 1, 2 15, 16 13, 14 D2A, D1A D4, D3 D6, D5 LED Outputs 4 EN / PWM Enable / PWM dimming input. By default, this pin acts as a simple enable / disable function. When this pin is HIGH, normal operation is enabled. When LOW, the IC is reset and all functions (including I2C communications) are disabled. By setting General Purpose register bit 7 = 1, the pin functions as a PWM dimming input for Group A. To restore the Enable function, the General Purpose register bit 7 must be set LOW. 5 SDA I2C interface serial data 3 SCL I2C interface serial clock www.onsemi.com 3 FAN5702 ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter VIN, VOUT Pins Other Pins (Note 1) ESD Min Max Unit −0.3 6.0 V −0.3 Electrostatic Discharge Protection Level VIN + 0.3 Human Body Model per JESD22−A114 3.0 Charged Device Model per JESD22−C101 2.0 V kV TJ Junction Temperature −40 +150 °C TSTG Storage Temperature −65 +150 °C +260 °C TL Lead Soldering Temperature, 10 Seconds Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Lesser of VIN + 0.3 V or 6.0 V. RECOMMENDED OPERATING CONDITIONS Symbol Min Max Unit Supply Voltage 2.7 5.5 V VLED LED Forward Voltage 2.0 4.0 V TA Ambient Temperature −40 +85 °C TJ Junction Temperature −40 +125 °C VIN Parameter Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. THERMAL PROPERTIES Symbol θJA Parameter Junction−to−Ambient Thermal Resistance (Note 2) Min Typ Max Unit WLCSP − 80 − °C/W UQFN − 49 − 2. Junction−to−ambient thermal resistance is a function of application and board layout. This data is measured with four−layer 2s2p boards in accordance to JESD51−7 JEDEC standard. Special attention must be paid not to exceed junction temperature TJ(max) at a given ambient temperate TA. www.onsemi.com 4 FAN5702 ELECTRICAL CHARACTERISTICS Unless otherwise specified: VIN = 2.7 V to 5.5 V; TA = −40°C to +85°C; and ENA, EN3, EN4, EN5, and EN6 = 1. Typical values are VIN = 3.6 V, TA = 25°C, ILED = 20 mA, and LED cathode terminals = 0.4 V. Circuit and components are according to Figure 1. Parameter Min Typ Max Unit 1.5x Mode, No LEDs − 4.4 − mA 1x Mode, No LEDs − 0.3 − Shutdown Supply Current EN = 0, VIN = 4.5 V, TA = −40°C to +85°C − 0.1 2.0 mA VUVLO Under−Voltage Lockout Threshold VIN Rising − 2.55 2.70 V VIN Falling 2.20 2.40 − VUVHYST Under−Voltage Lockout Hysteresis − 150 − mV TLIMIT Thermal Shutdown − 150 − °C THYST Thermal Shutdown Hysteresis − 20 − °C −10% ISET +10% mA Symbol Test Condition POWER SUPPLIES AND THERMAL PROTECTION IQ ISD Quiescent Supply Current LED CURRENT SINKS Absolute Current Accuracy VCATHODE = 0.4 V; see option for ISET Maximum Diode Current (Note 3) ILED = ISET − 30 − mA LED Current Matching (Note 4) VCATHODE = 0.4 V, ILED = ISET − 0.4 3.0 % VDTH 1x to 1.5x Gain Transition Threshold LED Cathode Voltage Falling − 100 − mV VHR Current Sink Headroom (Note 5) ILED = 90% ILED(NOMINAL) − 65 − mV − − 20 kHz 0.15 − 100.00 % 1.5x Mode − 2.4 − W 1x Mode − 0.9 − 0.9 1.2 1.5 MHz − 250 − ms ILED ILED(MAX) ILED_MATCH PWM DIMMING fPWM PWM Switching Frequency tON_LED(MINIMUM) = 15 ms DPWM PWM Duty−Cycle fPWM = 100 Hz CHARGE PUMP ROUT fSW tSTART Output Resistance Switching Frequency Startup Time VOUT = 90% of VIN LOGIC INPUTS (EN, SDA, SCL) VIH HIGH−Level Input Voltage 1.2 − − V VIL LOW−Level Input Voltage − − 0.4 V Maximum Input Voltage − 1.8 5.5 V − 0.01 1.00 mA VIMAX IIN Input Bias Current Input Tied to GND or VIN Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 3. The maximum total output current for the IC should be limited to 180 mA. The total output current can be split between the two groups (IDxA = IDxB = 30 mA maximum). Under maximum output current conditions, special attention must be given to input voltage and LED forward voltage to ensure proper current regulation. See the Maximum Output Current section of the datasheet for more information. 4. For the two groups of current sinks on a part (group A and group B), the following are determined: the maximum sink current in the group (MAX), the minimum sink current in the group (MIN), and the average sink current of the group (AVG). For each group, two matching numbers are calculated: (MAX−AVG)/AVG and (AVG−MIN)/AVG. The largest number of the two (worst case) is considered the matching value for the group. The matching value for a given part is considered to be the highest matching value of the two groups. The typical specification provided is the most likely norm of the matching value for all parts. 5. For each Dxx pin, headroom voltage is the voltage across the internal current sink connected to that pin. VHRx = VOUT − VLED. If headroom voltage requirement is not met, LED current regulation is compromised. www.onsemi.com 5 FAN5702 Typical Characteristics VIN = 3.6 V, TA = 25°C, ILED = 20 mA, and LED cathode terminals = 0.4 V. Figure 5. LED Current Match for All 6 LED Channels at ILED = 20 mA Figure 4. Efficiency with LED Current of 8 mA and 20 mA Figure 6. LED Current Variations vs. Temperature Figure 7. Shutdown Current vs. Input Voltage Figure 8. Switching Frequency Over−Temperature with LED Current at 20 mA www.onsemi.com 6 FAN5702 Typical Characteristics (continued) VIN = 3.6 V, TA = 25°C, ILED = 20 mA, and LED cathode terminals = 0.4 V. Figure 10. Mode Transition from 1.5x to 1x Mode Using PWM Control (VCATHODE Ramp Down) at 2% Duty Cycle Figure 9. Mode Transition from 1x to 1.5x Mode Using PWM Control (VCATHODE Ramp Up) at 2% Duty Cycle Figure 11. Line Transient Response in 1x Mode, VIN = 3.6 V − 4.2 V, ILEDx = 20 mA Figure 12. Line Transient Response in 1.5x Mode, VIN = 2.7 V − 3.3 V, ILED = 20 mA Figure 13. Line Transient from 1x to 1.5x Mode, VIN = 3.2 V − 4.1 V, ILEDx = 20 mA Figure 14. Soft−Start with SDA and SCL www.onsemi.com 7 FAN5702 Typical Characteristics (continued) VIN = 3.6 V, TA = 25°C, ILED = 20 mA, and LED cathode terminals = 0.4 V. Figure 15. Linear Dimming Via I2C Interface, VIN = 3.6 V, ILEDx = 20 mA, and tRAMP = 6.4 ms Figure 16. PWM Dimming, VIN = 3.6 V, ILEDx = 20 mA, and EN = 1 kHz with 20% Duty Cycle Figure 17. PWM and Linear (Via I2C) Dimming, VIN = 3.6 V, ILEDx = 20 mA, and EN = 1 kHz with 20% Duty Cycle www.onsemi.com 8 FAN5702 I2C TIMING SPECIFICATIONS Symbol Parameter fSCL Min Typ Max Unit Standard Mode Conditions − − 100 kHz Fast Mode − − 400 Bus−Free Time between STOP and START Conditions Standard Mode − 4.7 − Fast Mode − 1.3 − START or Repeated START Hold Time Standard Mode − 4 − ms Fast Mode − 600 − ns Standard Mode − 4.7 − ms Fast Mode − 1.3 − ns Standard Mode − 4 − ms Fast Mode − 600 − ns Standard Mode − 4.7 − ms Fast Mode − 600 − ns Standard Mode − 250 − ns Fast Mode − 100 − ns Standard Mode 0 − 3.45 ms Fast Mode 0 − 900.00 ns SCL Clock Frequency tBUF tHD;STA tLOW SCL LOW Period tHIGH SCL HIGH Period tSU;STA Repeated START Setup Time tSU;DAT Data Setup Time tHD;DAT Data Hold Time tRCL SCL Rise Time tFCL SCL Fall Time tRDA SDA Rise Time (Note 6) tFDA SDA Fall Time tSU;STO Stop Condition Setup Time CB ms Standard Mode 20 + 0.1 CB 1000 ns Fast Mode 20 + 0.1 CB 300 ns Standard Mode 20 + 0.1 CB 300 ns Fast Mode 20 + 0.1 CB 300 ns Standard Mode 20 + 0.1 CB 1000 ns Fast Mode 20 + 0.1 CB 300 ns Standard Mode 20 + 0.1 CB 300 ns Fast Mode 20 + 0.1 CB 300 ns Standard Mode − 4 − ms Fast Mode − 600 − ns − − 400 pF Capacitive Load for SDA and SCL 6. Rise time of SCL after a repeated START condition and after an ACK bit. Timing Diagram tF tSU; STA tBUF SDA tR SCL tHD; STA tLOW TSU; DAT tHD; STO tHIGH tHD; STA REPEATED START START Figure 18. I2C Interface Timing for Fast and Slow Modes www.onsemi.com 9 STOP START FAN5702 Circuit Description The FAN5702 is a white LED driver system based on an adaptive 1.5x charge pump capable of supplying up to 180 mA of total output current. The tightly matched current sinks ensure uniform brightness between the LEDs. Each LED has a common anode configuration with its peak drive current set during manufacturing (see Ordering Information and ISET). An I2C−compatible interface is used to vary the brightness within the individual current sinks as well as configure the grouping. Each LED is controlled with 64 exponentially spaced analog brightness control levels through I2C, as indicated in Table 1. For maximum flexibility, the FAN5702 can be programmed with five independently controlled LED banks; by default, arranged as 2,1,1,1,1 (first two LEDs represent Group A). Through I2C, the device can be reconfigured to add up to six LEDs to Group A as needed by application requirements. When the EN pin HIGH, I2C interface is enabled. The LEDs can be turned on/off by writing to the General Purpose register. The user can always communicate via I2C with the device to change register settings regardless of whether any LED is on or off. PWM Dimming By programming the General Purpose register bit 7 = 1, the EN pin is reappropriated to a PWM dimming input. Applying a PWM signal to this pin controls the LED current waveform to be ON when the PWM dimming pin is HIGH and OFF when the PWM dimming pin is LOW. By using this pin in conjunction with the I2C register dimming, the part can achieve higher dimming resolution. For instance, an 8−bit PWM dimming signal applied along with the 6−bit register dimming yields better than 14 bits of resolution. To change the PWM dimming pin back to the EN function, set the General Purpose register bit 7 to 0. Charge Pump The charge pump operates in either 1x mode, where VOUT is connected to VIN through a bypass switch, or in 1.5x mode. The circuit operates in 1x mode until the LED with the highest forward voltage (VLED(MAX)) can no longer maintain current regulation. At that point, 1.5x Mode begins. If the lowest active cathode voltage is greater than 1.8 V, the charge pump switches back to 1x Mode. Register Controlled Brightness The DC value of the LED current is modulated according to the values in Table 1. Current is expressed as a percentage of the full scale current and is illustrated with a 20 mA ISET. IC Enable By default the General Purpose register bit 7 = 0, the EN pin functions as enable/disable. When the EN pin is LOW, all circuit functions, including I2C, are disabled and the registers are set to their default values. www.onsemi.com 10 FAN5702 Table 1. BRIGHTNESS CONTROL Table 1. BRIGHTNESS CONTROL (continued) Dimming Code (Bx5 − Bx0) Current Level ILED (mA) (ISET = 20 mA) Dimming Code (Bx5 − Bx0) Current Level ILED (mA) (ISET = 20 mA) 000000 0.125% 0.025 100000 5.314% 1.063 000001 0.188% 0.038 100001 5.936% 1.188 000010 0.249% 0.050 100010 6.565% 1.313 000011 0.312% 0.063 100011 7.313% 1.463 000100 0.374% 0.075 100100 8.059% 1.613 000101 0.438% 0.088 100101 8.938% 1.788 000110 0.499% 0.100 100110 9.876% 1.975 000111 0.560% 0.113 100111 10.874% 2.175 001000 0.622% 0.125 101000 12.005% 2.400 001001 0.692% 0.138 101001 13.253% 2.650 001010 0.750% 0.150 101010 14.618% 2.925 001011 0.810% 0.163 101011 16.124% 3.225 001100 0.875% 0.175 101100 17.881% 3.575 001101 0.938% 0.188 101101 19.875% 3.975 001110 1.004% 0.200 101110 22.121% 4.425 001111 1.124% 0.225 101111 24.621% 4.925 010000 1.250% 0.250 110000 27.376% 5.475 010001 1.375% 0.275 110001 30.373% 6.075 010010 1.499% 0.300 110010 33.623% 6.725 010011 1.625% 0.325 110011 37.124% 7.425 010100 1.750% 0.350 110100 40.873% 8.175 010101 1.881% 0.375 110101 44.875% 8.975 010110 2.063% 0.413 110110 49.124% 9.825 010111 2.249% 0.450 110111 53.624% 10.725 011000 2.438% 0.488 111000 58.375% 11.675 011001 2.687% 0.538 111001 63.378% 12.675 011010 2.939% 0.588 111010 68.625% 13.725 011011 3.186% 0.638 111011 74.122% 14.825 011100 3.562% 0.713 111100 79.874% 15.975 011101 3.936% 0.788 111101 85.873% 17.175 011110 4.310% 0.863 111110 92.373% 18.475 011111 4.813% 0.963 111111 100.000% 20.000 www.onsemi.com 11 FAN5702 Brightness Ramp Control Register Addressing When changing the group A brightness, the IC steps through the brightness table at rate programmed by the RAMP register, indicated in Table 2. The FAN5702 has six user−accessible registers. Table 4. I2C REGISTER ADDRESS Default Value Table 2. GROUP A BBRIGHTNESS RAMP CONTROL RAMP [1:0] Time per Step Full−Scale Ramp Time 00 0.1 ms 6.4 ms 01 25 ms 1600 ms 10 50 ms 3200 ms 11 100 ms 6400 ms VOUT Short−Circuit Protection The FAN5702 has integrated protection circuitry to prevent the device from being short circuited when the output voltage falls below 2 V. If this occurs, FAN5702 turns off the charge pump and the LED driver outputs, but a small bypass switch is left on. The device monitors the output voltage to determine if it is still in short circuit condition and, once it has passed, soft−starts and returns to normal operation. Address 7 6 5 4 3 2 1 0 HEX GENERAL 0 0 0 0 0 0 0 0 10 CONFIG 0 0 0 0 0 0 0 0 20 CHA 1 1 1 1 1 1 1 1 A0 CH3 1 1 1 1 1 1 1 1 30 CH4 1 1 1 1 1 1 1 1 40 CH5 1 1 1 1 1 1 1 1 50 CH6 1 1 1 1 1 1 1 1 60 7. Bold identifies bits that cannot be overwritten. Bus Timing As shown in Figure 19 data is normally transferred when SCL is LOW. Data is clocked in to the FAN5702 on the rising edge of SCL. Typically, data transitions shortly at or after the falling edge of SCL to allow ample time for the data to set up before the next SCL rising edge. VOUT Over−Voltage Protection If the output voltage goes above 6 V, the FAN5702 shuts down until this condition has passed. The charge pump and LED driver outputs are turned off. Once this condition has passed, the FAN5702 soft−starts into normal operation. Data change allowed SDA TH I2C Interface The FAN5702’s serial interface is compatible with standard and fast I2C bus specifications. The FAN5702’s SCL line is an input and its SDA line is a bi−directional open−drain output, meaning that it can only pull down the bus when active. The SDA line only pulls LOW during data reads and when signaling ACK. All data is shifted in MSB (bit 7) first. TSU SCL Figure 19. Data Transfer Timing Each bus transaction begins and ends with SDA and SCL HIGH. A transaction begins with a START condition, which is defined as SDA transitioning from 1 to 0 with SCL HIGH, as shown in Figure 20. Slave Address The FAN5702’s slave address is 6CH. SDA THD; STA Slave Address MS Bit Table 3. I2C SLAVE ADDRESS 7 6 5 4 3 2 1 0 0 1 1 0 1 1 0 R/W SCL Figure 20. Start Bit www.onsemi.com 12 FAN5702 A transaction ends with a STOP condition, which is defined as SDA transitioning from 0 to 1 with SCL HIGH, as shown in Figure 21. During a read from the FAN5702 (Figure 24, the master issues a “Repeated Start” after sending the register address and before resending the slave address. The “Repeated Start” is a 1−to−0 transition on SDA while SCL is HIGH, as shown in Figure 22. Slave Releases Master Drives tHD; STO ACK(0) or NACK(1) SDA tSU; STA tHD; STA Slave Releases ACK(0) or NACK(1) SDA SCL SLADDR MS Bit SCL Figure 21. Stop Bit Figure 22. Repeated Start Timing Read and White Transaction The following figures outline the sequences for data read and write. Bus control is signified by the shading of the packet, defined as Master Drives Bus and Slave Drives Bus . All addresses and data are MSB first. Table 5. I2C BIT DEFINITIONS FOR FIGURE 23 AND FIGURE 24 Symbol Definition S START. See Figure 20 A ACK. The slave drives SDA to 0 to acknowledge the preceding packet. A NACK. The slave sends a 1 to NACK the preceding packet. R Repeated START. See Figure 22 P STOP. See Figure 21 7 bits S Slave Address 0 0 8 bits 0 8 bits 0 A Reg Addr A Data A P Figure 23. Write Transaction 7 bits S Slave Address 0 0 8 bits 0 A Reg Addr A 7 bits R Slave Address Figure 24. Read Transaction www.onsemi.com 13 1 0 8 bits 1 A Data A P FAN5702 REGISTER DESCRIPTIONS The following tables define the operation of each register bit. Bold values are power−up defaults. These values apply only to I2C version of the part. Name Bit GENERAL Default Value Default: 00H Description General Purpose Register ADDR = 10 H 7 PWM 0 Setting this bit = 1 changes the EN pin to function as a PWM dimming input for group A LEDs. This bit must be set to zero for the chip to be disabled. 6, 5 FS1, FS2 00 00 = 20 mA (default), 01 = 30 mA, 10 = 15 mA, 11 = 8 mA when I2C is used. 4 EN6 0 Default = 0 (Off), LED Channel Active = 1 3 EN5 0 Default = 0 (Off), LED Channel Active = 1 2 EN4 0 Default = 0 (Off), LED Channel Active = 1 1 EN3 0 Default = 0 (Off), LED Channel Active = 1 0 ENA 0 Default = 0 (Off), LED Channel Active = 1 CONFIG Default: 00H Configuration Register ADDR = 20 H 7 T56 0 Tie channel 5 and 6 together. Default = 0 (Separate). Group 5 & 6 = 1. Both currents are set by CH5 register. T56 is overwritten by either S5A or S6A. 6 T34 0 Tie channel 3 and 4 together. Default = 0 (Separate). Group 3 & 4 = 1. Both currents are set by the CH3 register. T34 is overwritten by either S3A or S4A. 5 S6A 0 CH6 group configuration. Independent = 0 (default); part of group A = 1. 4 S5A 0 CH5 group configuration. Independent = 0 (default); part of group A = 1. 3 S4A 0 CH4 group configuration. Independent = 0 (default); part of group A = 1. 2 S3A 0 CH3 group configuration. Independent = 0 (default); part of group A = 1. 1, 0 RS1, RS0 00 Sets current ramp rate for group A channels Vendor ID bits. These bits can be used to distinguish between vendors via I2C. Writing to these bits does not change their value. CHA Default: FFH Group A Brightness Control 7:6 Reserved 11 5:0 Brightness A 0 − 63 00 − 3FH CH3 Default: Reserved 11 5:0 Brightness 3 0 − 63 00 − 3FH Default: FFH Reserved 11 5:0 Brightness 4 0 − 63 00 − 3FH Default: FFH 6−bit value that controls channel 3 brightness per values in Table 1 ADDR = 40 H Writing to these bits does not change their value. 6−bit value that controls channel 3 brightness per values in Table 1 Channel 5 Brightness Control 7:6 Reserved 11 5:0 Brightness 5 0 − 63 00 − 3FH CH6 ADDR = 30 H Writing to these bits does not change their value. Channel 4 Brightness Control 7:6 CH5 6−bit value that controls group A brightness per values in Table 1 Channel 3 Brightness Control 7:6 CH4 ADDR = A0H Default: FFH ADDR = 50 H Writing to these bits does not change their value. 6−bit value that controls channel 3 brightness per values in Table 1 Channel 6 Brightness Control 7:6 Reserved 11 5:0 Brightness 6 0 − 63 00 − 3FH ADDR = 60 H Writing to these bits does not change their value. 6−bit value that controls channel 3 brightness per values in Table 1 The table below pertains to the Marketing Outline drawing on the following page… PRODUCT−SPECIFIC DIMENSIONS Product D E X Y FAN5702UCxx 1.610 mm 1.610 mm 0.205 mm 0.205 mm www.onsemi.com 14 FAN5702 ORDERING INFORMATION Part Number LED Current (ISET) Temperature Range Package Packing Method† FAN5702UC30X 30 mA −40 to 85°C WLCSP−16 3000 / Tape & Reel FAN5702UC20X 20 mA FAN5702UC15X 15 mA FAN5702UC08X 8 mA FAN5702UMP30X 30 mA UQFN−16 3000 / Tape & Reel FAN5702UMP20X 20 mA FAN5702UMP15X 15 mA FAN5702UMP08X 8 mA †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. onsemi is licensed by the Philips Corporation to carry the I2C bus protocol. www.onsemi.com 15 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS UQFN16 3x3, 0.5P CASE 523BB ISSUE O DOCUMENT NUMBER: DESCRIPTION: 98AON13703G UQFN16 3x3, 0.5P DATE 31 OCT 2016 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS WLCSP16 1.61x1.61x0.586 CASE 567SB ISSUE O DOCUMENT NUMBER: DESCRIPTION: 98AON16595G WLCSP16 1.61x1.61x0.586 DATE 30 NOV 2016 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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