FAN7080M-GF085

ON Semiconductor Is Now To learn more about onsemi™, please visit our website at www.onsemi.com onsemi and       and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. 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Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others. Features Description          The FAN7080-GF085 is a half-bridge gate drive IC w ith reset input and adjustable dead time control. It is designed for high voltage and high speed driving of MOSFET or IGBT, w hich operates up to 600 V. ON Semiconductor's high-voltage process and commonmode noise cancellation technique provide stable operation in the high side driver under high-dV/dt noise circumstances. An advanced level-shift circuit allow s high-side gate driver operation up to V S=-5 V (typical) at V BS=15 V. Logic input is compatible w ith standard CMOS outputs. The UVLO circuits for both channels prevent from malfunction w hen V CC and V BS are low er than the specified threshold voltage. Combined pin function for dead time adjustment and reset shutdow n make this IC packaged w ith space saving SOIC-8 Package. Minimum source and sink current capability of output driver is 250 mA and 500 mA respectively, w hich is suitable for junction box application and half and full bridge application in the motor drive system.   Automotive Qualified to AEC Q100 Floating Channel for Bootstrap Operation to +600 V Tolerance to Negative Transient Voltage on VS Pin VS-pin dv/dt Immune Gate Drive Supply Range from 5.5 V to 20 V Under-Voltage Lockout (UVLO) CMOS Schmitt-triggered Inputs w ith Pull-dow n High Side Output In-phase w ith Input IN input is 3.3 V/5 V Logic Compatible and Available on 15 V Input Matched Propagation Delay for both Channels Dead Time Adjustable Applications   Junction Box Half and full bridge application in the motor drive system Related Product Resources Figure 1. 8-Lead, SOIC, Narrow Body Ordering Information Part Number Operating Temperature Range Package -40°C ~ 125°C 8-Lead, Small Outline Integrated Circuit (SOIC), JEDEC MS-012, .150 inch Narrow Body FAN7080M-GF085 FAN7080MXGF085 © 2012 Semiconductor Components Industries, LLC. September-2017, Rev.2 Packing Method Tube Tape & Reel Publication Order Number: FAN7080-GF085/D FAN7080-GF085 — Half Bridge Gate Driver FAN7080-GF085 Half Bridge Gate Driver FAN7080-GF085 — Half Bridge Gate Driver Typical Application Up to 600V VCC 1 IN 2 VCC VB IN HO 8 7 To Load R1 VDT SHUTDOWN /DEAD TIME 3 4 SD/DT VS COM LO 6 5 R2 VDT = Vdd*R2 / (R1+R2). Vdd is output voltage of Microcontroller. The operating range that allows a VDT range of 1.2~3.3V. When pulled lower than VDT [Typ. 0.5V] the device is shutdown. Care must be taken to avoid below threshold spikes on pin 3 that can cause undesired shut down of the IC. For this reason the connection of the components between pin 3 and ground has to be as short as possible. And a capacitor (Typ. 0.02µF )between pin3 and COM can prevent this spike. This pin can not be left floating for the same reason. Figure 2. Typical Application Block Diagram VCC VB UVLO R vreg IN 500kΩ PULSE GENERATOR DEADTIME CONTROL PULSE FILTER R Q HO S VS vreg VCC VCC UVLO SD/DT DELAY LO 500kΩ COM Figure 3. Block Diagram www.onsemi.com 2 1 2 3 4 Figure 4. VCC VB IN HO SD/DT VS COM LO 8 7 6 5 Pin Assignm ent (Top Through View ) Pin Descriptions Pin # Name I/O Pin Function Description 1 V CC P Driver Supply Voltage 2 IN I Logic input for high and low side gate drive output 3 /SD/DT I Shutdow n Input and dead time setting 4 COM P Ground 5 LO A Low side gate drive output for MOSFET Gate connection 6 VS A High side floating offset for MOSFET Source connection 7 HO A High side drive output for MOSFET Gate connection 8 VB P Driver Output Stage Supply www.onsemi.com 3 FAN7080-GF085 — Half Bridge Gate Driver Pin Configuration Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter VS High-Side Floating Offset Voltage Min. Max. Unit V B-25 V B+0.3 V VB High-Side Floating Supply Voltage -0.3 625 V V HO High-Side Floating Output Voltage V S-0.3 V B+0.3 V V LO Low -Side Floating Output Voltage -0.3 V cc+0.3 V V CC Supply Voltage -0.3 25 V V IN Input Voltage for IN -0.3 V CC+0.3 V +1 mA 0.625 W 200 °C/W 150 °C 150 °C IIN Input Injection Current PD (2.3) Pow er Dissipation (1) θJA Thermal Resistance, Junction to Ambient TJ Junction Temperature TSTG Storage Temperature ESD (2) -55 Human Body Model (HBM) 1000 Charge Device Model (CDM) 500 V Notes: 1. Guaranteed by design. Full function, no latchup. Tested at 10 V and 17 V. 2. The Thermal Resistance and pow er dissipation rating are measured per below conditions: JESD51-2: Integral circuits thermal test method environmental conditions, natural convection/Still Air JESD51-3: Low effective thermal conductivity test board for leaded surface-mount packages. 3. Do not exceed pow er dissipation (PD) under any circumstances. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance. ON Semiconductor does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol (4) VB Parameter Min. Max. Unit High-Side Floating Supply Voltage (DC) Transient: -10 V at 0.1 µS V S+6 V S+20 V VS High-Side Floating Supply Offset Voltage (DC) Transient: -25 V(max.) at 0.1 µS at V BS < 25 V -5 600 V V HO High-Side Output Voltage VS VB V V LO Low -Side Output Voltage 0 V CC V V CC Supply Voltage for Logic Input 5.5 20 V V IN Logic Input Voltage 0 V CC V 50 V/nS dv/dt TPULSE Allow able Offset Voltage Slew Rate Minimum Pulse Width (5) (5,6) 1100 (6) FS Sw itching Frequency TA Operating Ambient Temperature -40 Notes: 4. The V S offset is tested w ith all supplies based at 15 V differential 5. Guaranteed by design. 6. When V DT = 1.2 V. Refer to Figures 5, 6, 7 and 8. www.onsemi.com 4 nS 200 KHz 125 °C FAN7080-GF085 — Half Bridge Gate Driver Absolute Maximum Ratings Unless otherw ise specified -40°C ≤ TA ≤ 125°C, V CC = 15 V, V BS=15 V, V S = 0 V, CL =1 nF Symbol Parameter Conditions Min. Typ. Max. Unit V CC and V BS Supply Characteristics V CCUV+ V BSUV+ V CC and V BS Supply Under-Voltage Positive going Threshold V CCUVV BSUV- V CC and V BS Supply Under-Voltage Negative going Threshold 2.8 3.6 V V CCUVH V BSUVH V CC and V BS Supply Under-Voltage Hysteresis 0.2 0.6 V tDUVCC tDUVBS Under-Voltage Lockout Response Time 4.2 5.5 V CC: 6 V2.5 V or 2.5 V6 V 0.5 20 V BS: 6 V2.5 V or 2.5 V6 V 0.5 20 ILK Offset Supply Leakage Current V B = V S = 600 V IQBS Quiescent V BS Supply Current V IN = 0 or 5 V, V SDT = 1.2 V IQCC Quiescent V CC Supply Current VIN = 0 or 5 V, V SDT = 1.2 V 20 20 V µs 50 µA 75 150 µA 350 1000 µA Input Characteristics V IH High Logic level Input Voltage V IL Low Logic Level Input Voltage 2.7 IIN+ Logic Input High Bias Current V IN = 5 V IIN- Logic Input Low Bias Current V IN = 0 V V DT V DT Dead Time Setting Range V 0.8 V 10 50 µA 0 2 µA 5.0 V 1.2 V SD V SD Shutdow n Threshold Voltage RSDT High Logic Level Resistance for /SD /DT V SDT = 5 V ISDT- Low Logic Level Input bias Current for /SD /DT V SDT = 0 V 100 0.8 1.2 V 500 1100 kΩ 1 2 µA Output Characteristics V OH(HO) High Level Output Voltage (V CC - V HO) IO = 0 0.1 V V OL(HO) Low Level Output Voltage (V HO) IO = 0 0.1 V IO+(HO) Output High, Short-Circuit Pulse Current 250 300 mA IO-(HO) Output Low , Short-Circuit Pulse Current 500 600 mA ROP(HO) RON(HO) 60 Equivalent Output Resistance 30 Ω V OH(LO) High Level Output Voltage (V B – V LO) IO = 0 0.1 V V OL(LO) Low Level Output Voltage (V LO) IO = 0 0.1 V IO+(LO) Output High, Short-Circuit Pulse Current 250 IO-(LO) Output Low , Short-Circuit Pulse Current 500 ROP(LO) RON(LO) mA mA 60 Equivalent Output Resistance 30 www.onsemi.com 5 Ω FAN7080-GF085 — Half Bridge Gate Driver Electrical Characteristics Unless otherw ise specified -40°C ≤ TA ≤ 125°C, V CC = 15 V, V BS=15 V, V S = 0 V, CL =1 nF Symbol Parameter tON Turn-On Propagation Delay tOFF Turn-Off Propagation Delay (7) Conditions Min. Typ. Max. Unit V S=0 V 750 1500 ns V S=0 V 130 250 ns tR Turn-On Rise Time 40 150 ns tF Turn-Off Fall Time 25 400 ns DT Dead Time, LS Turn-off to HS Turn-on and HS Turn-on to LS Turn-off V IN = 0 or 5 V at VDT = 1.2 V 250 650 1200 V IN = 0 or 5 V at VDT = 1.2 V 1600 2100 2600 35 110 ns DT1 – DT2 at VDT = 1.2 V MDT Dead Time Matching Time MTON Delay Matching, HS and LS Turn-on VDT = 1.2 V 25 110 ns MTOFF Delay Matching, HS and LS Turn-off VDT = 1.2 V 15 60 ns 180 330 ns tSD FS1 FS2 DT1 – DT2 at VDT = 3.3 V Shutdow n Propagation Delay Sw itching Frequency 300 V CC = V BS = 20 V 200 V CC = V BS = 5.5 V 200 Notes: 7. tON includes DT Typical Waveforms Figure 5. Figure 6. Figure 7. Short Pulse Width Test Circuit and Pulse Width Waveform Abnorm al Output Waveform w ith Pulse Width Recom m endation of Pulse w idth Output Waveform www.onsemi.com 6 Figure 8. Pulse Width vs. VDT ns Khz FAN7080-GF085 — Half Bridge Gate Driver Dynamic Electrical Characteristics IN SD/DT HO LO Figure 9. Input/Output Tim ing Diagram Figure 10. Dead Tim e vs. V DT (V CC=V BS=15 V, -40°C < TJ < 125°C) SD 50% tsd HO LO Figure 11. Sw itching Tim e Waveform Definitions 90% Figure 12. Shutdow n Waveform Definitions Figure 14. Dead Tim e Waveform Definitions PWM(LO) 50% 50% PWM(HO) LO HO 10% MTON MTOFF 90% LO Figure 13. HO Delay Matching Waveform Definitions www.onsemi.com 7 FAN7080-GF085 — Half Bridge Gate Driver Typical Performance Characteristics Figure 15. Turn-on Delay Tim e of HO vs. Tem perature (V CC=V BS=15 V, CL=1 nF) Figure 16. Turn-on Delay Tim e of HO vs. V BS Supply Voltage (V CC=15 V, CL=1 nF, TA=25°C) Figure 17. Turn-on Delay Tim e of LO vs. Tem perature (V CC=V BS=15 V, CL=1 nF) Figure 18. Turn-on Delay Tim e of LO vs. V BS Supply Voltage (V CC=15 V, CL=1 nF, TA=25°C) Figure 19. Turn-off Delay Tim e of HO vs. Tem perature (V CC=V BS=15 V, CL=1 nF) Figure 20. Turn-off Delay Tim e of HO vs. V BS Supply Voltage (V CC=15 V, CL=1 nF, TA=25°C) www.onsemi.com 8 FAN7080-GF085 — Half Bridge Gate Driver Typical Performance Characteristics Figure 21. Turn-off Delay Tim e of LO vs. Tem perature (V CC=V BS=15 V, CL=1 nF) Figure 22. Turn-off Delay Tim e of LO vs. V BS Supply Voltage (V CC=15 V, CL=1 nF, TA=25°C) Figure 23. Turn-on Rise Tim e of HO vs. Tem perature (V CC=V BS=15 V, CL=1 nF) Figure 24. Turn-on Rise Tim e of HO vs. V BS Supply Voltage (V CC=15 V, CL=1 nF, TA=25°C) Figure 25. Turn-on Rise Tim e of LO vs. Tem perature (V CC=V BS=15 V, CL=1 nF) Figure 26. Turn-on Rise Tim e of LO vs. V BS Supply Voltage (V CC=15 V, CL=1 nF, TA=25°C) www.onsemi.com 9 FAN7080-GF085 — Half Bridge Gate Driver Typical Performance Characteristics Figure 27. Turn-off Fall Tim e of HO vs. Tem perature (V CC=V BS=15 V, CL=1 nF) Figure 28. Turn-off Fall Tim e of HO vs. V BS Supply Voltage (V CC=15 V, CL=1 nF, TA=25°C) Figure 29. Turn-off Fall Tim e of LO vs. Tem perature (V CC=V BS=15 V, CL=1 nF) Figure 30. Turn-off Fall Tim e of LO vs. Tem perature (V CC=V BS=15 V, CL=1 nF) Figure 31. Figure 32. Logic Low Input Voltage vs. Tem perature www.onsemi.com 10 Logic High Input Voltage vs. Tem perature FAN7080-GF085 — Half Bridge Gate Driver Typical Performance Characteristics Figure 33. High Level Output of HO vs. Tem perature (V CC=V BS=15 V) Figure 34. High Level Output of HO vs. V BS Supply Voltage (V CC=15 V, TA=25°C) Figure 35. High Level Output of LO vs. Tem perature (V CC=V BS=15 V) Figure 36. High Level Output of LO vs. V BS Supply Voltage (V CC=15 V, TA=25°C) Figure 37. Low Level Output of HO vs. Tem perature (V CC=V BS=15 V) Figure 38. Low Level Output of HO vs. V BS Supply Voltage (V CC=15 V, TA=25°C) www.onsemi.com 11 FAN7080-GF085 — Half Bridge Gate Driver Typical Performance Characteristics Figure 39. Low Level Output of LO vs. Tem perature (V CC=V BS=15 V) Figure 40. Low Level Output of LO vs. V CC Supply Voltage (V CC=15 V, TA=25°C) Figure 41. Offset Supply Leakage Current vs. Tem perature (V CC=V BS=600 V) Figure 42. Offset Supply Leakage Current vs. V B Boost Voltage(V CC=15 V, TA=25°C) Figure 43. V BS Supply Current vs. Tem perature (V BS=15 V) Figure 44. V CC Supply Current vs. Tem perature (V CC=15 V) www.onsemi.com 12 FAN7080-GF085 — Half Bridge Gate Driver Typical Performance Characteristics Figure 46. Logic Low Input Current vs. Tem perature (V IN=5 V) Figure 45. Logic High Input Current vs. Tem perature (V IN=5 V) Figure 47. V CC Under-Voltage Threshold (+) vs. Tem perature Figure 48. V CC Under-Voltage Threshold (-) vs. Tem perature Figure 49. V BS Under-Voltage Threshold (+) vs. Tem perature Figure 50. V BS Under-Voltage Threshold (-) vs. Tem perature www.onsemi.com 13 FAN7080-GF085 — Half Bridge Gate Driver Typical Performance Characteristics Figure 51. Output Source Current of HO vs. Tem perature (V CC=V BS=15 V) Figure 52. Output Sink Current of HO vs. Tem perature (V CC=V BS=15 V Figure 53. Output Source Current of LO vs. Tem perature (V CC=V BS=15 V) Figure 54. Output Sink Current of LO vs. Tem perature (V CC=V BS=15 V Figure 55. Logic Low Input Current of SD/DT vs. Tem perature Figure 56. www.onsemi.com 14 Shutdow n Threshold Voltage vs. Tem perature FAN7080-GF085 — Half Bridge Gate Driver Typical Performance Characteristics Figure 58. Deadtim e Matching Tim e vs. Tem perature (V CC=V BS=15 V, V DT=1.2 V) Figure 57. Deadtim e vs. Tem perature (V CC=V BS=15 V, V DT=1.2 V) Figure 59. Turn-on Delay Matching vs. Tem perature (V CC=V BS=15 V, V DT=1.2 V) Figure 61. Shutdow n Propagation Delay vs. Tem perature Figure 60. Turn-off Delay Matching vs. Tem perature (V CC=V BS=15 V, V DT=1.2 V) Figure 62. Maxim um vs. Negative Offset Voltage vs. Tem perature (V CC=V BS=15 V) www.onsemi.com 15 FAN7080-GF085 — Half Bridge Gate Driver Typical Performance Characteristics 4.90±0.10 0.65 A (0.635) 5 8 B 1.75 6.00±0.20 PIN ONE INDICATOR 5.60 3.90±0.10 1 4 1.27 1.27 0.25 C B A LAND PATTERN RECOMMENDATION SEE DETAIL A 0.175±0.075 0.22±0.03 C 1.75 MAX 0.10 0.42±0.09 OPTION A - BEVEL EDGE (0.86) x 45° R0.10 GAGE PLANE R0.10 OPTION B - NO BEVEL EDGE 0.36 NOTES: 8° 0° SEATING PLANE 0.65±0.25 (1.04) DETAIL A A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AA. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M E) DRAWING FILENAME: M08Arev16 SCALE: 2:1 8-Lead, Sm all Outline Integrated Circuit (SOIC), JEDEC MS-012, .150 inch Narrow Body www.onsemi.com 16 FAN7080-GF085 — Half Bridge Gate Driver Physical Dimensions FAN7080-GF085 — Half Bridge Gate Driver ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. 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