FAN7093

FAN7093 High-Current PN Half-Bridge Driver Features Description  Path Resistance for a Full-Bridge Configuration: Max. 30.5 mΩ at 150°C  PWM Capability: > 60 kHz1 Combined with Active Free Wheeling  Switched-Mode Current Limitation for Reduced Power Dissipation In Over-Current Condition The FAN7093 is an integrated high-current half-bridge driver for electric motor drive applications. It contains one P-channel high-side MOSFET and one N-channel low-side MOSFET with an integrated control IC in one package. With the P-channel high-side switch, the need for a charge pump is eliminated, which minimizes EMI.   Current Limit Protection: Typ. 46 A        Over-Temperature Protection (OTP) with Latch Independent Current-Sense Output and Diagnostic Flag for High and Low Sides Shorted-Load Protection with Latch Behavior Over-Voltage Protection (OVP) with Lockout Under-Voltage Protection (UVP) Pins IN and /INH are logic-level inputs and control the half-bridge output. The diagnostic and current sense IS pin outputs a current that is proportional to the current flowing through the half-bridge MOSFETs. The IS pin output represents current for the P-channel or the Nchannel, depending on which is active. The part is protected against a short to battery or ground of the out pin, over-current, over-temperature, over-voltage, and under-voltage conditions. The FAN7093 provides a cost- and space-optimized solution for protected high-current PWM motor drives. Logic Level Control Inputs Adjustable Slew Rates for Optimized EMI Typical Slew Rate of 1 V/µs with Open Slew Rate Pin Figure 1. TO263-7L 1 The minimum duty cycle is 34% when VBATT=14 V, RSR is shorted, and the following parameters are at their typical values: td(ON)HS, td(ON)LS, tSlew(on)HS, and tSlew(on)LS. © 2010 Fairchild Semiconductor Corporation FAN7093 • Rev. 1.0.5 www.fairchildsemi.com FAN7093 — High-Current PN Half-Bridge Driver July 2013 Part Number Operating Temperature Range FAN7093_F085 -40 to +150°C Package 8-Lead, TO263, Molded, JEDEC Variation CA Packing Method Tape & Reel Block Diagram Figure 2. Block Diagram The FAN7093 is a high-current half-bridge that contains three separate chips in one package: one P-channel high-side MOSFET, one N-channel low-side MOSFET, and with a control IC. All three chips are mounted on one common lead frame, using chip-on-chip and chip– by-chip technologies. The power MOSFETs are vertical MOS transistors to ensure minimum on-state resistance. conditions. In case of a short to VBATT or ground, the IS pin acts as an error flag. The error flag can be detected as a logic HIGH level through an attached microcontroller. In an over-current situation, the control IC turns off the MOSFETs and tries to turn them back on after a cool down time of 140 μs (typical). The control IC protects the MOSFETs against over-voltage, under– voltage, and over–temperature conditions. The dead time, to prevent shoot-through between the P- and Nchannel MOSFET, is also generated by the control IC. The slew rate of the outputs can be adjusted through an external resistor connected to the SR pin. The FAN7093 can be combined with another FAN7093 to form a fullbridge drive. Multiple FAN7093 can be combined in fullor half-bridge three-phase drive configurations. Using a P-channel high-side switch eliminates a charge pump and reduces EMI. A microcontroller is able to control the logic level inputs of IN and /INH of the halfbridge. The diagnostic pin IS is a current output stage that delivers a proportional current through the Pchannel and N-channel MOSFETS, depending on which is being activated, with the IN or /INH pin forcing © 2011 Fairchild Semiconductor Corporation FAN7093 • Rev. 1.0.5 www.fairchildsemi.com 2 FAN7093 — High-Current PN Half-Bridge Driver Ordering Information Figure 3. Pin Assignments Pin Definitions Pin Symbol I/O Function (1) 1 GND 2 IN I Input. Defines whether the high-side (HS) or low-side (LS) switch is activated. 3 /INH I Inhibit. When set to LOW, the device enters Sleep Mode and resets OverTemperature Protection (OTP) and the HS and LS short latch. 4, 8 OUT(1) O Power output of the bridge 5 SR I Slew rate. The slew rate of the power switches can be adjusted by connecting a resistor between the SR and GND pins. 6 IS O Current sense and diagnostics 7 VBATT Ground (1) Supply Note: 1. This pin needs power wiring. Table 1. Truth Table Device State /INH IN HS LS IS LOW X OFF OFF LOW HIGH LOW OFF ON CS LS Active HIGH HIGH ON OFF CS HS Active Over-Voltage IOUT ≤ ICP X X ON OFF HIGH Shutdown of LS, HS Activated, Error Detected Over-Voltage IOUT > ICP X X OFF OFF HIGH Shutdown of LS, HS Error Detected Reset with /INH HIGH to LOW to HIGH when condition no longer exists Under-Voltage X X OFF OFF LOW UV Lockout Over-Temperature or Shorted LS or HS LOW X OFF OFF LOW Standby Mode, Reset of Latch Over-Temperature or Shorted LS or HS HIGH X OFF OFF HIGH Shutdown with Latch, Error Detected HIGH HIGH OFF ON HIGH Switched Mode, Error Detected(2) HIGH LOW ON OFF HIGH Switched Mode, Error Detected(2) Normal Operation Current Limit Mode Standby Mode Notes: 2. Device resumes normal operation after tCLS. The error signal is reset after 2 x tCLS. 3. X=Don’t care input and CS=Current Sense Mode status flag. © 2011 Fairchild Semiconductor Corporation FAN7093 • Rev. 1.0.5 www.fairchildsemi.com 3 FAN7093 — High-Current PN Half-Bridge Driver Pin Configuration Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TJ = -40°C to +150°C; all voltages with respect to ground, and positive current flowing into pin (unless otherwise specified). Symbol VBATT Parameter Supply Voltage Condition (4) VIN /VINH Logic Input Voltage(4) VSR VIS (4) Voltage at SR Pin (4) Voltage at IS Pin Min. Typ. Max. Unit -0.3 45 V -0.3 45 V -0.3 1.5 V -0.3 7.5 V ID(HS), ID(LS) HS/LS Continuous Drain Current(4,5) TC < 85°C -46/46 A ID(HS), ID(LS) HS/LS Pulsed Drain Current(4,5) TC < 85°C Single Pulse < 5 µs -90/90 A ID(HS), ID(LS) HS/LS PWM Current(4,5) TC < 125°C f=1 kHz, DC=50% -55/55 A Temperatures TJ TSTG Junction Temperature(4) Storage Temperature -40 150 °C -55 150 °C IN, /INH, SR, IS -2 2 OUT, GND, VBATT -6 6 (4) Electrostatic Discharge Capability (ESD) ESD Human Body Model, JESD22-A114(6) kV Notes: 4. Not subject to production testing, specified by design. 5. Maximum reachable current may be smaller, depending on current-limit level. 6. ESD susceptibility, HBM according to AEC_Q100-0042 / JESD22-A114-B (1.5 kΩ, 100 pF). Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Condition VBATT(NOM) Supply Voltage Range for Nominal Operation VBATT(EXT) Supply Voltage Range for Extended Operation TJ Parameter Deviations Possible Junction Temperature Min. Typ. Max. Unit 7 18 V 5.5 28.0 V -40 150 °C ϴJC(LS) Thermal Resistance, Junction-Case, Low-Side Switch ϴJC(LS)=∆TJ (LS) / PV (LS)(7) 0.8 °C/W ϴJC(HS) Thermal Resistance, Junction-Case, High-Side Switch ϴJC(HS)=∆TJ (HS) / PV (HS)(7) 0.45 °C/W 40 °C/W ϴJA Using Pad Area of One Square Inch of Two-Ounce Copper Thermal Resistance, Junction-Ambient(7) Note: 7. Not subject to production test; specified by design. © 2011 Fairchild Semiconductor Corporation FAN7093 • Rev. 1.0.5 www.fairchildsemi.com 4 FAN7093 — High-Current PN Half-Bridge Driver Absolute Maximum Ratings Unless otherwise specified, VBATT = 7 V to 18 V, TJ = -40°C to +150°C, IL = 0 A, all voltages with respect to ground, and positive current flowing into pin. Symbol IVBATT(ON) Parameter Condition Supply Current IVBATT(OFF) Quiescent Current Min. Typ. Max. Unit VINH=5 V, VIN=5 V, RSR=0 Ω, DC-Mode, No Fault Condition 5.0 mA VINH=0 V, VIN=0 V 450 µA Power Stage Characteristics The power stages of the FAN7093 consist of a P-channel vertical DMOS transistor for the high-side switch and an Nchannel vertical DMOS transistor for the low-side switch. All protection and diagnostic functions are located in the control die. Both switches can be operated up to 60 kHz2, allowing active freewheeling and minimizing power dissipation in the forward operation of the integrated diodes. The on-state resistance, RDS(ON), is dependent on the supply voltage VBATT as well as on the junction temperature, TJ. Power Stages — Static Characteristics Unless otherwise specified, VBATT=7 V to 18 V, TJ=-40°C to +150°C, all voltages with respect to ground, and positive current flowing into pin. Symbol Parameter Condition Min. Typ. Max. Unit High-Side Switch RDS(ON)_HS ILEAK(HS) VRDF On-State High-Side Resistance IOUT=-20 A; VBATT=14 V(8) 12.3 mΩ Leakage Current VINH=0 V, VOUT=0 V 50 µA IOUT=-9 A 1.5 V IOUT=20 A; VBATT=14 V(8) 18.2 mΩ VINH=0 V, VOUT=VBATT 10 µA IOUT=9 A -1.5 V (9) Reverse Diode Forward-Voltage Low-Side Switch RDS(ON)_LS ILeak(LS) On-State Low-Side Resistance Leakage Current (9) Reverse Diode Forward-Voltage Notes: 8. Specified RDS(ON) value is related to normal soldering points; RDS(ON) values are specified for FAN7093_F085: pin 1,7 to pin 8 (tab, backside). 9. Due to active freewheeling, the diode is conducting only for a few µs, depending on the value of the external RSR resistor. 2 The minimum duty cycle is 34% when VBATT=14 V, RSR is shorted and the following parameters are at their typical values: td(ON)HS, td(ON)LS, tSlew(on)HS, and tSlew(on)LS. © 2011 Fairchild Semiconductor Corporation FAN7093 • Rev. 1.0.5 www.fairchildsemi.com 5 FAN7093 — High-Current PN Half-Bridge Driver Electrical Characteristics Due to the timing differences for the rising and the falling edges, there is a slight difference between the length of the input pulse and the length of the output pulse, as shown in Figure 4. Figure 4. © 2011 Fairchild Semiconductor Corporation FAN7093 • Rev. 1.0.5 Timing Diagrams www.fairchildsemi.com 6 FAN7093 — High-Current PN Half-Bridge Driver Switching Times Unless otherwise specified; VBATT=7 V - 14 V, TJ=-40°C to +150°C, RL=2 Ω, /INH HIGH, all voltages with respect to ground, and positive current flowing into pin. Symbol Parameter Condition Min. Typ. Max. RSR=0Ω 15 19 24 RSR=5.1 kΩ 12 15 17 RSR=51 kΩ 5 6 7 RSR=Open, RL to GND 0.8 1.0 1.2 /INH High; IN LOW to HIGH; OUT with RL to GND (see Figure 4 top) 0.45 2.10 4.20 RSR=0Ω 18 21 24 RSR=5.1 kΩ 13 17 19 RSR=51 kΩ 5 7 7 RSR=Open, RL to VBATT 0.8 1.2 1.2 /INH HIGH; IN HIGH to LOW; OUT with RL to VBATT (see Figure 4 bottom) 0.45 2.10 4.20 Unit High-Side Switch Dynamic Characteristics VSlew(ON)HS td(ON)HS Slew Rate(10) Turn-On Delay V/µs µs Low-Side Switch Dynamic Characteristics VSlew(ON)LS td(ON)LS Slew Rate(10) Turn-On Delay V/µs µs Note: 10. Not production tested. © 2011 Fairchild Semiconductor Corporation FAN7093 • Rev. 1.0.5 www.fairchildsemi.com 7 FAN7093 — High-Current PN Half-Bridge Driver Power Stages - Dynamic Characteristics The device provides several integrated protection functions designed to prevent IC damage in fault conditions. Fault conditions are considered as “outside” the normal operating range. Protection functions are not for continuous or repetitive operation, with the exception of current-limit protection. In a fault condition, the FAN7093 applies the highest slew rate possible, independent of the connected slew rate resistor (RSR). Over-voltage, over-temperature, and over-current situations are indicated by a fault current flag IIS(LIM) at the IS pin. The following describes the protection functions in order of priority. Over-voltage protection overrides all other protections. Current Limitation The current is measured in both MOSFETS. As soon as the current reaches the limit ICL, the low-side or highside MOSFET is deactivated and the other MOSFET activated for tCLS. During that time, changes at the IN pin are ignored. The /INH pin can still be used to turn off both MOSFETs. After tCLS, the MOSFETS return to their initial setting. The error signal at the IS pin is reset after 2 x tCLS. Unintentional triggering of the current-limit circuitry through short current spikes (e.g. inflicted by EMI coming from a motor) is suppressed by an internal filter. Reaction delay of the filter circuitry affects the current limit level ICL, depending on slew rate of the load current dI/dt. Over-Voltage Protection (OVP) To ensure a high immunity against over-voltage conditions like load dump, the device turns off the lowside MOSFET and turns on the high-side MOSFET when the supply voltage exceeds the over-voltage protection level VOV(OFF). The control IC returns to normal operation tlock=140 µs (Typ.) after the supply voltage decreases below the over-voltage lockout level, VOV(ON). In H-bridge configurations, this behavior leads to freewheeling in the high side during over-voltage condition. If the load current exceeds ICP in over-voltage lockout, the IC turns off the high-side driver and latches this state. See Table 1, which shows the condition of the IS pin flag. This state can be reset (if the conditions no longer exist) when /INH goes from HIGH to LOW to HIGH again. Figure 5. In combination with a typical inductive load, such as a motor, this results in a switched-mode current limitation. This method of limiting current has the advantage of greatly reduced power dissipation compared to driving the MOSFET in linear mode. Therefore, it is possible to use the current limitation for a short time without exceeding the maximum allowed junction temperature (e.g. for limiting the inrush current during motor startup). However, regular use of the current limitation is only allowed as long as the specified maximum junction temperature is not exceeded. Exceeding this temperature reduces the life of the device. Under-Voltage Protection (UVP) To avoid uncontrolled motion; for example, a driven motor at low voltages; the control IC turns off all MOSFETS when the supply voltage drops below the turn-off voltage, VUV(OFF). The control IC resumes to normal operation when the supply voltage rises above the turn-on voltage VUV(ON). Notice that the IS pin does NOT flag this fault condition. Over-Temperature Protection (OTP) The FAN7093 is protected against over-temperature by an integrated temperature sensor in the control IC. Over-temperature protection turns off both output stages. This state is latched until the device is reset by a LOW signal with a minimum pulse length of treset at the /INH pin, assuming the control IC temperature decreased by at least the thermal hysteresis. Repetitive use of the over-temperature protection decreases product life. © 2011 Fairchild Semiconductor Corporation FAN7093 • Rev. 1.0.5 Current Limitation Timing Diagram (Inductive Load) Short-Circuit Protection (SCP) The device is short-circuit protected against:  Output Shorted to Ground   Output Shorted to Battery Voltage Short-Circuit between the Load Connections The short-circuit protection is a combination of current limit and over-temperature shutdown of the device. www.fairchildsemi.com 8 FAN7093 — High-Current PN Half-Bridge Driver Protection Functions Unless otherwise specified; VBATT=7 V to 18 V, TJ=-40°C to +150°C, all voltages with respect to ground, and positive current flowing into pin. Symbol Parameter Condition Limit Values Min. Typ. Max. Unit Under-Voltage Shutdown VUV(ON) Turn-Off Voltage VBATT Increasing VUV(OFF) Turn-On Voltage VBATT Decreasing VUV(HY) Hysteresis 5.6 4.9 V V 0.15 V Over-Voltage Lockout VOV(ON) Turn-Off Voltage VBATT Decreasing 28 VOV(OFF) Turn-On Voltage VBATT Increasing 27 VOV(HY) Hysteresis 1.0 V Lockout Time 140 µs tlock V 35 V Current Limitation ICL Current Limit Detection Level Highand Low-Side 39 50 61 A ICP Peak Current Limit Detection Level High- and Low-Side(11) 72 88 105 A 100 150 200 µs Current Limitation Timing tCLS Shut-Off Time for HS and LS Thermal Shutdown TSD(SENSE) Turn-Off Temperature Sense 170 190 °C TSD(SENSE) Turn-On Temperature Sense 150 170 °C TSD(HYS) treset Thermal Hysteresis 15 Reset Pulse at /INH Pin (/INH LOW) 4 K µs Note: 11. Not production tested; specified by design. © 2011 Fairchild Semiconductor Corporation FAN7093 • Rev. 1.0.5 www.fairchildsemi.com 9 FAN7093 — High-Current PN Half-Bridge Driver Electrical Characteristics - Protection Functions Input Circuit The internal gate drivers for the MOSFETS are controlled through inputs IN and /INH and are TTL / CMOS-compatible Schmitt triggers with hysteresis. Setting the /INH pin to HIGH enables the device. In this condition, one of the two power MOSFETS turn on, depending on the input level of the IN pin. To deactivate both switches, the /INH pin must be set LOW. No external driver is needed. The FAN7093 can interface directly with a microcontroller as long as the maximum ratings are not exceeded. Figure 6. Dead-Time Generation The dead time is generated on the control IC to prevent shoot-through between the power MOSFETS. The dead-time is independent of the selected slew rate to reach a high PWM frequency of 60 kHz. Sense Current vs. Load Current and Flag Current Adjustable Slew Rate To optimize electromagnetic emission (EMI), the switching speed of the MOSFETs is adjustable by an external resistor. The slew rate pin, SR, allows designers to optimize the balance between emission and power dissipation within the application by connecting an external resistor RSR to GND. If the SR pin is open by design or if intermittent disconnect occurs, the slew rate is set to the value shown in the Power Stages - Dynamic Characteristics table. Status Flag Diagnostic with Current-Sense Capability The status pin, IS, is used as a combined current sense and error flag output. In normal operation (Current-Sense Mode), a current source in the control IC is connected to the status pin, which delivers a current proportional to the forward load current flowing through the active high-side or low-side MOSFET. Current flow in the reverse direction cannot be detected except for a marginal leakage current I IS(LK). External resistor RIS determines the voltage per output current. The current-sense ratio value is shown in the Electrical Characteristics – Control and Diagnostics table. In case of a fault condition, the status output is connected to a current source independent of the load current and provides I IS(lim). The maximum voltage at the IS pin is determined by the choice of the external resistor and the supply voltage. When in a current-limit condition, IIS(lim), is active for a time 2 x tCLS; the flag indicates the error for time t CL after the condition no longer exists, but constantly stays active as long as the current-limit condition exists. Figure 7. Figure 8. © 2011 Fairchild Semiconductor Corporation FAN7093 • Rev. 1.0.5 Current Sense Mode, Normal Operation Error Flag Mode, Fault Condition www.fairchildsemi.com 10 FAN7093 — High-Current PN Half-Bridge Driver Control and Diagnostics Electrical Characteristics - Control and Diagnostics Unless otherwise specified, VBATT=7V to 18V, TJ=-40 °C to +150 °C, all voltages with respect to ground, positive current flowing into pin. Symbol Parameter VINXL Low Level Voltage, /INH, IN VINXH High Level Voltage, /INH, IN VINXH(HYS) Input Voltage Hysteresis IINXH Input Current High Level Condition Min. Typ. Max. 1.5 V 3.5 500 KILIS Current Sense Ratio in Static onCondition KILIS=IL/IIS IIS(LIM) Maximum Analog Sense Current (12) VINH=VIN=0.4 V to 5.3 V 20 RIS=800 Ω 4.5 Unit V mV 80 8.5 µA 13.5 IL=8 A to 50 A 10³ IL=1.1 A to 8 A 3.5 RIS=800 Ω 4.5 5.5 mA 5.5 7.0 mA IIS(FAULT) Sense Current in Fault Condition RIS=800 Ω VIS(FAULT) Maximum IS Output Voltage RIS ≥ 3 kΩ 7.5 V ISENSE Leakage Current /INH HIGH, IN=X, IL=0 A 300 µA Settling time(12,13) Resistive Load, VBATT =14 V, IL=3 A, /INH HIGH, SR to GND 4 µs IISLEAK tSET Notes: 12. Not subject to production test; specified by design. 13. The settling time is from when IN transitions 0 to 1 (the low-side goes OFF and the high-side goes ON) and 1 to 0 (the high-side goes OFF and the low-side goes ON) to when V(IS) reaches 90% of its final value. © 2011 Fairchild Semiconductor Corporation FAN7093 • Rev. 1.0.4 www.fairchildsemi.com 11 FAN7093 — High-Current PN Half-Bridge Driver Application Information © 2011 Fairchild Semiconductor Corporation FAN7093 • Rev. 1.0.5 Figure 9. Full-Bridge Motor Application Figure 10. Half-Bridge Motor Application www.fairchildsemi.com 12 FAN7093 — High-Current PN Half-Bridge Driver Physical Dimensions Figure 11. 8-Lead, TO263, Molded, JEDEC Variation CA Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/dwg/TO/TO263A08.pdf. © 2011 Fairchild Semiconductor Corporation FAN7093 • Rev. 1.0.5 www.fairchildsemi.com 13 FAN7093 — High-Current PN Half-Bridge Driver © 2011 Fairchild Semiconductor Corporation FAN7093 • Rev. 1.0.5 www.fairchildsemi.com 14