600 V / 4 A, High-Side
Automotive Gate Driver IC
FAN7171-F085
Description
The FAN7171-F085 is a monolithic high−side gate drive IC that can
drive high−speed MOSFETs and IGBTs that operate up to +600 V. It
has a buffered output stage with all NMOS transistors designed for
high pulse current driving capability and minimum cross−conduction.
ON Semiconductor’s high−voltage process and common−mode
noise-canceling techniques provide stable operation of the high−side
driver under high-dv/dt noise circumstances. An advanced level−shift
circuit offers high−side gate driver operation up to VS = −9.8 V
(typical) for VBS = 15 V.
The UVLO circuit prevents malfunction when VBS is lower than the
specified threshold voltage.
The high−current and low−output voltage-drop feature make this
device suitable for sustaining switch drivers and energy−recovery
switch drivers in automotive motor drive inverters, switching power
supplies, and high−power DC−DC converter applications.
•
SOIC8
CASE 751EB
ORDERING INFORMATION
Device
Features
•
•
•
•
•
•
•
•
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Floating Channel for Bootstrap Operation to +600 V
4 A Sourcing and 4 A Sinking Current Driving Capability
Common−Mode dv/dt Noise−Cancelling Circuit
3.3 V and 5 V Input Logic Compatible
Output In−phase with Input Signal
Under− Voltage Lockout for VBS
25 V Shunt Regulator on VDD and VBS
8−SOIC Package, Case 751EB
(JEDEC MS−012, 0.150 inch Narrow Body)
Automotive Qualified to AEC Q100 for Ambient Operating
Temperature from −40°C to 125°C
FAN7171M-F085
FAN7171MX−F085
Package
Shipping†
Case 751EB
(Pb−Free /
Halogen Free)
Tube
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
1. These devices passed wave soldering
test by JESD22A−111.
2. A suffix as “…F085P” has been temporarily
introduced in order to manage a double source
strategy as ON Semiconductor has officially
announced in Aug 2014.
Applications
• Common Rail Injection Systems
• DC−DC Converter
• Motor Drive (Electric Power Steering, Fans)
Related Product Resources
• FAN7171−F085 Product Folder
• AN−6076 Design and Application Guide of Bootstrap Circuit for
High−Voltage Gate−Drive IC
• AN−8102 200 Recommendations to Avoid Short Pulse Width Issues
•
•
in HVIC Gate Driver Applications
AN−9052 Design Guide for Selection of Bootstrap Components
AN−4171 FAN7085 High−Side Gate Driver− Internal Recharge Path
Design Considerations
© Semiconductor Components Industries, LLC, 2013
April, 2021 − Rev. 4
1
Publication Order Number:
FAN7171−F085/D
FAN7171−F085
TYPICAL APPLICATION
VIN
15 V
RBOOT DBOOT
FAN7171_F805
VB 8
1 VDD
PWM
R1
2 IN
C1 3 NC
4
GND
HO
7
VS
6
NC
5
CBOOT
L1
R2
C2
D1
VOUT
Figure 1. Typical Application
BLOCK DIAGRAM
GND
4
2
VDD
UVLO
PULSE
GENERATOR
IN
25 V
110 K
1
NOISE
CANCELLER
R
S
R
Q
Pins 3 and 5 are no connection
Figure 2. Block Diagram
PIN CONFIGURATION
VDD
1
IN
2
NC
3
GND
4
8 VB
FAN7371
7 HO
6 VS
5 NC
Figure 3. Pin Assignment (Top Through View)
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2
Shoot−through current
Compensated gate driver
VDD
8
VB
7
HO
6
VS
25 V
FAN7171−F085
Table 1. PIN DESCRIPTIONS
Pin #
Name
1
VDD
Description
2
IN
Logic Input for High−Side Gate Driver Output
3
NC
No Connection
4
GND
5
NC
No Connection
6
VS
High−Voltage Floating Supply Return
7
HO
High−Side Driver Output
8
VB
High−Side Floating Supply
Supply Voltage
Ground
Table 2. ABSOLUTE MAXIMUM RATINGS
Symbol
Characteristics
VS
High−Side Floating Offset Voltage
VB
High−Side Floating Supply Voltage (Note 3)
Max.
Unit
VB−VSHUNT
VB+0.3
V
−0.3
625.0
V
VS−0.3
VB+0.3
V
Low−Side and Logic Supply Voltage (Note 3)
−0.3
VSHUNT
V
Logic Input Voltage
−0.3
VDD+0.3
V
±50
V/ns
0.625
W
VHO
High−Side Floating Output Voltage
VDD
VIN
dVS/dt
Min.
Allowable Offset Voltage Slew Rate
PD
Power Dissipation (Notes 4, 5, 6)
θJA
Thermal Resistance
200
°C/W
TJ
Junction Temperature
−55
150
°C
TSTG
Storage Temperature
−55
150
°C
Operating Ambient Temperature
−40
125
°C
TA
ESD
Human Body Model (HBM)
2000
Charge Device Model (CDM)
500
V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
3. This IC contains a shunt regulator on VDD and VBS with a normal breakdown voltage of 25 V. Please note that this supply pin should not be
driven by a low−impedance voltage source greater than the VSHUNT specified in the Electrical Characteristics section.
4. Mounted on 76.2 x 114.3 x 1.6 mm PCB (FR−4 glass epoxy material).
5. Refer to the following standards:
JESD51−2: Integral circuits thermal test method environmental conditions, natural convection, and
JESD51−3: Low effective thermal conductivity test board for leaded surface−mount packages.
6. Do not exceed power dissipation (PD) under any circumstances.
Table 3. RECOMMENDED OPERATING CONDITIONS
Symbol
VBS
VS
Min.
Max.
Unit
High−Side Floating Supply Voltage
Characteristics
VS+10
VS+20
V
High−Side Floating Supply Offset Voltage (DC)
6−VDD
600
V
VS
VB
V
High−Side Floating Supply Offset Voltage (Transient)
−15 (~170)
−7 (~400)
VHO
High−Side Output Voltage
VIN
Logic Input Voltage
GND
VDD
V
VDD
Supply Voltage
10
20
V
Minimum Input Pulse Width (Note 7)
80
−
ns
TPULSE
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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3
FAN7171−F085
7. Input pulses shorter than the minimum recommendation can cause abnormal output. Short input pulses can be turn on pulses (i.e., rising
edge to the adjacent falling edge), turn off pulses (i.e., falling edge to the adjacent rising edge) but also parasitic pulses induced by noise.
Refer to Figure 24 and Figure 25. Value guaranteed by design.
Table 4. ELECTRICAL CHARACTERISTICS
(VBIAS (VDD, VBS) = 15 V, −40°C ≤ TA ≤ 125°C, unless otherwise specified. The VIN and IIN parameters are referenced to GND. The VO
and IO parameters are relative to VS and are applicable to the respective output HO)
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Unit
POWER SUPPLY SECTION
IQDD
Quiescent VDD Supply Current
VIN = 0 V or 5 V
25
70
μA
IPDD
Operating VDD Supply Current
fIN = 20 kHz,
No Load
35
100
μA
BOOTSTRAPPED SUPPLY SECTION
VBSUV+
VBS Supply Under−Voltage Positive-Going
Threshold Voltage
VBS = Sweep
8.2
9.2
10.2
V
VBSUV−
VBS Supply Under−Voltage Negative−Going
Threshold Voltage
VBS = Sweep
7.5
8.5
9.5
V
VBSHYS
VBS Supply UVLO Hysteresis Voltage
VBS = Sweep
ILK
Offset Supply Leakage Current
VB = VS = 600 V
IQBS
Quiescent VBS Supply Current
VIN = 0 V or 5 V
IPBS
Operating VBS Supply Current
CLOAD = 1 nF,
fIN = 20 kHz,
RMS Value
0.6
V
50
μA
60
120
μA
0.73
2.80
mA
SHUNT REGULATOR SECTION
VSHUNT
VDD and VBS Shunt Regulator Clamping Voltage
ISHUNT = 5 mA
23
25
V
INPUT LOGIC SECTION (IN)
VIH
Logic “1” Input Voltage
2.5
VIL
Logic “0” Input Voltage
IIN+
Logic Input High Bias Current
VIN = 5 V
IIN−
Logic Input Low Bias Current
VIN = 0 V
RIN
Input Pull−down Resistance
V
45
40
0.8
V
125
μA
2
μA
110
kΩ
GATE DRIVER OUTPUT SECTION (HO)
VOH
High Level Output Voltage (VBIAS − VO)
No Load
1.5
V
VOL
Low Level Output Voltage
No Load
35
mV
IO+
Output High, Short−Circuit Pulsed Current (Note 8)
VHO = 0 V,
VIN = 5 V,
PW ≤ 10 μs
3.0
4.0
A
IO−
Output Low, Short−Circuit Pulsed Current (Note 8)
VHO = 15 V,
VIN = 0 V,
PW ≤ 10 μs
3.0
4.0
A
VS
Allowable Negative VS Pin Voltage for IN Signal
Propagation to HO
−9.8
−7.0
V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
8. These parameters guaranteed by design.
Table 5. DYNAMIC ELECTRICAL CHARACTERISTICS
(VBIAS (VDD, VBS) = 15 V, VS = GND = 0 V, CL =1000 pF, and −40°C ≤ TA ≤ 125°C, unless otherwise specified)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
tON
Turn−On Propagation Delay
VS = 0 V
150
210
ns
tOFF
Turn−Off Propagation Delay
VS = 0 V
150
210
ns
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4
FAN7171−F085
Table 5. DYNAMIC ELECTRICAL CHARACTERISTICS (continued)
(VBIAS (VDD, VBS) = 15 V, VS = GND = 0 V, CL =1000 pF, and −40°C ≤ TA ≤ 125°C, unless otherwise specified)
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
tR
Turn−On Rise Time
25
50
ns
tF
Turn−Off Fall Time
15
45
ns
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5
FAN7171−F085
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 4. Turn−On Propagation Delay
vs. Temperature
Figure 5. Turn−Off Propagation Delay
vs. Temperature
Figure 7. Turn−On Rise Time vs.
Temperature
Figure 6. Turn−Off Fall Time vs.
Temperature
Figure 8. Operating VBS Supply Current
vs. Temperature
Figure 9. Operating VDD Supply Current
vs. Temperature
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6
FAN7171−F085
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Figure 10. VBS UVLO+ vs. Temperature
Figure 11. VBS UVLO− vs. Temperature
Figure 13. Logic High Input Voltage vs.
Temperature
Figure 12. Logic Low Input Voltage vs.
Temperature
Figure 15. Input Pull−Down Resistance
vs. Temperature
Figure 14. High−Level output Voltage vs.
Temperature
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7
FAN7171−F085
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Figure 16. Output High, Short−Circuit
Pulsed Current vs. Temperature
Figure 17. Output Low, Short−Circuit
Pulsed Current vs. Temperature
Figure 19. Output High, Short−Circuit
Pulsed Current vs. Supply Voltage
Figure 18. Output Low, Short−Circuit
Pulsed Current vs. Supply Voltage
Figure 20. Quiescent VBS Supply
Current vs. Supply Voltage
Figure 21. Quiescent VDD Supply
Current vs. Supply Voltage
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8
FAN7171−F085
SWITCHING TIME DEFINITIONS
15 V
10 nF
10 mF
1
GND
VDD
VB
10 mF
8
4
6
0.1 mF
15 V
VS
FAN7171_F085
1000 pF
IN
2
7
HO
Figure 22. Switching Time Test Circuit ( Referenced 8−SOIC)
50%
50%
IN
ton
tr
toff
90%
HO − VS
tf
90%
10%
10%
Figure 23. Switching Time Waveform Definitions
Pulse width > 80 ns
Pulse width < 80 ns
IN
HO
Abnormal Output
Figure 24. Output Waveform with Short Turn On Input Pulse Width
IN
Pulse width
> 80 ns
Pulse width
< 80 ns
HO
Abnormal Output
Figure 25. Output Waveform with Short Turn Off Input Pulse Width
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9
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC8
CASE 751EB
ISSUE A
DOCUMENT NUMBER:
DESCRIPTION:
98AON13735G
SOIC8
DATE 24 AUG 2017
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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