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FAN7382
High- and Low-Side Gate Driver
Features
Description
Floating Channels Designed for Bootstrap Operation
The FAN7382, a monolithic high and low side gate-drive
IC, can drive MOSFETs and IGBTs that operate up to
+600V. Fairchild’s high-voltage process and commonmode noise canceling technique provides stable operation of the high-side driver under high-dv/dt noise circumstances. An advanced level-shift circuit allows high-side
gate driver operation up to VS=-9.8V (typical) for
VBS=15V. The input logic level is compatible with standard TTL-series logic gates. UVLO circuits for both channels prevent malfunction when VCC or VBS is lower than
the specified threshold voltage. Output drivers typically
source/sink 350mA/650mA, respectively, which is suitable for fluorescent lamp ballasts, PDP scan drivers,
motor controls, etc.
to +600V
Typically 350mA/650mA Sourcing/Sinking Current
Driving Capability for Both Channels
Common-Mode dv/dt Noise Canceling Circuit
Extended Allowable Negative VS Swing to -9.8V for
Signal Propagation at VCC=VBS=15V
VCC & VBS Supply Range from 10V to 20V
UVLO Functions for Both Channels
TTL Compatible Input Logic Threshold Levels
Matched Propagation Delay Below 50nsec
Output In-phase with Input Signal
Applications
PDP Scan Driver
Fluorescent Lamp Ballast
8-SOP
SMPS
8-DIP
14-SOP
Motor Driver
Ordering Information
Part Number
Package
FAN7382N
8-DIP
FAN7382M
Pb-Free
Operating Temperature Range
Tube
(1)
FAN7382MX(1)
FAN7382M1(1)
(1)
FAN7382M1X
8-SOP
Packing Method
Tube
Yes
14-SOP
-40°C ~ 125°C
Tape & Reel
Tube
Tape & Reel
Note:
1. These devices passed wave soldering test by JESD22A-111.
© 2005 Fairchild Semiconductor Corporation
FAN7382 Rev. 1.0.8
www.fairchildsemi.com
FAN7382 High- and Low-Side Gate Driver
February 2007
FAN7382 High- and Low-Side Gate Driver
Typical Application Circuit
15V
600V
RBOOT
DBOOT
1 VCC
VB 8
Q1
HIN
2
HIN
HO 7
LIN
3 LIN
VS 6
R1
CBOOT
R2
Q2
C1
4 COM
R3
LO 5
Load
R4
FAN7382 Rev.05
Figure 1. Application Circuit for Half-Bridge
Internal Block Diagram
8
VB
7
HO
6
VS
1
VCC
5
LO
4
COM
UVLO
HS(ON/OFF)
500K
NOISE
CANCELLER
R
DRIVER
2
PULSE
GENERATOR
HIN
R
S
Q
UVLO
DELAY
3
DRIVER
LS(ON/OFF)
LIN
500K
FAN7382 Rev.04
Figure 2. Functional Block Diagram
© 2005 Fairchild Semiconductor Corporation
FAN7382 Rev. 1.0.8
www.fairchildsemi.com
2
FAN7382N
FAN7382M
FAN7382M1
VCC
1
8
VB
VCC
1
14
NC
HIN
2
7
HO
HIN
2
13
VB
LIN
3
6
VS
LIN
3
12
HO
COM
4
5
LO
NC
4
11
VS
NC
5
10
NC
COM
6
9
NC
LO
7
8
NC
FAN7382 Rev.05
FAN7382 Rev.01
Figure 3. Pin Configuration (Top View)
Pin Definitions
Name
VCC
Description
Low-Side Supply Voltage
HIN
Logic Input for High-Side Gate Driver Output
LIN
Logic Input for Low-Side Gate Driver Output
COM
Logic Ground and Low-Side Driver Return
LO
Low-Side Driver Output
VS
High-Voltage Floating Supply Return
HO
High-Side Driver Output
VB
High-Side Floating Supply
© 2005 Fairchild Semiconductor Corporation
FAN7382 Rev. 1.0.8
www.fairchildsemi.com
3
FAN7382 High- and Low-Side Gate Driver
Pin Assignments
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only.
Symbol
Characteristics
VS
High-side offset voltage
VB
High-side floating supply voltage
Min.
Max.
VB-25
VB+0.3
-0.3
625
VS-0.3
VB+0.3
VHO
High-side floating output voltage HO
VCC
Low-side and logic fixed supply voltage
-0.3
25
VLO
Low-side output voltage LO
-0.3
VCC+0.3
VIN
Logic input voltage (HIN, LIN)
-0.3
VCC+0.3
VCC-25
VCC+0.3
8-SOP
0.625
14-SOP
1.0
8-DIP
1.2
COM
Logic ground
dVS/dt
Allowable offset voltage slew rate
PD(2)(3)(4)
θJA
50
Power dissipation
Thermal resistance, junction-to-ambient
8-SOP
200
14-SOP
110
8-DIP
100
Unit
V
V/ns
W
°C/W
TJ
Junction temperature
150
°C
TSTG
Storage temperature
150
°C
Notes:
2. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material).
3. Refer to the following standards:
JESD51-2: Integral circuits thermal test method environmental conditions - natural convection
JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages
4. Do not exceed PD under any circumstances.
Recommended Operating Ratings
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
Min.
Max.
VB
High-side floating supply voltage
VS+10
VS+20
VS
High-side floating supply offset voltage
6-VCC
600
VHO
High-side (HO) output voltage
VS
VB
VLO
Low-side (LO) output voltage
COM
VCC
VIN
Logic input voltage (HIN, LIN)
COM
VCC
VCC
Low-side supply voltage
10
20
Ambient temperature
-40
125
TA
© 2005 Fairchild Semiconductor Corporation
FAN7382 Rev. 1.0.8
Unit
V
°C
www.fairchildsemi.com
4
FAN7382 High- and Low-Side Gate Driver
Absolute Maximum Ratings
VBIAS (VCC, VBS)=15.0V, TA = 25°C, unless otherwise specified. The VIN and IIN parameters are referenced to COM.
The VO and IO parameters are referenced to VS and COM and are applicable to the respective outputs HO and LO.
Symbol
Characteristics
Test Condition
Min.
Typ. Max.
VCCUV+
VBSUV+
VCC and VBS supply under-voltage
positive going threshold
8.2
9.2
10.0
VCCUVVBSUV-
VCC and VBS supply under-voltage
negative going threshold
7.6
8.7
9.6
VCCUVH VCC supply under-voltage lockout
VBSUVH hysteresis
Unit
V
0.6
ILK
Offset supply leakage current
VB=VS=600V
IQBS
50
Quiescent VBS supply current
VIN=0V or 5V
45
120
IQCC
Quiescent VCC supply current
VIN=0V or 5V
70
180
IPBS
Operating VBS supply current
fIN=20kHz,rms value
600
IPCC
Operating VCC supply current
fIN=20kHz,rms value
600
VIH
Logic "1" input voltage
µA
µA
2.9
VIL
Logic "0" input voltage
VOH
0.8
High-level output voltage, VBIAS-VO
VOL
Low-level output voltage, VO
IIN+
Logic "1" input bias current
VIN=5V
10
20
IIN-
Logic "0" input bias current
VIN=0V
1.0
2.0
IO+
Output high short-circuit pulsed current
VO=0V, VIN=5V with PW
