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FAN7384
Half-Bridge Gate-Drive IC
Features
Description
Floating Channel for Bootstrap Operation to +600V
The FAN7384 is a monolithic half-bridge gate-drive IC
designed for high voltage, high speed driving MOSFETs
and IGBTs operating up to +600V.
Typically 250mA/500mA Sourcing/Sinking Current
Driving Capability for Both Channels
Extended Allowable Negative VS Swing to -9.8V for
Signal Propagation at VDD=VBS=15V
Matched Propagation Delay Below 50ns
Output In-Phase with Input Signal
3.3V and 5V Input Logic Compatible
Built-in Shoot-Through Prevention Logic
Built-in Common Mode dv/dt Noise Canceling Circuit
Built-in UVLO Functions for Both Channels
Built-in Cycle-by-Cycle Shutdown Function
Built-in Soft-Off Function
Built-in Bi-Directional Fault Function
Built-in Short-Circuit Protection Function
Fairchild’s high-voltage process and common-mode
noise canceling technique provide stable operation of
high-side drivers under high-dv/dt noise circumstances.
An advanced level-shift circuit allows high-side gate
driver operation up to VS = -9.8V (typical) for VBS =15V.
The UVLO circuits prevent malfunction when VDD and
VBS are lower than the specified threshold voltage.
Output drivers typically source/sink 250mA/500mA,
respectively, which is suitable for half-bridge and fullbridge applications in motor drive systems.
14-SOP
Applications
Motor Inverter Driver
Normal Half-Bridge and Full-Bridge Driver
1
Switching Mode Power Supply
Ordering Information
Part Number
Package
FAN7384MX(1)
14-Lead, Small Outline Integrated Circuit (SOIC),
Non-JEDEC, .150 Inch Narrow Body, 225SOP
Operating
Temperature
Range
Packing Method
-40°C to +125°C
Tape & Reel
Note:
1. The device passed wave soldering test by JESD22A-111.
© 2006 Fairchild Semiconductor Corporation
FAN7384 Rev. 1.0.8
www.fairchildsemi.com
FAN7384 — Half-Bridge Gate-Drive IC
July 2012
FAN7384 — Half-Bridge Gate-Drive IC
Typical Application Diagrams
VDC
VCC
VDD
VDD
VB
HO
VDD
HO
HO
U
VS
HIN
LIN
FO
SD
VB
VS
HIN
LIN
FO
SD
FO
SD
LO
CSC
LO
CSC
GND
VSL
VSL
V
FAN7384
U
FAN7384
HIN
LIN
FAN7384
3-Phase
Motor
Controller
UU
UL
VU
UL
WU
WL
VS
W
W
LO
CSC
GND
V
VB
VSL
GND
FAN7384 Rev.03
Figure 1. 3-Phase Motor Drive Application
VDC
VCC
RPULLUP
VDD
VDD
VB
HO
HIN
PHB
FO
FAULT
SHUTDOWN
VS
LIN
HIN
FO
SD
FAN7384
HIN
FAN7384
PHA
VB
HO
VS
Forward
M
Reverse
SD
LO
300K
GND
VSL
LO
300K
CSC
GND
DC Motor
Controller
VSL
CSC
FAN7384 Rev.02
Figure 2. DC Motor Drive Application
© 2006 Fairchild Semiconductor Corporation
FAN7384 Rev. 1.0.8
www.fairchildsemi.com
2
14
VB
13
HO
12
VS
4
VDD
9
LO
8
VSL
5
FO
UVLO
HIN
3
SD
2
R
Q
UVLO
SHOOT-THROUGH
PREVENTION
GND/VSL
LEVEL SHIFTER
LS(ON/OFF)
CONTROL LOGIC
FAULT
LOGIC
DELAY
SOFT-OFF
ISOFT
6
ONE-SHOT
TRIGGER
0.5V
GND
S
SCHMITT
TRIGGER INPUT
VDD_UVLO
CSC
R
DRIVER
1
NOISE
CANCELLER
DRIVER
LIN
PULSE
GENERATOR
HS(ON/OFF)
ONE-SHOT
TRIGGER
VDD_UVLO
7
FAN7384 Rev.03
Figure 3. Functional Block Diagram
© 2006 Fairchild Semiconductor Corporation
FAN7384 Rev. 1.0.8
www.fairchildsemi.com
3
FAN7384 — Half-Bridge Gate-Drive IC
Internal Block Diagram
FAN7384 — Half-Bridge Gate-Drive IC
Pin Configuration
1
14
VB
SD
2
13
HO
HIN
3
12
VS
VDD
4
11
NC
FO
5
10
NC
CSC
6
9
LO
GND
7
8
VSL
FAN7384
LIN
FAN7384 Rev.00
Figure 4. Pin Configuration (Top View)
Pin Definitions
Pin #
Name
Description
1
LIN
Logic Input for low-side gate driver
2
SD
Shutdown control input with active low
3
HIN
Logic Input for high-side gate driver
4
VDD
Low-side power supply voltage
5
FO
Bi-direction fault pin with open drain
6
CSC
Short-circuit current detection input
7
GND
Ground
8
VSL
Low-side supply offset voltage
9
LO
Low-side gate driver output
10
NC
Not connection
11
NC
Not connection
12
VS
High-side floating supply offset voltage
13
HO
High-side gate driver output
14
VB
High-side floating supply voltage
© 2006 Fairchild Semiconductor Corporation
FAN7384 Rev. 1.0.8
www.fairchildsemi.com
4
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. TA=25°C, unless otherwise specified.
Symbol
Parameter
VS
High-side offset voltage VS
VB
High-side floating supply voltage VB
Min.
Max.
Unit
VB-25
VB+0.3
V
-0.3
625
V
VS-0.3
VB+0.3
V
VHO
High-side floating output voltage
VDD
Low-side and logic-fixed supply voltage
-0.3
25
V
VIN
Logic input voltage (HIN, LIN, SD)
-0.3
VDD+0.3
V
VCSC
Current sense input voltage
-0.3
VDD+0.3
V
VFO
Fault output voltage
-0.3
VDD+0.3
V
50
V/ns
dVS/dt
PD(2)(3)(4)
Allowable offset voltage slew rate
Power dissipation
1.0
W
JA
Thermal resistance, junction-to-ambient
110
C/W
TJ
Junction temperature
+150
°C
TS
Storage temperature
+150
°C
-55
Notes:
2. Mounted on 76.2 x 114.3 x 1.6mm PCB (FR-4 glass epoxy material).
3. Refer to the following standards:
JESD51-2: Integral circuits thermal test method environmental conditions - natural convection
JESD51-3: Low effective thermal conductivity test board for leaded surface mount packages
4. Do not exceed PD under any circumstances.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
Condition
Min.
Max.
Unit
VB
High-side floating supply voltage
VS+13
VS+20
V
VS
High-side floating supply offset voltage
6-VDD
600
V
VDD
Supply voltage
13
20
V
VHO
High-side output voltage
VS
VB
V
VLO
Low-side output voltage
GND
VDD
V
VIN
Logic input voltage (HIN, LIN, SD)
GND
VDD
V
VFO
Fault output voltage
-0.3
VDD+0.3
V
TA
Ambient temperature
-40
+125
°C
© 2006 Fairchild Semiconductor Corporation
FAN7384 Rev. 1.0.8
www.fairchildsemi.com
5
FAN7384 — Half-Bridge Gate-Drive IC
Absolute Maximum Ratings
VBIAS (VDD, VBS) = 15.0V, TA = 25C, unless otherwise specified. The VIN and IIN parameters are referenced to GND.
The VO and IO parameters are referenced to VS and GND and are applicable to the respective outputs HO and LO.
Symbol
Characteristics
Condition
Min. Typ. Max. Unit
LOW SIDE POWER SUPPLY SECTION
IQDD
Quiescent VDD supply current
VLIN=0V or 5V
600
800
A
IPDD
Operating VDD supply current
fLIN=20kHz, rms value
950
1300
A
VDDUV+
VDD supply under-voltage positive going
threshold
VDD=Sweep
10.9
11.9
12.9
V
VDDUV-
VDD supply under-voltage negative going
VDD=Sweep
threshold
10.4
11.4
12.4
V
VDDHYS
VDD supply under-voltage lockout
hysteresis
VDD=Sweep
0.5
V
BOOTSTRAPPED POWER SUPPLY SECTION
VBSUV+
VBS supply under-voltage positive going
threshold
VBS=Sweep
10.6
11.5
12.4
V
VBSUV-
VBS supply under-voltage negative going
VBS=Sweep
threshold
10.1
11.0
11.9
V
VBSHYS
VBS supply under-voltage lockout
hysteresis
VBS=Sweep
ILK
Offset supply leakage current
VB=VS=600V
IQBS
Quiescent VBS supply current
VHIN=0V or 5V
50
90
A
IPBS
Operating VBS supply current
fHIN=20kHz, rms value
400
600
A
100
mV
0.5
V
10
A
GATE DRIVER OUTPUT SECTION
VOH
High-level output voltage, VBIAS-VO
IO=0mA (No Load)
VOL
Low-level output voltage, VO
IO=0mA (No Load)
IO+
Output HIGH short-circuit pulse current
VO=0V, VIN=5V with PW
