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FAN73932
半桥栅极驱动 IC
特性
说明
浮动通道可实现高达 +600V 的自举运行
FAN73932 是一款半桥栅极驱动 IC，带关断和死区时间
控制功能，可以驱动工作电压最高可达 +600V 的高速
MOSFET 和 IGBT。它具有缓冲输出级，且所有 NMOS
晶体管设计为具有高脉冲电流驱动能力和最低交叠导通。
2.5A/2.5A 的典型源电流 / 灌电流驱动能力
扩展容许负VS 摆幅至-9.8V，适合VBS=15V的信号传播
高侧输出与 IN 输入信号同相
飞兆的高压工艺和共模噪声消除技术 s 可使高侧驱动器在
高 dv/dt 噪声环境下稳定运行。先进的电平转换电路，能
使高侧栅极驱动器的工作电压在 VBS=15V 时 VS 达到
-9.8V （典型值）。
兼容 3.3V 和 5V 逻辑输入电平
适用于两个通道的匹配传播延迟
内置关断功能
两个通道均内置欠压闭锁 (UVLO) 功能
内置共模 dv/dt 噪声消除电路
UVLO （欠压保护）电路在 VDD 和 VBS 低于额定阙值电
内部最小 400ns 死区时间
压时启动保护防止故障发生。
大电流和低输出压降功能使得此器件适合所有类型的半桥
和全桥逆变器，如电机驱动逆变器、开关电源、感应加热
和大功率 DC-DC 转换器应用。
应用
高速功率 MOSFET 和 IGBT 栅极驱动器
8-SOP
感应加热
大功率 DC-DC 转换器
同步降压转换器
电机驱动逆变器
订购信息
器件编号
FAN73932M
FAN73932MX
封装
工作
温度范围
8-SOP
-40°C 至 +125°C
生态状况
RoHS
包装方法
塑料管
卷带和卷盘
有关飞兆 Eco 状况的定义，请访问：http://www.fairchildsemi.com/company/green/rohs_green.html。
© 2008 飞兆半导体公司
FAN73932 • Rev. 1.0.1
www.fairchildsemi.com
FAN73932 — 半桥栅极驱动 IC
2013 年 11 月
FAN73932 — 半桥栅极驱动 IC
应用电路图
Up to 600V
+15V
PWM
PWM IC
Shutdown
Control
1
IN
VB
8
2
SD
HO
7
3
COM
VS
6
DBOOT
CBOOT
Load
RBOOT
4
LO
VDD
5
+15V
图 1. 典型应用电路
内部框图
8
VB
UVLO
1
200K
NOISE
CANCELLER
R
DRIVER
IN
PULSE
GENERATOR
HS(ON/OFF)
R
S
Q
6
SCHMITT
TRIGGER INPUT
VS
5 VDD
UVLO
5V
7 HO
SHOOT THOUGH
PREVENTION
DEAD-TIME
{ 400ns }
DELAY
LS(ON/OFF)
DRIVER
SD 2
4 LO
3 COM
图 2. 功能框图
© 2008 飞兆半导体公司
FAN73932 • Rev. 1.0.1
www.fairchildsemi.com
FAN73932 — 半桥栅极驱动 IC
引脚布局
1
SD
2
COM
3
LO
4
FAN73932
IN
8
VB
7
HO
6
VS
5
VDD
图 3. 引脚布局 （顶视图）
引脚定义
引脚号
名称
1
IN
高侧和低侧栅极驱动器输出的逻辑输入，与 HO 同相
2
SD
关断逻辑输入
3
COM
4
LO
低侧驱动输出
5
VDD
电源电压
6
VS
高压浮地
7
HO
高侧驱动输出
8
VB
高侧浮动供电
© 2008 飞兆半导体公司
FAN73932 • Rev. 1.0.1
说明
接地
www.fairchildsemi.com
应力超过绝对最大额定值，可能会损坏器件。在超出推荐的工作条件的情况下，该器件可能无法正常工作，所以不建议
让器件在这些条件下长期工作。此外，在远高于推荐的工作条件下工作，会影响器件的可靠性。绝对最大额定值仅是应
力规格值。 TA=25°C，除非另有规定。
符号
参数
最小值
最大值
单位
VB
高侧浮动电源电压
-0.3
625.0
V
VS
高侧浮动偏置电压
VB-25.0
VB+0.3
V
VHO
高侧浮动输出电压
VS-0.3
VB+0.3
V
VLO
低侧输出电压
-0.3
VDD+0.3
V
VDD
低侧和逻辑电源电压
-0.3
25.0
V
VIN
逻辑输入电压 (IN)
-0.3
VDD+0.3
V
VSD
逻辑输入电压 (SD)
-0.3
5.5
V
COM
逻辑接地和低侧驱动器接地
VDD-25.0
VDD+0.3
V
dVS/dt
允许偏置电压变化速率
± 50
V/ns
功耗 (1, 2, 3)
0.625
W
°C/W
PD
θJA
热阻
200
TJ
结温
+150
°C
+150
°C
TSTG
-55
存储温度
注意：
1.
2.
3.
安装到 76.2 x 114.3 x 1.6mm PCB 板 (FR-4 环氧玻璃材料 )。
参考以下标准：
JESD51-2: 集成电路热测试方法环境条件 - 自然对流；
JESD51-3: 含铅表面贴装封装的低有效导热系数测试板。
在任何情况下，都不要超过 PD。
推荐工作条件
推荐的工作条件表明确了器件的真实工作条件。指定推荐的工作条件，以确保器件的最佳性能达到数据表中的规格。
飞兆不建议超出额定或依照绝对最大额定值进行设计。
符号
VB
VS
参数
最小值
最大值
单位
高侧浮动电源电压
VS+10
VS+20
V
高侧浮动电源偏置电压
6-VDD
600
V
高侧输出电压
VS
VB
V
VDD
低侧和逻辑电源电压
10
20
V
VLO
低侧输出电压
COM
VDD
V
VIN
逻辑输入电压 (IN)
COM
VDD
V
VHO
VSD
TA
逻辑输入电压
(SD)(4)
工作环境温度
COM
5
V
-40
+125
°C
注：
4.
关断 (SD) 输入在内部箝位至 5.2V。
© 2008 飞兆半导体公司
FAN73932 • Rev. 1.0.1
www.fairchildsemi.com
FAN73932 — 半桥栅极驱动 IC
绝对最大额定值
除非另有规定，否则 VBIAS(VDD，VBS)=15.0V，COM=0V，以及 TA = 25°C。VIN 和 IIN 参数指的是以 COM 为参考点的
值，同时适用于输入引脚：IN 和 SD。 VO 和 IO 参数指的是以 COM 为参考点的值，同时适用于输出引脚：HO 和 LO。
符号
参数
测试条件
最小值 典型值 最大值 单位
电源部分
IQDD
静态 VDD 电源电流
VIN=0V， SD=5V
320
700
μA
IQBS
静态 VBS 电源电流
VIN=0V 或 5V， SD=5V
50
120
μA
IPDD
工作 VDD 电源电流
fIN=20KHz，无负载，
SD=5V
700
1300
μA
IPBS
工作 VBS 电源电流
CL=1nF, fIN=20KHz， rms，
SD=5V
420
800
μA
ISD
关断模式电源电流
SD=0V, SD=5V
400
800
µA
ILK
偏置漏电流
VB=VS=600V
10
μA
自举电源部分
VDDUV+
VBSUV+
VDD 和 VBS 电源欠压
正向 （电压从高到低）阈值电压
VDD =VBS=Sweep
8
9
10
V
VDDUVVBSUV-
VDD 和 VBS 电源欠压
负向 （电压从低到高）阈值电压
VDD =VBS=Sweep
7.4
8.4
9.4
V
VDDUVH
VBSUVH VDD 和 VBS 电源欠压闭锁滞回电压回差
VDD=VBS=Sweep
0.6
V
输入逻辑部分
VIH
HO 的逻辑 “1” 输入电压和 LO 的逻辑 “0”
VIL
HO 的逻辑 “0” 输入电压和 LO 的逻辑 “1”
IIN+
逻辑输入高偏置电流
VIN=5V, SD=0V
IIN-
逻辑输入低偏置电流
VIN=0V, SD=5V
RIN
逻辑输入下拉电阻
2.5
25
5.0
关断 (SD) 输入负向阈值
RPSD
关断 (SD) 输入上拉电阻
V
60
μA
3
μA
KΩ
5.5
2.5
关断 (SD) 输入正向阈值
SD-
0.8
200
VSDCLAMP 关断 (SD) 输入箝位电压
SD+
V
V
V
0.8
200
V
KΩ
栅极驱动器输出部分
VOH
无负载
1.5
V
低电平输出电压
无负载
100
mV
输出高电平、短路脉冲电流 (5)
VHO=0V, VIN=5V, PW ≤10µs
2.0
2.5
A
IO-
输出低电平、短路脉冲电流 (5)
VHO=15V, VIN=0V, PW
≤10µs
2.0
2.5
A
VS
IN 信号传播到 HO 时允许的 VS 引脚负电
压
VOL
IO+
高电平输出电压 (VBIAS - VO)
-9.8
-7.0
V
注：
5
这些参数由设计保证。
© 2008 飞兆半导体公司
FAN73932 • Rev. 1.0.1
www.fairchildsemi.com
FAN73932 — 半桥栅极驱动 IC
电气特性
除非另有规定，否则 VBIAS(VDD， VBS)=15.0V， COM=0V， CL=1000pF，和 TA=25°C。
符号
参数
tON
导通传播延迟时间
tOFF
关断传播延迟时间
tSD
关断传播延迟时间
(6)
工作条件
最小值 典型值 最大值 单位
VS=0V
600
850
ns
VS=0V
200
350
ns
140
220
ns
50
ns
MtON
延迟匹配， HO 和 LO 导通
0
MtOFF
延迟匹配， HO 和 LO 关断
0
50
ns
tR
开通上升时间
VS=0V
25
50
ns
tF
关断下降时间
VS=0V
20
35
ns
DT
死区时间：LO 关断至 HO 导通和 HO 关断
至 LO 导通
400
500
ns
0
50
ns
MDT
死区时间匹配 =|DTLO-HO - DTHO-LO|
300
注：
6.
导通传播延迟时间包括了死区时间。
© 2008 飞兆半导体公司
FAN73932 • Rev. 1.0.1
www.fairchildsemi.com
FAN73932 — 半桥栅极驱动 IC
动态电气特性
FAN73932 — 半桥栅极驱动 IC
典型特性
280
800
750
240
650
tOFF [ns]
tON [ns]
700
600
550
200
160
120
500
80
450
400
-40
-20
0
20
40
60
80
100
40
-40
120
-20
0
Temperature [°C]
图 4. 导通传播延迟
与温度的关系
40
60
80
100
120
100
120
100
120
图 5. 关断传播延迟
与温度的关系
30
50
40
20
tF [ns]
tR [ns]
20
Temperature [°C]
30
10
20
0
10
0
-40
-20
0
20
40
60
80
100
-10
-40
120
-20
0
40
60
80
图 7. 关断下降时间
与温度的关系
30
30
20
20
MTOFF [ns]
MTON [ns]
图 6. 导通上升时间
与温度的关系
10
0
-10
-20
-40
20
Temperature [°C]
Temperature [°C]
10
0
-10
-20
0
20
40
60
80
100
-20
-40
120
Temperature [°C]
0
20
40
60
80
Temperature [°C]
图 8. 导通延迟匹配与温度的关系
© 2008 飞兆半导体公司
FAN73932 • Rev. 1.0.1
-20
图 9. 关断延迟匹配与温度的关系
www.fairchildsemi.com
7
FAN73932 — 半桥栅极驱动 IC
550
300
500
250
tSD [ns]
DT [ns]
典型特性 （续）
450
200
400
150
350
100
300
-40
-20
0
20
40
60
80
100
50
-40
120
-20
0
Temperature [°C]
20
40
60
80
100
120
100
120
100
120
Temperature [°C]
图 10. 死区时间与温度的关系
图 11. 关断传播延迟
与温度的关系
120
400
IQBS [μA]
IQDD [μA]
100
350
80
60
40
300
20
250
-40
-20
0
20
40
60
80
100
0
-40
120
-20
0
1200
1000
1000
800
800
400
400
200
0
20
40
60
80
100
0
-40
120
80
-20
0
20
40
60
80
Temperature [°C]
Temperature [°C]
图 14. 工作时 VDD 电源电流与温度的关系
© 2008 飞兆半导体公司
FAN73932 • Rev. 1.0.1
60
600
600
-20
40
图 13. 静态 VBS 电源电流
与温度的关系
IPBS [μA]
IPDD [μA]
图 12. 静态 VDD 电源电流与温度的关系
200
-40
20
Temperature [°C]
Temperature [°C]
图 15. 工作 VBS 电源电流
与温度的关系
www.fairchildsemi.com
8
FAN73932 — 半桥栅极驱动 IC
10.0
9.5
9.5
9.0
VDDUV- [V]
VDDUV+ [V]
典型特性 （续）
9.0
8.5
8.0
8.5
8.0
-40
-20
0
20
40
60
80
100
7.5
-40
120
-20
0
图 16.VDD UVLO+ 与温度的关系
40
60
80
100
120
图 17.VDD UVLO- 与温度的关系
10.5
10.0
10.0
9.5
VBSUV- [V]
VBSUV+ [V]
20
Temperature [°C]
Temperature [°C]
9.5
9.0
9.0
8.5
8.0
8.5
7.5
8.0
-40
-20
0
20
40
60
80
100
7.0
-40
120
-20
0
Temperature [°C]
图 18.VBS UVLO+ 与温度的关系
40
60
80
100
120
图 19.VBS UVLO- 与温度的关系
2.0
1.0
1.8
0.8
1.6
0.6
VOL [V]
1.4
VOH [V]
1.2
1.0
0.8
0.4
0.2
0.0
0.6
0.4
-0.2
0.2
-0.4
0.0
-40
20
Temperature [°C]
-20
0
20
40
60
80
100
-40
120
图 20. 高电平输出电压
与温度的关系
© 2008 飞兆半导体公司
FAN73932 • Rev. 1.0.1
-20
0
20
40
60
80
100
120
Temperature [°C]
Temperature [°C]
图 21. 低电平输出电压
与温度的关系
www.fairchildsemi.com
9
FAN73932 — 半桥栅极驱动 IC
典型特性 （续）
3.0
3.0
2.5
VIL [V]
VIH [V]
2.5
2.0
2.0
1.5
1.5
1.0
-40
1.0
-20
0
20
40
60
80
100
0.5
-40
120
-20
0
Temperature [°C]
50
-8
40
-9
30
-10
20
-11
10
-12
-20
0
20
40
60
40
60
80
100
120
100
120
图 23. 逻辑低输入电压
与温度的关系
VS [V]
IIN+ [μA]
图 22. 逻辑高输入电压
与温度的关系
0
-40
20
Temperature [°C]
80
100
-13
-40
120
Temperature [°C]
-20
0
20
40
60
80
Temperature [°C]
图 25. 容许负 VS 电压
与温度的关系
图 24. 逻辑输入高偏置电流
与温度的关系
.
© 2008 飞兆半导体公司
FAN73932 • Rev. 1.0.1
www.fairchildsemi.com
10
FAN73932 — 半桥栅极驱动 IC
开关时间定义
SD
1
IN
VB
8
2
SD
HO
7
+15V
HO
10uF
LO
3
COM
4
LO
VS
6
VDD
5
100nF
1nF
+15V
1nF
10uF
100nF
图 26. 开关时间测试电路
IN
HO
LO
SD
DT1
DT2
DT1
DT2
Shutdown
DT2
Shutdown
DT1
DT1
DT2
图 27. 输入 / 输出时序图
IN
50%
50%
tOFF
tR
tON
tR
90%
90%
LO
10%
10%
tON
tR
90%
90%
HO
10%
tOFF
tF
10%
图 28. 开关时间波形定义
© 2008 飞兆半导体公司
FAN73932 • Rev. 1.0.1
www.fairchildsemi.com
FAN73932 — 半桥栅极驱动 IC
50%
SD
tSD
90%
HO or LO
图 29. 关断波形定义
IN
50%
50%
tOFF
DTHO-LO
90%
LO
10%
DTLO-HO
90%
HO
tOFF
10%
MDT= DTLO-HO - DTHO-LO
图 30. 死区时间波形定义
IN(LO)
50%
50%
50%
50%
IN(HO)
MToff
LO
HO
MTon
10%
90%
90%
10%
图 31. 延迟匹配波形定义
© 2008 飞兆半导体公司
FAN73932 • Rev. 1.0.1
www.fairchildsemi.com
5.00
4.80
A
0.65
3.81
8
5
6.20
5.80
PIN ONE
INDICATOR
B
1.75
4.00
3.80
1
5.60
4
1.27
(0.33)
0.25
M
1.27
CB A
LAND PATTERN RECOMMENDATION
0.25
0.10
SEE DETAIL A
1.75 MAX
R0.10
0.51
0.33
0.50 x 45
0.25
0.10 C
OPTION A - BEVEL EDGE
GAGE PLANE
R0.10
8
0
0.90
0.406
0.25
0.19
C
0.36
OPTION B - NO BEVEL EDG E
NOTES: UNLESS OTHERWI SE SPECIFIED
SEATI NG PLANE
(1.04)
DETAIL A
SCALE: 2: 1
A) THIS PACKAGE CONFORMS TO JEDEC
MS-012, VARIATION AA, ISSUE C,
B) ALL DIMENSIO NS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS.
D) LANDPATTERN STANDARD: SOIC127P600X175-8M.
E) DRAWING FI LENAME: M08AREV13
图 32. 8- 引脚小尺寸封装 (SOP)
封装图纸是作为一项服务而提供给考虑选用飞兆半导体产品的客户。具体参数可能会有变化，且不会做出相应通知。请注意图纸上的版
本和 / 或日期，并联系飞兆半导体代表核实或获得最新版本。封装规格并不超出飞兆公司全球范围内的条款与条件，尤其指保修，保修
涵盖飞兆半导体的全部产品。
随时访问飞兆半导体在线封装网页，可以获取最新的封装图纸：
http://www.fairchildsemi.com/packaging/.
© 2008 飞兆半导体公司
FAN73932 • Rev. 1.0.1
www.fairchildsemi.com
FAN73932 — 半桥栅极驱动 IC
机械尺寸
FAN73932 — 半桥栅极驱动 IC
© 2008 飞兆半导体公司
FAN73932 修订版 1.0.1
www.fairchildsemi.com
14
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