FAN7930BMX-G

Description Features                Additional OVP Detection Pin V IN-Absent Detection Maximum Sw itching Frequency Limitation Internal Soft-Start and Startup w ithout Overshoot Internal Total Harmonic Distortion (THD) Optimizer Precise Adjustable Output Over-Voltage Protection Open-Feedback Protection and Disable Function Zero Current Detector (ZCD) 150 μs Internal Startup Timer MOSFET Over-Current Protection (OCP) Under-Voltage Lockout w ith 3.5 V Hysteresis Low Startup and Operating Current Totem-Pole Output w ith High State Clamp +500/-800 mA Peak Gate Drive Current 8-Pin, Small-Outline Package (SOP) Applications     The FA N7930B is an active pow er factor correction ( PFC) controller for boost PFC applications that operate in critical conduction mode ( CRM). It uses a voltage- mode PWM that c ompares an internal ramp signal w ith the error amplifier output to gener ate a MOSFET turn-off signal. Because the voltage- mode CRM PFC controller does not need rectified A C line voltage infor mation, it saves the pow er loss of an input voltage sensing netw ork necessary for a current- mode CRM PFC controller. Adapter FA N7930B provides over-voltage protection (OV P), open-feedback protection, over-current protection (OCP), input-voltage-absent detection, and undervoltage lockout protection ( UVLO). The additional OV P pin can be used to shut dow n the boost pow er stage when output voltage exceeds OV P level due to the resistors that are connected at INV pin are damaged. The FAN7930B can be disabled if the INV pin voltage is low er than 0.45 V and the operating current decreases to a very low level. Us ing a new variable on-time control method, total har monic distortion (THD) is low er than in conventional CRM boost PFC ICs. Ballast LCD TV, CRT TV Related Resources SMPS http://www.onsemi.com/pub/Collateral/AN-8035.pdf.pdf Ordering Information Part Number Operating Temperature Range Top Mark FAN7930BMX-G -40 to +125°C FAN7930BG © 2010 Semiconductor Components Industries, LLC. September-2017, Rev. 2 Packing Method Package 8-Lead, Small-Outline Package (SOP) Tape & Reel Publication Order Number: FAN7930BMX-G/D FAN7930B — Critical Conduction Mode PFC Controller FAN7930B Critical Conduction Mode PFC Controller FAN7930B — Critical Conduction Mode PFC Controller Application Diagram DC OUTPUT Vcc FAN7930B Line Filter 8 AC INPUT VCC 5 ZCD 3 COMP Out 7 CS 4 INV GND OVP 1 2 6 Figure 1. Typical Boost PFC Application Internal Block Diagram VCC H:open VREF 2.5VREF VBIAS Internal Bias reset ZCD 8 VCC 7 OUT 4 CS 6 GND VZ + Clamp Circuit VCC VTH(S/S) 8.5 12 - 5 VCC + Restart Tmer VTH(ZCD) Gate Driver fMAX Limit THD Optimized Sawtooth Generator Control Range Compensation S Q R Q VO(MAX) + - 40kW Startup without Overshoot + 8pF INV - 1 VREF VREF Stair Step VCS_LIM + Clamp Circuit reset VIN Absent COMP 3 disable disable VREF - 0.35 Thermal Shutdown 0.45 2.5 2.675 + OVP 2 INV_open OVP VOVP,LH disable + - 2.5 Figure 2. 2.88 Functional Block Diagram www.onsemi.com 2 VCC OUT GND ZCD FAN7930BG 8-SOP INV Figure 3. OVP COMP CS Pin Configuration (Top View ) Pin Definitions Pin # Name Description 1 INV This pin is the inverting input of the error amplifier. The output voltage of the boost PFC converter should be resistively divided to 2.5 V. 2 OVP This pin is used to detect PFC output over voltage w hen INV pin information is not correct. 3 COMP This pin is the output of the transconductance error amplifier. Components for the output voltage compensation should be connected betw een this pin and GND. 4 CS This pin is the input of the over-current protection comparator. The MOSFET current is sensed using a sensing resistor and the resulting voltage is applied to this pin. An internal RC filter is included to filter sw itching noise. 5 ZCD This pin is the input of the zero-current detection (ZCD) block. If the voltage of this pin goes higher than 1.5 V, then goes low er than 1.4 V, the MOSFET is turned on. 6 GND This pin is used for the ground potential of all the pins. For proper operation, the signal ground and the pow er ground should be separated. 7 OUT This pin is the gate drive output. The peak sourcing and sinking current levels are +500 mA and -800 mA, respectively. For proper operation, the stray inductance in the gate driving path must be minimized. 8 V CC This is the IC supply pin. IC current and MOSFET drive current are supplied using this pin. www.onsemi.com 3 FAN7930B — Critical Conduction Mode PFC Controller Pin Configuration Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol V CC Parameter Min. Max. VZ V IOH, IOL Peak Drive Output Current -800 +500 mA ICLAMP Driver Output Clamping Diodes V O>V CC or V O