FCH041N60F_F085

MOSFET – N-Channel, SUPERFET II, FRFET 600 V, 76 A, 41 mW FCH041N60F-F085 Description SUPERFET® II MOSFET is ON Semiconductor’s brand−new high voltage super−junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on−resistance and lower gate charge performance. This technology is tailored to minimize conduction loss, provide superior switching performance, dv/dt rate and higher avalanche energy. Consequently SUPERFET II is very well suited for the Soft switching and Hard Switching topologies like High Voltage Full Bridge and Half Bridge DC−DC, Interleaved Boost PFC, Boost PFC for HEV−EV automotive. SUPERFET II FRFET® MOSFET’s optimized body diode reverse recovery performance can remove additional component and improve system reliability. Features • • • • • • www.onsemi.com VDSS RDS(ON) MAX ID MAX 600 V 41 mW 76 A D G Typical RDS(on) = 36 mW at VGS = 10 V, ID = 38 A Typical Qg(tot) = 267 nC at VGS = 10 V, ID = 38 A Low Effective Output Capacitance (Typical Coss(eff.) = 720 nF) 100% Avalanche Tested Qualified to AEC Q101 and PPAP Capable This Device is Pb−Free and is RoHS Compliant Applications S N-Channel MOSFET G • Automotive On Board Charger • Automotive DC/DC Converter for HEV D S TO−247 CASE 340CK MARKING DIAGRAM $Y&Z&3&K FCH 041N60F $Y &Z &3 &K FCH041N60F = ON Semiconductor Logo = Assembly Plant Code = Data Code (Year & Week) = Lot Code = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2015 December, 2020 − Rev. 3 1 Publication Order Number: FCH041N60F−F085/D FCH041N60F−F085 MAXIMUM RATINGS (TC = 25°C, unless otherwise specified) Symbol Ratings Unit VDSS Drain to Source Voltage 600 V VGS Gate to Source Voltage ±20 V 76 A ID Parameter Drain Current − Continuous (VGS = 10) TC = 25°C Pulsed Drain Current See Fig. 4 EAS Single Pulsed Avalanche Rating (Note 1) 2025 mJ dv/dt MOSFET dv/dt 100 V/ns Peak Diode Recovery dv/dt (Note 2) 50 Power Dissipation 595 W Derate Above 25°C 4.76 W/°C −55 to +150 °C PD TJ, TSTG Operating and Storage Temperature (Note 3) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Starting TJ = 25°C, L = 18 mH, IAS = 15 A, VDD = 100 V during inductor charging and VDD = 0 V during time in avalanche. 2. ISD ≤ 38 A, di/dt ≤ 200 A/ms, VDD ≤ 380 V, starting TJ = 25°C. 3. RqJA is the sum of the junction−to−case and case−to−ambient thermal resistance, where the case thermal reference is defined as the solder mounting surface of the drain pins. RqJC is guaranteed by design, while RqJA is determined by the board design. The maximum rating presented here is based on mounting on a 1 in2 pad of 2oz copper. THERMAL CHARACTERISTICS Symbol Parameter RqJC Thermal Resistance, Junction to Case, Max. RqJA Thermal Resistance, Junction to Ambient, Max. Ratings Unit 0.21 _C/W 40 PACKAGE MARKING AND ORDERING INFORMATION Part Number Top Marking Package Reel Size Tape Width Quantity FCH041N60F−F085 FCH041N60F TO−247 − − 30 www.onsemi.com 2 FCH041N60F−F085 ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Parameter Symbol Test Conditions Min Typ Max Unit 600 − − V OFF CHARACTERISTICS BVDSS IDSS IGSS Drain to Source Breakdown Voltage VGS = 0 V, ID = 250 mA Drain to Source Leakage Current VDS = 600 V, VGS = 0 V, TJ = 25_C − − 10 mA VDS = 600 V, VGS = 0 V, TJ = 150_C (Note 4) − − 1 mA VGS = ±20 V − − ±100 nA Gate to Source Leakage Current ON CHARACTERISTICS VGS(th) Gate Threshold Voltage VGS = VDS, ID = 250 mA 3 4 5 V rDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 38 A, TJ = 25_C − 36 41 mW VGS = 10 V, ID = 38 A, TJ = 150_C (Note 4) − 89 98 mW VDS = 100 V, VGS = 0 V, f = 1 MHz − 10900 − pF DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance − 360 − pF Crss Reverse Transfer Capacitance − 4.4 − pF Coss(eff.) Effective Output Capacitance VDS = 0 V to 480 V, VGS = 0 V − 720 − pF Gate Resistance f = 1 MHz − 0.7 − W Total Gate Charge VDD = 380 V, ID = 38 A, VGS = 10 V − 267 347 nC Threshold Gate Charge − 20 26 nC Qgs Gate to Source Gate Charge − 59 − nC Qgd Gate to Drain “Miller” Charge − 106 − nC − − 242 ns − 63 − ns Rise Time − 48 − ns Turn-Off Delay Time − 214 − ns Fall Time − 33 − ns Turn-Off Time − − 514 ns Rg Qg(TOT) Qg(th) SWITCHING CHARACTERISTICS ton td(on) tr td(off) tf toff Turn-On Time Turn-On Delay Time VDD = 380 V, ID = 38 A, VGS = 10 V, RG = 4.7 W DRAIN−SOURCE DIODE CHARACTERISTICS Source to Drain Diode Voltage ISD = 38 A, VGS = 0 V − − 1.2 V trr Reverse Recovery Time − 219 − ns Qrr Reverse Recovery Charge IF = 38 A, dISD/dt = 100 A/ms VDD = 480 V − 1.9 − mC VSD Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. The maximum value is specified by design at TJ = 150°C. Product is not tested to this condition in production. www.onsemi.com 3 FCH041N60F−F085 1.2 ID, DRAIN CURRENT (A) 100 1.0 0.8 0.6 0.4 0.2 0.0 0 25 50 75 100 VGS = 10 V 80 60 40 20 0 125 150 25 50 TC, CASE TEMPERATURE (°C) 75 100 125 150 TC, CASE TEMPERATURE (°C) Figure 1. Normalized Power Dissipation vs. Case Temperature Figure 2. Maximum Continuous Drain Current vs. Case Temperature NORMALIZED THERMAL IMPEDANCE, ZqJC 2 1 0.1 DUTY CYCLE − DESCENDING ORDER D = 0.50 0.20 0.10 0.05 0.02 0.01 PDM t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZqJC x RqJC + TC SINGLE PULSE 0.01 10−5 10−4 10−3 10−2 10−1 t, RECTANGULAR PULSE DURATION (s) Figure 3. Normalized Maximum Transient Thermal Impedance 1000 IDM, PEAK CURRENT (A) POWER DISSIPATION MULTIPLIER TYPICAL CHARACTERISTICS VGS = 10 V MAX PEAK CURRENT LIMITED BY DIE SIZE UPTO 228 A TC = 25°C FOR TEMPERATURES ABOVE 25°C DERATE PEAK CURRENT AS FOLLOWS: I = I2 100 10 ƪǸ 150 * T C 125 ƫ SINGLE PULSE 10−5 10−4 10−3 t, RECTANGULAR PULSE DURATION (s) Figure 4. Peak Current Capability www.onsemi.com 4 10−2 10−1 FCH041N60F−F085 TYPICAL CHARACTERISTICS (continued) 500 100 IAS, AVALANCHE CURRENT (A) ID, DRAIN CURRENT (A) 1000 10 ms 10 100 ms 1 ms OPERATION IN THIS AREA MAY BE LIMITED BY RDS(on) SINGLE PULSE TJ = MAX RATED TC = 25°C 1 0.1 1 10 10 ms 100 ms 100 1000 If R = 0 t AV = (L)(I AS )/(1.3*RATED BVDSS − VDD) If R 00 t AV = (L/R)ln[(I AS *R)/(1.3*RATED BV DSS − VDD) +1] 100 STARTING TJ = 25oC 10 STARTING TJ = 125oC 1 0.001 0.01 VDS, DRAIN TO SOURCE VOLTAGE (V) IS, REVERSE DRAIN CURRENT (A) ID, DRAIN CURRENT (A) PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX VDS = 20 V 160 120 TJ = 150oC 80 TJ = 25oC 40 TJ = −55oC 0 3 4 5 6 7 8 200 TJ = −55oC 1 0.1 0.2 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) VGS 15 V Top 10 V 8V 7V 6V 5.5 V 5 V Bottom 50 3 6 9 12 0.6 0.8 1.0 1.2 Figure 8. Forward Diode Characteristics 200 0 0.4 VSD, BODY DIODE FORWARD VOLTAGE (V) 100 0 1000 TJ = 25 oC 80 m s PULSE WIDTH TJ = 150oC 80 m s PULSE WIDTH TJ = 25oC 150 100 T J = 150 oC 10 Figure 7. Transfer Characteristics 200 10 VGS = 0 V 100 VGS, GATE TO SOURCE VOLTAGE (V) 250 1 Figure 6. Unclamped Inductive Switching Capability Figure 5. Forward Bias Safe Operating Area 200 0.1 tAV, TIME IN AVALANCHE (ms) 15 V Top 10 V 8V 7V 6V 5.5 V 5 V Bottom 100 50 0 15 VGS 150 VDS, DRAIN TO SOURCE VOLTAGE (V) 0 3 6 9 12 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 10. Saturation Characteristics Figure 9. Saturation Characteristics www.onsemi.com 5 15 FCH041N60F−F085 TYPICAL CHARACTERISTICS (continued) PULSE DURATION = 80 m s DUTY CYCLE = 0.5% MAX I D = 38 A 200 NORMALIZED DRAIN TO SOURCE ON−RESISTANCE rDS(on), DRAIN TO SOURCE ON−RESISTANCE (mW) 250 150 T J = 150 oC 100 50 TJ = 25oC 0 5 6 7 8 9 10 3.0 PULSE DURATION = 80 m s DUTY CYCLE = 0.5% MAX 2.5 2.0 1.5 1.0 ID = 38 A VGS = 10 V 0.5 0.0 −80 VGS, GATE TO SOURCE VOLTAGE (V) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE NORMALIZED GATE THRESHOLD VOLTAGE 120 160 200 1.0 0.8 0.6 −40 0 40 80 120 160 200 ID = 5 mA 1.05 1.00 0.95 0.90 −75 −50 −25 TJ, JUNCTION TEMPERATURE (°C) VGS, GATE TO SOURCE VOLTAGE (V) Ciss 1000 Coss 100 f = 1 MHz VGS = 0 V Crss 1 10 100 25 50 75 100 125 150 Figure 14. Normalized Drain to Source Breakdown Voltage vs. Junction Temperature 100000 10000 0 TJ, JUNCTION TEMPERATURE (°C) Figure 13. Normalized Gate Threshold Voltage vs. Temperature CAPACITANCE (pF) 80 1.10 VGS = VDS ID = 250 m A 1 0.1 40 Figure 12. Normalized RDSON vs. Junction Temperature 1.2 10 0 TJ, JUNCTION TEMPERATURE (°C) Figure 11. RDSON vs. Gate Voltage 0.4 −80 −40 1000 10 VDS, DRAIN TO SOURCE VOLTAGE (V) ID = 38 A 8 VDD = 240 V 300 V 360 V 6 4 2 0 0 50 100 150 200 250 300 Qg, GATE CHARGE (nC) Figure 15. Capacitance vs. Drain to Source Voltage Figure 16. Gate Charge vs. Gate to Source Voltage www.onsemi.com 6 FCH041N60F−F085 VGS RL Qg VDS VGS Qgs Qgd DUT IG = Const. Charge Figure 17. Gate Charge Test Circuit & Waveform RL VDS VDS 90% 90% 90% VDD VGS RG VGS DUT VGS 10% td(on) 10% tr tf td(off) ton toff Figure 18. Resistive Switching Test Circuit & Waveforms L E AS + 1 LI AS 2 VDS BVDSS ID IAS RG VDD DUT VGS 2 ID(t) VDD VDS(t) tp tp Figure 19. Unclamped Inductive Switching Test Circuit & Waveforms www.onsemi.com 7 Time FCH041N60F−F085 + DUT VDS − ISD L Driver RG Same Type as DUT VGS − dv/dt controlled by RG − ISD controlled by pulse period D+ VGS (Driver) VDD Gate Pulse Width Gate Pulse Period 10 V IFM, Body Diode Forward Current ISD (DUT) di/dt IRM Body Diode Reverse Current Body Diode Recovery dv/dt VDS (DUT) VDD VSD Body Diode Forward Voltage Drop Figure 20. Peak Diode Recovery dv/dt Test Circuit & Waveforms SUPERFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. FRFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 8 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TO−247−3LD SHORT LEAD CASE 340CK ISSUE A A DATE 31 JAN 2019 A E P1 P A2 D2 Q E2 S B D 1 2 D1 E1 2 3 L1 A1 L b4 c (3X) b 0.25 M (2X) b2 B A M DIM (2X) e GENERIC MARKING DIAGRAM* AYWWZZ XXXXXXX XXXXXXX XXXX = Specific Device Code A = Assembly Location Y = Year WW = Work Week ZZ = Assembly Lot Code *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. DOCUMENT NUMBER: DESCRIPTION: 98AON13851G TO−247−3LD SHORT LEAD A A1 A2 b b2 b4 c D D1 D2 E E1 E2 e L L1 P P1 Q S MILLIMETERS MIN NOM MAX 4.58 4.70 4.82 2.20 2.40 2.60 1.40 1.50 1.60 1.17 1.26 1.35 1.53 1.65 1.77 2.42 2.54 2.66 0.51 0.61 0.71 20.32 20.57 20.82 13.08 ~ ~ 0.51 0.93 1.35 15.37 15.62 15.87 12.81 ~ ~ 4.96 5.08 5.20 ~ 5.56 ~ 15.75 16.00 16.25 3.69 3.81 3.93 3.51 3.58 3.65 6.60 6.80 7.00 5.34 5.46 5.58 5.34 5.46 5.58 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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