MOSFET – Power, N-Channel,
SUPERFET) II, FRFET)
650 V, 76 A, 41 mW
FCH041N65EFLN4
Description
SUPERFET II MOSFET is ON Semiconductor’s brand−new high
voltage super−junction (SJ) MOSFET family that is utilizing charge
balance technology for outstanding low on−resistance and lower gate
charge performance. This advanced technology is tailored to minimize
conduction loss, provides superior switching performance, and
withstand extreme dv/dt rate.
Consequently, SUPERFET II MOSFET is very suitable for the
various power system for miniaturization and higher efficiency.
SUPERFET II FRFET MOSFET’s optimized reverse recovery
performance of body diode can remove additional component and
improve system reliability.
Features
•
•
•
•
•
•
700 V @ TJ = 150°C
Typ. RDS(on) = 36 mW
Ultra Low Gate Charge (Typ. Qg = 229 nC)
Low Effective Output Capacitance (Typ. Coss(eff.) = 631 pF)
100% Avalanche Tested
These Devices are Pb−Free and are RoHS Compliant
Applications
•
•
•
•
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VDSS
RDS(ON) MAX
ID MAX
650 V
41 mW @ 10 V
76 A
D
G
S1: Driver Source
S2: Power Source
S2
S1
POWER MOSFET
D
S2
S1
G
Telecom / Server Power Supplies
Industrial Power Supplies
EV Charger
UPS / Solar
TO−247−4LD
CASE 340CW
MARKING DIAGRAM
$Y&Z&3&K
FCH041
N65EFLN4
$Y
= ON Semiconductor Logo
&Z
= Assembly Plant Code
&3
= Data Code (Year & Week)
&K
= Lot
FCH041N65EFLN4 = Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2018
November, 2019 − Rev. 1
1
Publication Order Number:
FCH041N65EFLN4/D
FCH041N65EFLN4
ABSOLUTE MAXIMUM RATINGS (TC = 25°C, Unless otherwise noted)
Symbol
Parameter
VDSS
Drain to Source Voltage
VGSS
Gate to Source Voltage
ID
Drain Current
IDM
Drain Current
EAS
Single Pulsed Avalanche Energy (Note 2)
IAS
Avalanche Current (Note 2)
EAR
dv/dt
PD
TL
Unit
650
V
− DC
±20
V
− AC (f > 1 Hz)
±30
− Continuous (TC = 25°C)
76
− Continuous (TC = 100°C)
48.1
− Pulsed (Note 1)
A
228
A
2025
mJ
15
A
Repetitive Avalanche Energy (Note 1)
5.95
mJ
MOSFET dv/dt
100
V/ns
Peak Diode Recovery dv/dt (Note 3)
50
Power Dissipation
TJ, TSTG
Value
(TC = 25°C)
595
W
− Derate Above 25°C
4.76
W/°C
−55 to +150
°C
300
°C
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 seconds
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Repetitive rating: pulse width limited by maximum junction temperature.
2. IAS = 15 A, RG = 25 W, starting TJ = 25°C.
3. ISD ≤ 38 A, di/dt ≤ 200 A/ms, VDD ≤ 380 V, starting TJ = 25°C.
THERMAL CHARACTERISTICS
Symbol
Parameter
RqJC
Thermal Resistance, Junction to Case, Max.
RqJA
Thermal Resistance, Junction to Ambient, Max.
Value
Unit
0.21
_C/W
40
PACKAGE MARKING AND ORDERING INFORMATION
Part Number
Top Marking
Package
FCH041N65EFLN4
FCH041N65EFLN4
TO−247 L4
Narrow Lead
Packing
Method
Reel Size
Tape Width
Quantity
Tube
N/A
N/A
30 Units
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
VGS = 0 V, ID = 10 mA, TJ = 25_C
650
−
−
V
VGS = 0 V, ID = 10 mA, TJ = 150_C
700
−
−
V
OFF CHARACTERISTICS
BVDSS
Drain to Source Breakdown Voltage
DBVDSS / DTJ
Breakdown Voltage Temperature
Coefficient
ID = 10 mA, Referenced to 25_C
−
0.72
−
V/_C
IDSS
Zero Gate Voltage Drain Current
VDS = 650 V, VGS = 0 V
−
−
10
mA
VDS = 520 V, TC = 125_C
−
145
−
VGS = ±20 V, VDS = 0 V
−
−
±100
nA
3.0
−
5.0
V
−
36
41
mW
IGSS
Gate to Body Leakage Current
ON CHARACTERISTICS
VGS(th)
Gate Threshold Voltage
VGS = VDS, ID = 7.6 mA
RDS(on)
Static Drain to Source On Resistance
VGS = 10 V, ID = 38 A
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2
FCH041N65EFLN4
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) (continued)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
VDS = 20 V, ID = 38 A
−
71.7
−
S
VDS = 100 V, VGS = 0 V, f = 1 MHz
ON CHARACTERISTICS
gFS
Forward Transconductance
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
−
9446
12560
pF
Coss
Output Capacitance
−
366
490
pF
Crss
Reverse Transfer Capacitance
−
35
−
pF
Coss
Output Capacitance
VDS = 380 V, VGS = 0 V, f = 1 MHz
−
197
−
pF
Effective Output Capacitance
VDS = 0 V to 400 V, VGS = 0 V
−
631
−
pF
Total Gate Charge at 10 V
VDS = 380 V, ID = 38 A, VGS = 10 V
(Note 4)
−
229
298
nC
−
50
−
nC
Coss(eff.)
Qg(tot)
Qgs
Gate to Source Gate Charge
Qgd
Gate to Drain “Miller” Charge
ESR
Equivalent Series Resistance
−
90
−
nC
f = 1 MHz
−
0.6
−
W
VDD = 380 V, ID = 38 A,
VGS = 10 V, Rg = 2 W
(Note 4)
−
55
120
ns
−
25
60
ns
SWITCHING CHARACTERISTICS
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
−
169
348
ns
Turn-Off Fall Time
−
18
46
ns
Maximum Continuous Drain to Source Diode Forward Current
−
−
76
A
ISM
Maximum Pulsed Drain to Source Diode Forward Current
−
−
228
A
VSD
Drain to Source Diode Forward Voltage
VGS = 0 V, ISD = 38 A
−
−
1.2
V
trr
Reverse Recovery Time
−
207
−
ns
Qrr
Reverse Recovery Charge
VGS = 0 V, ISD = 38 A,
dIF/dt = 100 A/ms
−
1.5
−
mC
tf
SOURCE-DRAIN DIODE CHARACTERISTICS
IS
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially independent of operating temperature typical characteristics.
TYPICAL PERFORMANCE CHARACTERISTICS
200
VGS = 20.0 V
10.0 V
8.0 V
7.0 V
100
6.5 V
6.0 V
5.5 V
100
ID, Drain Current (A)
ID, Drain Current (A)
500
10
1
0.1
250 ms Pulse Test
TC = 25°C
1
VDS, Drain−Source Voltage (V)
150°C
25°C
10
1
10
Figure 1. On−Region Characteristics
−55°C
VDS = 20 V
250 ms Pulse Test
3
5
4
6
7
VGS, Gate−Source Voltage (V)
Figure 2. Transfer Characteristics
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3
8
FCH041N65EFLN4
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
1000
100
IS, Reverse Drain Current [A]
RDS(ON) [W],
Drain−Source On−Resistance
0.06
0.05
VGS = 10V
0.04
VGS = 20V
o
150 C
10
1
o
25 C
0.1
*Notes:
1. VGS = 0V
0.01
o
0.03
*Note: TC = 25 C
0
40
80
120
160
ID, Drain Current [A]
200
0.001
0.0
240
2.0
10
VGS, Gate−Source Voltage [V]
100000
Ciss
10000
Capacitances [pF]
0.5
1.0
1.5
VSD, Body Diode Forward Voltage [V]
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current and
Temperature
Figure 3. On−Resistance Variation
vs.Drain Current and Gate Voltage
1000
Coss
100
*Note:
1. VGS = 0V
2. f = 1MHz
10
Crss
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
1
0.1
VDS = 130V
VDS = 325V
8
VDS = 520V
6
4
2
*Note: I D = 38A
1
10
100
VDS, Drain−Source Voltage [V]
0
1000
0
Figure 5. Capacitance Characteristics
1.15
2.5
1.10
2.0
1.05
1.00
0.95
50
100
150
200
Qg, Total Gate Charge [nC]
250
Figure 6. Gate Charge Characteristics
RDS(on), [Normalized]
Drain−Source On−Resistance
BVDSS, [Normalized]
Drain−Source Breakdown Voltage
2. 250 ms Pulse Test
*Notes:
1. V GS = 0V
2. I D = 10mA
0.90
−75 −50 −25 0 25 50 75 100 125 150
o
TJ, Junction Temperature [ C]
1.5
1.0
0.5
*Notes:
1. VGS = 10V
2. I D = 38A
0.0
−75 −50 −25 0 25 50 75 100 125 150
o
TJ, Junction Temperature [ C]
Figure 8. On−Resistance Variation
vs. Temperature
Figure 7. Breakdown Voltage Variation
vs. Temperature
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FCH041N65EFLN4
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
80
500
10m s
100m s
DC
10
1ms
ID, Drain Current [A]
ID, Drain Current [A]
100
Operation in This Area
is Limited by R DS(on)
1
*Notes:
0.1
o
1. TC = 25 C
60
40
20
o
0.01
2. TJ = 150 C
3. Single Pulse
1
10
100
VDS, Drain−Source Voltage [V]
0
25
1000
Figure 9. Maximum Safe Operating Area
50
75
100
125
o
TC, Case Temperature [ C]
Figure 10. Maximum Drain Current
vs. Case Temperature
52.0
31.2
20.8
10.4
0
100 200 300 400 500 600
VDS, Drain to Source Voltage [V]
700
Figure 11. EOSS vs. Drain to Source Voltage
0.5
o
ZqJC(t), Thermal Response [ C/W]
EOSS, [m J]
41.6
0
0.1
0.5
0.2
P DM
0.1
0.01
0.05
t1
0.02
0.01
Single pulse
0.001
−5
10
*Notes:
t2
o
1. Z qJC(t) = 0.21 C/W Max.
2. Duty Factor, D= t 1/t2
3. T JM − TC = PDM * Z qJC(t)
−4
10
−3
150
−2
−1
10
10
10
t1, Rectangular Pulse Duration [sec]
0
10
Figure 12. Transient Thermal Response Curve
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5
1
10
FCH041N65EFLN4
VGS
RL
Qg
VDS
VGS
Qgs
Qgd
DUT
IG = Const.
Charge
Figure 13. Gate Charge Test Circuit & Waveform
RL
VDS
VDS
90%
90%
90%
VDD
VGS
RG
VGS
DUT
VGS
10%
td(on)
10%
tr
td(off)
ton
tf
toff
Figure 14. Resistive Switching Test Circuit & Waveforms
L
E AS + 1 @ LI AS
2
VDS
BVDSS
ID
IAS
RG
VDD
DUT
VGS
2
ID(t)
VDD
VDS(t)
tp
tp
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms
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6
Time
FCH041N65EFLN4
+
DUT
VDS
−
ISD
L
Driver
RG
Same Type
as DUT
VGS
− dv/dt controlled by RG
− ISD controlled by pulse period
D+
VGS
(Driver)
VDD
Gate Pulse Width
Gate Pulse Period
10 V
IFM, Body Diode Forward Current
ISD
(DUT)
di/dt
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VDS
(DUT)
VDD
VSD
Body Diode
Forward Voltage Drop
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
SUPERFET and FRFET are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States
and/or other countries.
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7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−247 4−LEAD, THIN LEADS
CASE 340CW
ISSUE A
DOCUMENT NUMBER:
DESCRIPTION:
98AON80893G
DATE 16 SEP 2019
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
TO−247 4−LEAD, THIN LEADS
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