MOSFET – N-Channel,
SUPERFET) II
600 V, 52 A, 72 mW
FCH072N60
Description
SUPERFET II MOSFET is ON Semiconductor’s brand−new high
voltage super−junction (SJ) MOSFET family that is utilizing charge
balance technology for outstanding low on−resistance and lower gate
charge performance. This advanced technology is tailored to minimize
conduction loss, provide superior switching performance, and
withstand extreme dv/dt rate and higher avalanche energy.
Consequently, SUPERFET II MOSFET is suitable for various AC/DC
power conversion for system miniaturization and higher efficiency.
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VDS
RDS(ON) MAX
ID MAX
600 V
72 mW @ 10 V
52 A
D
Features
•
•
•
•
•
•
Typ. RDS(on) = 66 mW
650 V @ TJ = 150°C
Ultra Low Gate Charge (Typ. Qg = 95 nC)
Low Effective Output Capacitance (Typ. Coss(eff.) = 421 pF)
100% Avalanche Tested
These Devices are Pb−Free and are RoHS Compliant
G
S
N-CHANNEL MOSFET
Applications
• Telecom / Sever Power Supplies
• Industrial Power Supplies
S
D
G
TO−247−3LD
CASE 340CK
MARKING DIAGRAM
$Y&Z&3&K
FCH
072N60
$Y
&Z
&3
&K
FCH072N60
= ON Semiconductor Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2014
November, 2019 − Rev. 3
1
Publication Order Number:
FCH072N60/D
FCH072N60
ABSOLUTE MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Symbol
Parameter
VDSS
Drain to Source Voltage
VGSS
Gate to Source Voltage
ID
Drain Current:
IDM
Drain Current:
EAS
Single Pulsed Avalanche Energy (Note 2)
IAR
FCH072N60
Unit
600
V
− DC
±20
V
− AC (f > 1 Hz)
±30
− Continuous (TC = 25°C)
52
− Continuous (TC = 100°C)
33
156
A
1128
mJ
Avalanche Current (Note 1)
9.5
A
EAR
Repetitive Avalanche Energy (Note 1)
4.8
mJ
dv/dt
MOSFET dv/dt
100
V/ns
Peak Diode Recovery dv/dt (Note 3)
20
PD
TJ, TSTG
TL
− Pulsed (Note 1)
A
Power Dissipation
(TC = 25°C)
481
W
− Derate Above 25°C
3.85
W/°C
−55 to + 150
°C
300
°C
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 seconds
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Repetitive rating: pulse−width limited by maximum junction temperature.
2. IAS = 9.5 A, RG = 25 W, Starting TJ = 25 °C.
3. ISD ≤ 26 A, di/dt ≤ 200 A/ms, VDD ≤ 380 V, Starting TJ = 25 °C.
PACKAGE MARKING AND ORDERING INFORMATION
Part Number
Top Marking
Package
Packing Method
Reel Size
Tape Width
Quantity
FCH072N60
FCH072N60
TO−247
Tube
N/A
N/A
30 Units
THERMAL CHARACTERISTICS
Symbol
Parameter
RqJC
Thermal Resistance, Junction to Case, Max.
RqJA
Thermal Resistance, Junction to Ambient, Max.
FCH072N60
Unit
0.26
°C/W
40
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2
FCH072N60
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
ID = 10 mA, VGS = 0 V, TJ = 25°C
600
−
−
V
ID = 10 mA, VGS = 0 V, TJ = 150°C
650
−
−
OFF CHARACTERISTICS
BVDSS
Drain to Source Breakdown Voltage
DBVDSS
/DTJ
Breakdown Voltage Temperature
Coefficient
ID = 10 mA, Referenced to 25°C
−
0.67
−
V/°C
IDSS
Zero Gate Voltage Drain Current
VDS = 600 V, VGS = 0 V
−
−
1
mA
VDS = 480 V, VGS = 0 V, TC = 125 °C
−
4.1
−
VGS = ±20 V, VDS = 0 V
−
−
±100
nA
2.5
−
3.5
V
IGSS
Gate to Body Leakage Current
ON CHARACTERISTICS
VGS(th)
Gate Threshold Voltage
VGS = VDS, ID = 250 mA
RDS(on)
Static Drain to Source On Resistance
VGS = 10 V, ID = 26 A
−
66
72
mW
Forward Transconductance
VDS = 20 V, ID = 26 A
−
48
−
S
VDS = 380 V, VGS = 0 V, f = 1 MHz
−
4430
5890
pF
gFS
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
Output Capacitance
−
115
155
pF
Crss
Reverse Transfer Capacitance
−
4.43
−
pF
Coss(eff.)
Effective Output Capacitance
VDS = 0 V to 480 V, VGS = 0 V
−
421
−
pF
Total Gate Charge at 10 V
VDS = 380 V, ID = 26 A, VGS = 10 V
(Note 4)
−
95
125
nC
−
21
−
nC
−
24
−
nC
f = 1 MHz
−
0.93
−
W
VDD = 380 V, ID = 26 A,
VGS = 10 V, Rg = 4.7 W
(Note 4)
−
33
76
ns
−
23
56
ns
Qg(tot)
Qgs
Gate to Source Gate Charge
Qgd
Gate to Drain “Miller” Charge
ESR
Equivalent Series Resistance
SWITCHING CHARACTERISTICS
td(on)
Turn-On Delay Time
tr
Turn−On Rise Time
td(off)
Turn-Off Delay Time
−
97
204
ns
Turn−Off Fall Time
−
3.5
17
ns
tf
DRAIN-SOURCE DIODE CHARACTERISTICS
Maximum Continuous Source to Drain Diode Forward Current
−
−
52
A
ISM
Maximum Pulsed Drain to Source Diode Forward Current
−
−
156
A
VSD
Drain to Source Diode Forward Voltage
VGS = 0 V, ISD = 26 A
−
−
1.2
V
trr
Reverse Recovery Time
−
495
−
ns
Qrr
Reverse Recovery Charge
VGS = 0 V, ISD = 26 A,
dIF/dt = 100 A/ms
−
13
−
mC
IS
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially independent of operating temperature.
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3
FCH072N60
TYPICAL CHARACTERISTICS
200
200
VGS = 10.0 V
8.0 V
7.0 V
6.0 V
5.0 V
4.5 V
4.0 V
*Notes:
1. VDS = 20 V
2. 250 ms Pulse Test
100
ID, Drain Current [A]
ID, Drain Current [A]
100
10
o
150 C
o
25 C
10
o
−55 C
*Notes:
1. 250 ms Pulse Test
2. TC = 25°C
1
0.1
1
VDS, Drain−Source Voltage[V]
10
1
20
2
IS, Reverse Drain Current [A]
RDS(on) [W],
Drain−Source On−Resistance
200
100
o
*Note: T C = 25 C
0.12
0.09
0.06
VGS = 10V
VGS = 20V
0
40
80
120
ID, Drain Current [A]
10
o
150 C
1
o
25 C
0.1
0.01
10
VGS, Gate−Source Voltage [V]
Ciss
1000
Coss
100
*Notes:
1. VGS = 0 V
2. f = 1 MHz
10
Ciss = Cgs + Cgd(Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
1
0.3
0.1
1
10
100
VDS, Drain−Source Voltage [V]
0.3
0.6
0.9
1.2
VSD, Body Diode Forward Voltage [V]
1.5
Figure 4. Body Diode Forward Voltage Variation
vs. Source Current and Temperature
100000
Capacitances [pF]
*Notes:
1. VGS = 0 V
2. 250 ms Pulse Test
0.001
0.0
160
Figure 3. On−Resistance Variation vs. Drain
Current and Gate Voltage
10000
7
Figure 2. Transfer Characteristics
Figure 1. On−Region Characteristics
0.15
3
4
5
6
VGS, Gate−Source Voltage[V]
Crss
VDS = 120V
8
VDS = 300V
6
VDS = 480V
4
2
0
600
*Note: I D = 26A
0
20
40
60
80
Qg, Total gate Charge [nC]
100
Figure 6. Gate Charge Characteristics
Figure 5. Capacitance Characteristics
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4
FCH072N60
TYPICAL CHARACTERISTICS
2.5
*Notes:
1. VGS = 0 V
2. ID = 10 mA
1.1
RDS(on) , [Normalized]
Drain−Source On−Resistance
BV DSS, [Normalized]
Drain−Source Breakdown Voltage
1.2
1.0
0.9
0.8
−100
−50
0
50
100
150
o
TJ, Junction Temperature [ C]
*Notes:
1. VGS = 10 V
2. ID = 26 A
2.0
1.5
1.0
0.5
−100
200
−50
0
50
100
150
o
TJ, Junction Temperature [ C]
200
Figure 8. On−Resistance Variation
vs. Temperature
Figure 7. Breakdown Voltage Variation
vs. Temperature
300
60
100
48
100 ms
ID, Drain Current [A]
ID, Drain Current [A]
10 ms
1ms
10
Operation in This Area
is Limited by RDS(on)
1
10ms
DC
*Notes:
1. TC = 25°C
2. TJ = 150°C
3. Single Pulse
0.1
0.1
1
10
100
VDS, Drain−Source Voltage [V]
0
25
1000
Eoss, [mJ ]
24
18
12
6
120
240
360
480
VDS, Drain to Source Voltage [V]
50
75
100
125
o
TC, Case Temperature [ C]
150
Figure 10. Maximum Drain Current
vs. Case Temperature
30
0
24
12
Figure 9. Maximum Safe Operating Area
0
36
600
Figure 11. Eoss vs. Drain to Source Voltage
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5
FCH072N60
TYPICAL CHARACTERISTICS
ZqJC(t), Thermal Response [°C/W]
0.5
0.5
0.1
PDM
0.2
t1
t2
*Notes:
1. ZqJC(t) = 0.26°C/W Max.
2. Duty Factor, D = t1/t2
3. TJM − TC = PDM * ZqJC(t)
0.1
0.05
0.02
0.01
Single pulse
0.01
10−5
10−4
−3
10
10
−2
−1
10
t1, Rectangular Pulse Duration [sec]
Figure 12. Transient Thermal Response Curve
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6
0
10
FCH072N60
VGS
RL
Qg
VDS
VGS
Qgs
Qgd
DUT
IG = Const.
Charge
Figure 13. Gate Charge Test Circuit & Waveform
RL
VDS
VDS
90%
90%
90%
VDD
VGS
RG
VGS
DUT
VGS
10%
td(on)
10%
tr
tf
td(off)
ton
toff
Figure 14. Resistive Switching Test Circuit & Waveforms
L
E AS + 1 @ LI AS
2
VDS
BVDSS
ID
IAS
RG
VDD
DUT
VGS
2
ID(t)
VDD
VDS(t)
tp
tp
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms
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7
Time
FCH072N60
+
DUT
VSD
−
ISD
L
Driver
RG
Same Type
as DUT
VGS
− dv/dt controlled by RG
− ISD controlled by pulse period
D+
VGS
(Driver)
VDD
Gate Pulse Width
Gate Pulse Period
10 V
IFM, Body Diode Forward Current
ISD
(DUT)
di/dt
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VDS
(DUT)
VDD
VSD
Body Diode
Forward Voltage Drop
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
SUPERFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or
other countries.
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8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−247−3LD SHORT LEAD
CASE 340CK
ISSUE A
A
DATE 31 JAN 2019
A
E
P1
P
A2
D2
Q
E2
S
B
D
1
2
D1
E1
2
3
L1
A1
L
b4
c
(3X) b
0.25 M
(2X) b2
B A M
DIM
(2X) e
GENERIC
MARKING DIAGRAM*
AYWWZZ
XXXXXXX
XXXXXXX
XXXX = Specific Device Code
A
= Assembly Location
Y
= Year
WW = Work Week
ZZ
= Assembly Lot Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13851G
TO−247−3LD SHORT LEAD
A
A1
A2
b
b2
b4
c
D
D1
D2
E
E1
E2
e
L
L1
P
P1
Q
S
MILLIMETERS
MIN NOM MAX
4.58 4.70 4.82
2.20 2.40 2.60
1.40 1.50 1.60
1.17 1.26 1.35
1.53 1.65 1.77
2.42 2.54 2.66
0.51 0.61 0.71
20.32 20.57 20.82
13.08
~
~
0.51 0.93 1.35
15.37 15.62 15.87
12.81
~
~
4.96 5.08 5.20
~
5.56
~
15.75 16.00 16.25
3.69 3.81 3.93
3.51 3.58 3.65
6.60 6.80 7.00
5.34 5.46 5.58
5.34 5.46 5.58
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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