FCH104N60F_F085

FCH104N60F_F085

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    TO-247

  • 描述:

    MOSFET N-CH 600V 37A TO247

  • 数据手册
  • 价格&库存
FCH104N60F_F085 数据手册
MOSFET – N-Channel, SUPERFET II, FRFET 600 V, 37 A, 104 mW FCH104N60F-F085 Description SUPERFET® II MOSFET is ON Semiconductor’s brand−new high voltage super−junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on−resistance and lower gate charge performance. This technology is tailored to minimize conduction loss, provide superior switching performance, dv/dt rate and higher avalanche energy. Consequently SUPERFET II is very well suited for the Soft switching and Hard Switching topologies like High Voltage Full Bridge and Half Bridge DC−DC, Interleaved Boost PFC, Boost PFC for HEV−EV automotive. SUPERFET II FRFET® MOSFET’s optimized body diode reverse recovery performance can remove additional component and improve system reliability. www.onsemi.com VDSS RDS(ON) MAX ID MAX 600 V 104 mW 37 A D G Features • • • • • Typical RDS(on) = 91 mW at VGS = 10 V, ID = 18.5 A Typical Qg(tot) = 109 nC at VGS = 10 V, ID = 18.5 A UIS Capability Qualified to AEC Q101 and PPAP Capable This Device is Pb−Free and is RoHS Compliant S N-Channel MOSFET Applications G • Automotive On Board Charger • Automotive DC/DC Converter for HEV D S TO−247 CASE 340CK MARKING DIAGRAM $Y&Z&3&K FCH 104N60F $Y &Z &3 &K FCH104N60F = ON Semiconductor Logo = Assembly Plant Code = Data Code (Year & Week) = Lot Code = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2014 December, 2020 − Rev. 3 1 Publication Order Number: FCH104N60F−F085/D FCH104N60F−F085 MAXIMUM RATINGS (TC = 25°C, unless otherwise specified) Symbol Ratings Unit VDSS Drain to Source Voltage Parameter 600 V VGS Gate to Source Voltage ±20 V 37 24 A ID Drain Current − Continuous (VGS = 10) (Note 1) TC = 25°C TC = 100°C Pulsed Drain Current See Fig. 4 EAS Single Pulsed Avalanche Rating (Note 2) 809 mJ dv/dt MOSFET dv/dt 100 V/ns Peak Diode Recovery dv/dt (Note 3) 50 PD TJ, TSTG Power Dissipation 357 W Derate Above 25°C 2.85 W/°C −55 to +150 °C Operating and Storage Temperature Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Current is limited by bondwire configuration. 2. Starting TJ = 25°C, L = 35 mH, IAS = 6.8 A, VDD = 100 V during inductor charging and VDD = 0 V during time in avalanche. 3. ISD ≤ 18.5 A, di/dt ≤ 200 A/ms, VDD ≤ 380 V, starting TJ = 25°C. 4. RqJA is the sum of the junction−to−case and case−to−ambient thermal resistance, where the case thermal reference is defined as the solder mounting surface of the drain pins. RqJC is guaranteed by design, while RqJA is determined by the board design. The maximum rating presented here is based on mounting on a 1 in2 pad of 2oz copper. THERMAL CHARACTERISTICS Symbol Parameter RqJC Maximum Thermal Resistance, Junction to Case RqJA Maximum Thermal Resistance, Junction to Ambient Ratings Unit 0.35 _C/W 40 PACKAGE MARKING AND ORDERING INFORMATION Device Device Marking Package Reel Size Tape Width Quantity FCH104N60F−F085 FCH104N60F TO−247 − − 30 www.onsemi.com 2 FCH104N60F−F085 ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Parameter Symbol Test Conditions Min Typ Max Unit 600 − − V OFF CHARACTERISTICS BVDSS IDSS IGSS Drain to Source Breakdown Voltage VGS = 0 V, ID = 250 mA Drain to Source Leakage Current VDS = 600 V, VGS = 0 V, TJ = 25_C − − 10 mA VDS = 600 V, VGS = 0 V, TJ = 150_C (Note 5) − − 1 mA VGS = ±20 V − − ±100 nA Gate to Source Leakage Current ON CHARACTERISTICS VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 mA 3 4 5 V rDS(on) Drain to Source On Resistance VGS = 10 V, ID = 18.5 A, TJ = 25_C − 91 104 mW VGS = 10 V, ID = 18.5 A, TJ = 150_C (Note 5) − 217 275 mW VDS = 100 V, VGS = 0 V, f = 1 MHz − 4302 − pF DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance − 134 − pF Crss Reverse Transfer Capacitance − 1.7 − pF Rg Qg(TOT) Gate Resistance f = 1 MHz − 0.49 − W Total Gate Charge VDD = 380 V, ID = 18.5 A, VGS = 10 V − 109 139 nC Threshold Gate Charge − 8 11 nC Qgs Gate to Source Gate Charge − 23 − nC Qgd Gate to Drain “Miller” Charge − 46 − nC − 58 78 ns Qg(th) SWITCHING CHARACTERISTICS ton td(on) tr td(off) tf toff Turn-On Time Turn-On Delay Time VDD = 380 V, ID = 18.5 A, VGS = 10 V, RG = 4.7 W − 35 − ns Rise Time − 23 − ns Turn-Off Delay Time − 94 − ns Fall Time − 5 − ns Turn-Off Time − 98 131 ns DRAIN−SOURCE DIODE CHARACTERISTICS Source to Drain Diode Voltage ISD = 18.5 A, VGS = 0 V − − 1.2 V Trr Reverse Recovery Time − 162 − ns Qrr Reverse Recovery Charge IF = 18.5 A, dISD/dt = 100 A/ms VDD = 480 V − 1223 − nC VSD Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 5. The maximum value is specified by design at TJ = 150°C. Product is not tested to this condition in production. www.onsemi.com 3 FCH104N60F−F085 1.2 ID, DRAIN CURRENT (A) 50 1.0 0.8 0.6 0.4 0.2 0.0 0 25 50 75 100 VGS = 10 V 40 30 20 10 0 125 150 25 50 TC, CASE TEMPERATURE (°C) 75 100 125 150 TC, CASE TEMPERATURE (°C) Figure 1. Normalized Power Dissipation vs. Case Temperature Figure 2. Maximum Continuous Drain Current vs. Case Temperature 2 NORMALIZED THERMAL IMPEDANCE, ZqJC 1 0.1 DUTY CYCLE − DESCENDING ORDER D = 0.50 0.20 0.10 0.05 0.02 0.01 PDM t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZqJC x RqJC + TC SINGLE PULSE 0.01 10−5 10−3 10−4 10−2 10−1 100 101 t, RECTANGULAR PULSE DURATION (s) Figure 3. Normalized Maximum Transient Thermal Impedance 1000 VGS = 10 V IDM, PEAK CURRENT (A) POWER DISSIPATION MULTIPLIER TYPICAL CHARACTERISTICS TC = 25°C FOR TEMPERATURES ABOVE 25°C DERATE PEAK CURRENT AS FOLLOWS: I = I2 100 SINGLE PULSE 10 10−5 10−4 10−3 t, RECTANGULAR PULSE DURATION (s) Figure 4. Peak Current Capability www.onsemi.com 4 10−2 ƪǸ 150 * T C 125 ƫ 10−1 FCH104N60F−F085 TYPICAL CHARACTERISTICS (continued) 150 100 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 1000 10 ms 10 100 ms 1 OPERATION IN THIS AREA MAY BE LIMITED BY RDS(on) 0.1 1 ms 10 ms SINGLE PULSE TJ = MAX RATED TC = 25°C 100 ms 120 90 TJ = 150°C 60 10 100 TJ = 25°C 30 TJ = −55°C 0.01 1 PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX VDS = 20 V 0 1000 3 4 5 6 7 8 VGS, GATE TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 6. Transfer Characteristics 100 VGS = 0 V 100 ID, DRAIN CURRENT (A) IS, REVERSE DRAIN CURRENT (A) Figure 5. Forward Bias Safe Operating Area 200 10 TJ = 150°C TJ = −55°C TJ = 25°C 1 0.1 0.0 0.2 0.4 0.6 0.8 1.0 1.2 80 VGS 60 15 V Top 10 V 8V 7V 6V 5.5V 5 V Bottom 40 20 0 1.4 80 ms PULSE WIDTH TJ = 25°C 5V 0 VGS rDS(on), DRAIN TO SOURCE ON−RESISTANCE (mW) ID, DRAIN CURRENT (A) 500 80 ms PULSE WIDTH TJ = 25°C 15 V Top 10 V 8V 7V 6V 5.5 V 5V Bottom 40 30 20 10 0 5V 0 4 8 12 16 8 12 16 20 Figure 8. Forward Diode Characteristics Figure 7. Forward Diode Characteristics 50 4 VDS, DRAIN TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) 60 9 ID = 18.5 A PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX 400 300 TJ = 150°C 200 100 TJ = 25°C 0 20 VDS, DRAIN TO SOURCE VOLTAGE (V) 0 5 6 7 8 9 VGS, DRAIN TO SOURCE VOLTAGE (V) Figure 10. RDSON vs. Gate Voltage Figure 9. Saturation Characteristics www.onsemi.com 5 10 FCH104N60F−F085 3.0 2.5 1.2 PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX NORMALIZED GATE THRESHOLD VOLTAGE NORMALIZED DRAIN TO SOURCE ON−RESISTANCE TYPICAL CHARACTERISTICS (continued) 2.0 1.5 1.0 ID = 18.5 A VGS = 10 V 0.5 0.0 −80 −40 0 40 80 120 160 1.0 0.9 0.8 0.7 0.6 200 VGS = VDS ID = 250 mA 1.1 −80 0 40 80 120 160 200 Figure 12. Normalized Gate Threshold Voltage vs. Temperature Figure 11. Normalized RDSON vs. Junction Temperature 1.15 100000 ID = 10 mA 1.10 CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE −40 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) 1.05 1.00 0.95 Ciss 10000 1000 Coss 100 10 0.90 Crss 1 0.85 −80 −40 0 40 80 120 160 f = 1 MHz VGS = 0 V 0 0.1 200 TJ, JUNCTION TEMPERATURE (°C) 1 10 100 1000 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 13. Normalized Drain to Source Breakdown Voltage vs. Junction Temperature Figure 14. Capacitance vs. Drain to Source Voltage 10 ID = 18.5 A 8 16 VDS = 240 V VDS = 300 V VDS = 360 V Eoss, (mJ) VGS, GATE TO SOURCE VOLTAGE (V) 20 6 12 8 4 4 2 0 0 30 60 90 0 120 Qg, GATE CHARGE (nC) 0 100 200 300 400 500 600 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 16. Eoss vs. Drain to Source Voltage Figure 15. Gate Charge vs. Gate to Source Voltage www.onsemi.com 6 FCH104N60F−F085 VGS RL Qg VDS VGS Qgs Qgd DUT IG = Const. Charge Figure 17. Gate Charge Test Circuit & Waveform RL VDS VDS 90% 90% 90% VDD VGS RG VGS DUT VGS 10% td(on) 10% tr tf td(off) ton toff Figure 18. Resistive Switching Test Circuit & Waveforms L E AS + 1 LI AS 2 VDS BVDSS ID IAS RG VDD DUT VGS 2 ID(t) VDD VDS(t) tp tp Figure 19. Unclamped Inductive Switching Test Circuit & Waveforms www.onsemi.com 7 Time FCH104N60F−F085 + DUT VDS − ISD L Driver RG Same Type as DUT VGS − dv/dt controlled by RG − ISD controlled by pulse period D+ VGS (Driver) VDD Gate Pulse Width Gate Pulse Period 10 V IFM, Body Diode Forward Current ISD (DUT) di/dt IRM Body Diode Reverse Current Body Diode Recovery dv/dt VDS (DUT) VDD VSD Body Diode Forward Voltage Drop Figure 20. Peak Diode Recovery dv/dt Test Circuit & Waveforms SUPERFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. FRFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 8 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TO−247−3LD SHORT LEAD CASE 340CK ISSUE A A DATE 31 JAN 2019 A E P1 P A2 D2 Q E2 S B D 1 2 D1 E1 2 3 L1 A1 L b4 c (3X) b 0.25 M (2X) b2 B A M DIM (2X) e GENERIC MARKING DIAGRAM* AYWWZZ XXXXXXX XXXXXXX XXXX = Specific Device Code A = Assembly Location Y = Year WW = Work Week ZZ = Assembly Lot Code *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. DOCUMENT NUMBER: DESCRIPTION: 98AON13851G TO−247−3LD SHORT LEAD A A1 A2 b b2 b4 c D D1 D2 E E1 E2 e L L1 P P1 Q S MILLIMETERS MIN NOM MAX 4.58 4.70 4.82 2.20 2.40 2.60 1.40 1.50 1.60 1.17 1.26 1.35 1.53 1.65 1.77 2.42 2.54 2.66 0.51 0.61 0.71 20.32 20.57 20.82 13.08 ~ ~ 0.51 0.93 1.35 15.37 15.62 15.87 12.81 ~ ~ 4.96 5.08 5.20 ~ 5.56 ~ 15.75 16.00 16.25 3.69 3.81 3.93 3.51 3.58 3.65 6.60 6.80 7.00 5.34 5.46 5.58 5.34 5.46 5.58 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2018 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. 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