MOSFET – N-Channel,
SUPERFET), FRFET)
600 V, 47 A, 73 mW
FCH47N60F
Description
SUPERFET MOSFET is ON Semiconductor’s first generation of
high voltage super−junction (SJ) MOSFET family that is utilizing
charge balance technology for outstanding low on−resistance
and lower gate charge performance. This technology is tailored to
minimize conduction loss, provide superior switching
performance,dv/dt rate and higher avalanche energy. Consequently,
SUPERFET MOSFET is very suitable for the switching power
applications such as PFC, server / telecom power, FPD TV power,
ATX power and industrial power applications. SUPERFET FRFET
MOSFET’s optimized body diode reverse recovery performance can
remove additional component and improve system reliability.
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VDS
RDS(ON) MAX
ID MAX
600 V
73 mW @ 10 V
47 A
D
G
Features
•
•
•
•
•
•
S
650 V @ TJ = 150°C
Typ. RDS(on) = 58 mW
Ultra Low Gate Charge (Typ. Qg = 210 nC)
Low Effective Output Capacitance (Typ. Cosseff. = 420 pF)
100% Avalanche Tested
These Devices are Pb−Free and are RoHS Compliant
N-CHANNEL MOSFET
S
D
G
Applications
• Solar Inventer
• AC−DC Power Supply
TO−247−3LD
CASE 340CK
MARKING DIAGRAM
$Y&Z&3&K
FCH
47N60F
$Y
&Z
&3
&K
FCH47N60F
= ON Semiconductor Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2014
December, 2019 − Rev. 4
1
Publication Order Number:
FCH47N60F/D
FCH47N60F
ABSOLUTE MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Symbol
VDSS
Parameter
FCH47N60F−F133
Unit
600
V
Drain to Source Voltage
ID
Drain Current −
−Continuous (TC = 25°C)
−Continuous (TC = 100°C)
47
29.7
A
A
Drain Current
−Pulsed (Note 1)
141
A
Gate−Source Voltage
±30
V
EAS
Single Pulsed Avalanche Energy (Note 2)
1800
mJ
IAR
Avalanche Current (Note 1)
47
A
EAR
Repetitive Avalanche Energy (Note 1)
41.7
mJ
dv/dt
Peak Diode Recovery dv/dt (Note 3)
50
V/ns
417
3.33
W
W/°C
IDM
VGSS
PD
Power Dissipation
TJ, TSTG
TL
(TC = 25°C)
−Derate Above 25°C
Operating and Storage Temperature Range
−55 to + 150
°C
300
°C
Maximum Lead Temperature for Soldering Purpose, ⅛ from Case for 5 second
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Repetitive Rating: Pulse width limited by maximum junction temperature.
2. IAS = 18 A, VDD = 50 V, RG = 25 W, Starting TJ = 25 °C
3. ISD ≤ 47 A, di/dt ≤ 1200 A/ms, VDD ≤ BVDSS, Starting TJ = 25 °C.
PACKAGE MARKING AND ORDERING INFORMATION
Device Marking
Device
Package
Reel Size
Tape Width
Quantity
FCH47N60F
FCH47N60F−F133
TO−247−3
−
−
30 Units
THERMAL CHARACTERISTICS
Symbol
Parameter
Value
Unit
°C/W
RqJC
Thermal Resistance, Junction to Case, Max.
0.3
RqJA
Thermal Resistance, Junction to Ambient, Max. (Note 34)
41.7
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2
FCH47N60F
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
ID = 250 mA, VGS = 0 V, TJ = 25°C
600
−
−
V
ID = 250 mA, VGS = 0 V, TJ = 150°C
−
650
−
V
Breakdown Voltage Temperature
Coefficient
ID = 250 mA, Referenced to 25°C
−
0.6
−
V/°C
BVDS
Drain−Source Avalanche Breakdown
Voltage
ID = 47 A, VGS = 0 V
−
700
−
V
IDSS
Zero Gate Voltage Drain Current
VDS = 600 V, VGS = 0 V
−
−
10
mA
VDS = 480 V, TC = 125°C
−
−
100
mA
OFF CHARACTERISTICS
BVDSS
DBVDSS
/ DTJ
Drain to Source Breakdown Voltage
IGSSF
Gate−Body Leakage Current, Forward
VGS = 30 V, VDS = 0 V
−
−
100
nA
IGSSR
Gate−Body Leakage Current, Reverse
VGS = −30 V, VDS = 0 V
−
−
−100
nA
ON CHARACTERISTICS
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 mA
3
−
5
V
RDS(on)
Static Drain−Source On−Resistance
VGS = 10 V, ID = 23.5 A
−
0.062
0.073
W
Forward Transconductance
VDS = 40 V, ID = 23.5 A
−
40
−
S
VDS = 25 V, VGS = 0 V,
f = 1 MHz
−
5900
8000
pF
−
3200
4200
pF
gFS
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
−
250
−
pF
Coss
Output Capacitance
VDS = 480 V, VGS = 0 V,
f = 1 MHz
−
160
−
pF
Effective Output Capacitance
VDS = 0 V to 400 V, VGS = 0 V
−
420
−
pF
VDD = 300 V, ID = 47 A,
RG = 25 W
(Note 4)
−
185
430
ns
−
210
450
ns
Cosseff.
SWITCHING CHARACTERISTICS
td(on)
Turn-On Delay Time
tr
Turn−On Rise Time
td(off)
Turn-Off Delay Time
−
520
1100
ns
tf
Turn−Off Fall Time
−
75
160
ns
−
210
270
nC
−
38
−
nC
−
110
−
nC
Maximum Continuous Drain−Source Diode Forward Current
−
−
47
A
ISM
Maximum Pulsed Drain−Source Diode Forward Current
−
−
141
A
VSD
Source to Drain Diode Voltage
VGS = 0 V, IS = 47 A
−
−
1.4
V
trr
Reverse Recovery Time
−
240
−
ns
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 47 A,
dIF/dt = 100 A/ms
−
2.04
−
mC
Qg
Total Gate Charge
Qgs
Gate−Source Charge
Qgd
Gate−Drain Charge
VDS = 480 V, ID = 47 A,
VGS = 10 V
(Note 4)
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
IS
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Essentially Independent of Operating Temperature Typical Characteristics.
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3
FCH47N60F
TYPICAL CHARACTERISTICS
101
Bottom:
ID, Drain Current [A]
ID, Drain Current [A]
VGS
15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
Top:
102
*Notes:
1. 250 ms Pulse Test
2. TC = 25°C
100
10−1
102
150°C
25°C
101
−55°C
*Notes:
1. VDS = 40 V
2. 250 ms Pulse Test
100
2
100
101
VDS, Drain−Source Voltage [V]
4
6
8
VGS, Gate−Source Voltage [V]
10
Figure 2. Transfer Characteristics
Figure 1. On−Region Characteristics
IDR, Reverse Drain Current [A]
RDS(ON) [W],
Drain−Source On−Resistance
0.25
0.20
VGS = 10 V
0.15
0.10
VGS = 20 V
0.05
*Note: TJ = 25°C
0.00
0
20
40
60
102
101
150°C
*Notes:
1. VGS = 0 V
2. 250 ms Pulse Test
100
0.2
80 100 120 140 160 180 200
ID, Drain Current [A]
VGS, Gate−Source Voltage [V]
Capacitance [pF]
Coss
15000
Ciss
10000
5000
0
*Notes:
1. VGS = 0 V
2. f = 1 MHz
Crss
10−1
100
0.6
0.8
1.0
1.2
1.4
VSD, Source−Drain Voltage [V]
1.6
12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
20000
0.4
Figure 4. Body Diode Forward Voltage Variation
vs. Source Current and Temperature
Figure 3. On−Resistance Variation vs. Drain Current
and Gate voltage
25000
25°C
VDS = 250 V
VDS = 400 V
8
6
4
2
0
101
VDS = 100 V
10
*Note: ID = 47 A
0
50
100
150
QG, Total Charge [nC]
VDS, Drain−Source Voltage [V]
200
Figure 6. Gate Charge Characteristics
Figure 5. Capacitance Characteristics
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4
250
FCH47N60F
3.0
1.2
RDS(ON), (Normalized)
Drain−Source On−Resistance
BVDSS, (Normalized)
Drain−Source Breakdown Voltage
TYPICAL CHARACTERISTICS
1.1
1.0
*Notes:
1. VGS = 0 V
2. ID = 250 mA
0.9
0.8
−100
−50
0
50
100
150
TJ, Junction Temperature [°C]
2.5
2.0
1.5
1.0
*Notes:
1. VGS = 10 V
2. ID = 23.5 A
0.5
0.0
200
−100
−50
Figure 7. Breakdown Voltage Variation
vs. Temperature
ID, Drain Current [A]
100 ms
1 ms
101
10 ms
DC
*Notes:
1. TC = 25°C
2. TJ = 150°C
3. Single Pulse
101
102
VDS, Drain−Source Voltage [V]
150
200
40
30
20
10
0
25
103
D = 0.5
0.2
0.1
P
DM
0.05
0.02
0.01
10−5
75
100
125
TC, Case Temperature [°C]
*Notes:
1. ZqJC(t) = 0.3°C/W Max
2. Duty Factor, D = t1/t2
3. TJM − TC = PDM * ZqJC(t)
10−1
10−2
50
Figure 10. Maximum Drain Current
vs. Case Temperature
Figure 9. Safe Operating Area
ZqJC(t), Thermal Response [°C/W]
ID, Drain Current [A]
100
50
102
10−1
100
50
Figure 8. On−Resistance Variation
vs. Temperature
Operation in This Area
is Limited by RDS(on)
100
0
TJ, Junction Temperature [°C]
t1
t2
Single Pulse
10−4
10−3
10−2
10−1
100
t1, Square Wave Pulse Duration [sec]
Figure 11. Transient Thermal Response Curve
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5
101
150
FCH47N60F
VGS
RL
Qg
VDS
VGS
Qgs
Qgd
DUT
IG = Const.
Charge
Figure 12. Gate Charge Test Circuit & Waveform
RL
VDS
VDS
90%
90%
90%
VDD
VGS
RG
VGS
DUT
VGS
10%
td(on)
10%
tr
tf
td(off)
ton
toff
Figure 13. Resistive Switching Test Circuit & Waveforms
L
E AS + 1 @ LI AS
2
VDS
BVDSS
ID
IAS
RG
VDD
DUT
VGS
BV DSS
BV DSS * V DD
2
ID(t)
VDD
VDS(t)
tp
tp
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
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6
Time
FCH47N60F
+
DUT
VSD
−
ISD
L
Driver
RG
Same Type
as DUT
VGS
− dv/dt controlled by RG
− ISD controlled by pulse period
D+
VGS
(Driver)
VDD
Gate Pulse Width
Gate Pulse Period
10 V
IFM, Body Diode Forward Current
ISD
(DUT)
di/dt
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VDS
(DUT)
VDD
VSD
Body Diode
Forward Voltage Drop
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
SUPERFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or
other countries.
FRFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other
countries.
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7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−247−3LD SHORT LEAD
CASE 340CK
ISSUE A
A
DATE 31 JAN 2019
A
E
P1
P
A2
D2
Q
E2
S
B
D
1
2
D1
E1
2
3
L1
A1
L
b4
c
(3X) b
0.25 M
(2X) b2
B A M
DIM
(2X) e
GENERIC
MARKING DIAGRAM*
AYWWZZ
XXXXXXX
XXXXXXX
XXXX = Specific Device Code
A
= Assembly Location
Y
= Year
WW = Work Week
ZZ
= Assembly Lot Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13851G
TO−247−3LD SHORT LEAD
A
A1
A2
b
b2
b4
c
D
D1
D2
E
E1
E2
e
L
L1
P
P1
Q
S
MILLIMETERS
MIN NOM MAX
4.58 4.70 4.82
2.20 2.40 2.60
1.40 1.50 1.60
1.17 1.26 1.35
1.53 1.65 1.77
2.42 2.54 2.66
0.51 0.61 0.71
20.32 20.57 20.82
13.08
~
~
0.51 0.93 1.35
15.37 15.62 15.87
12.81
~
~
4.96 5.08 5.20
~
5.56
~
15.75 16.00 16.25
3.69 3.81 3.93
3.51 3.58 3.65
6.60 6.80 7.00
5.34 5.46 5.58
5.34 5.46 5.58
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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