FCH47N60_F085

MOSFET – N-Channel 600 V, 47 A, 79 mW FCH47N60-F085 Description SUPERFET® is ON Semiconductor’s proprietary new generation of high voltage MOSFETs utilizing an advanced charge balance mechanism for outstanding low on−resistance and lower gate charge performance. This advanced technology has been tailored to minimize conduction loss, provide superior switching performance, and withstand extreme dv/dt rate and higher avalanche energy. Consequently, SUPERFET is suitable for various automotive DC/DC power conversion. www.onsemi.com VDSS RDS(ON) MAX ID MAX 600 V 79 mW 47 A D Features • • • • • Typical rDS(on) = 64 mW at VGS = 10 V, ID = 47 A Typical Qg(tot) = 187 nC at VGS = 10 V, ID = 47 A UIS Capability Qualified to AEC Q101 and PPAP Capable This Device is Pb−Free and is RoHS Compliant G S Applications N-Channel MOSFET • Automotive On Board Charger • Automotive DC/DC Converter for HEV G D S TO−247 CASE 340CK MARKING DIAGRAM $Y&Z&3&K FCH 47N60 $Y &Z &3 &K FCH47N60 = ON Semiconductor Logo = Assembly Plant Code = Data Code (Year & Week) = Lot Code = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2013 December, 2020 − Rev. 4 1 Publication Order Number: FCH47N60−F085/D FCH47N60−F085 MAXIMUM RATINGS (TC = 25°C, unless otherwise specified) Symbol Ratings Unit VDSS Drain to Source Voltage Parameter 600 V VGS Gate to Source Voltage ±30 V A ID Drain Current − Continuous (VGS = 10) (Note 1) TC = 25°C 47 Pulsed Drain Current TC = 25°C See Fig. 4 EAS Single Pulsed Avalanche Rating (Note 2) 810 PD Power Dissipation 417 W Derate above 25°C 3.3 W/°C −55 to +150 °C TJ, TSTG Operating and Storage Temperature mJ Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Current is limited by bondwire configuration. 2. Starting TJ = 25°C, L = 5 mH, IAS = 18 A, VDD = 100 V during inductor charging and VDD = 0 V during time in avalanche. 3. RqJA is the sum of the junction−to−case and case−to−ambient thermal resistance, where the case thermal reference is defined as the solder mounting surface of the drain pins. RqJC is guaranteed by design, while RqJA is determined by the board design. The maximum rating presented here is based on mounting on a 1 in2 pad of 2oz copper. THERMAL CHARACTERISTICS Symbol Parameter Ratings Unit _C/W RqJC Thermal Resistance Junction to Case 0.3 RqJA Maximum Thermal Resistance Junction to Ambient (Note 3) 50 PACKAGE MARKING AND ORDERING INFORMATION Device Device Marking Package Reel Size Tape Width Quantity FCH47N60−F085 FCH47N60 TO−247−3LD − − 30 Units www.onsemi.com 2 FCH47N60−F085 ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Parameter Symbol Test Conditions Min Typ Max Unit 600 − − V OFF CHARACTERISTICS BVDSS IDSS IGSS Drain to Source Breakdown Voltage VGS = 0 V, ID = 250 mA Drain to Source Leakage Current VDS = 600 V, VGS = 0 V, TJ = 25_C − − 1 mA VDS = 600 V, VGS = 0 V, TJ = 150_C (Note 4) − − 1 mA VGS = ±30 V − − ±100 nA Gate to Source Leakage Current ON CHARACTERISTICS VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 mA 3 4 5 V rDS(on) Drain to Source On Resistance VGS = 10 V, ID = 47 A, TJ = 25_C − 64 79 mW VGS = 10 V, ID = 47 A, TJ = 150_C (Note 4) − 180 223 mW VDS = 25 V, VGS = 0 V, f = 1 MHz − 5900 8000 pF DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance − 3200 4200 pF Crss Reverse Transfer Capacitance − 177 − pF Rg Gate Resistance f = 1 MHz − 1 − W Total Gate Charge at 10 V VGS = 0 to 10 V, VDD = 300 V, ID = 47 A − 187 250 nC Threshold Gate Charge VGS = 0 to 2 V, VDD = 300 V, ID = 47 A − 12 18 nC Qgs Gate to Source Gate Charge VDD = 300 V, ID = 47 A − 40 − nC Qgd Gate to Drain “Miller” Charge − 81 − nC − − 410 ns Qg(TOT) Qg(th) SWITCHING CHARACTERISTICS ton td(on) tr td(off) tf toff Turn-On Time Turn-On Delay Time VDD = 380 V, ID = 47 A, VGS = 10 V, RG = 25 W − 110 − ns Rise Time − 160 − ns Turn-Off Delay Time − 540 − ns Fall Time − 125 − ns Turn-Off Time − − 1000 ns ISD = 47 A, VGS = 0 V − − 1.4 V ISD = 23.5 A, VGS = 0 V − − 1.25 V IF = 47 A, dISD/dt = 100 A/ms, VDD = 480 V − 683 800 ns − 21 28 mC DRAIN−SOURCE DIODE CHARACTERISTICS VSD Source to Drain Diode Voltage Trr Reverse Recovery Time Qrr Reverse Recovery Charge Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. The maximum value is specified by design at TJ = 150°C. Product is not tested to this condition in production. www.onsemi.com 3 FCH47N60−F085 1.2 50 VGS = 10 V 1.0 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER TYPICAL CHARACTERISTICS 0.8 0.6 0.4 0.2 0.0 0 25 50 75 100 125 40 30 20 10 0 150 25 50 TC, CASE TEMPERATURE (°C) 75 100 125 150 TC, CASE TEMPERATURE (°C) Figure 2. Maximum Continuous Drain Current vs. Case Temperature Figure 1. Normalized Power Dissipation vs. Case Temperature 2 NORMALIZED THERMAL IMPEDANCE, ZqJC 1 DUTY CYCLE − DESCENDING ORDER D = 0.50 0.20 0.10 0.05 0.02 0.01 0.1 PDM t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZqJC x RqJC + TC SINGLE PULSE 0.01 10−5 10−4 10−3 10−2 10−1 100 101 t, RECTANGULAR PULSE DURATION (s) Figure 3. Normalized Maximum Transient Thermal Impedance IDM, PEAK CURRENT (A) 10000 VGS = 10 V TC = 25°C FOR TEMPERATURES ABOVE 25°C DERATE PEAK CURRENT AS FOLLOWS: 1000 I = I2 100 ƪǸ 175 * T C 150 ƫ 10 1 SINGLE PULSE 10−5 10−4 10−3 10−2 10−1 t, RECTANGULAR PULSE DURATION (s) Figure 4. Peak Current Capability www.onsemi.com 4 100 101 FCH47N60−F085 TYPICAL CHARACTERISTICS (continued) 100 100 10 100 ms 1 0.1 1 ms OPERATION IN THIS AREA MAY BE LIMITED BY RDS(on) SINGLE PULSE TJ = MAX RATED TC = 25°C 1 10 10 ms 100 ms ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 300 TJ = 150°C 50 TJ = 25°C TJ = −55°C 25 1000 4 2 8 VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Forward Bias Safe Operating Area Figure 6. Transfer Characteristics ID, DRAIN CURRENT (A) VGS = 0 V 10 TJ = 150°C TJ = 25°C 1 0.1 0.01 0.0 0.2 0.4 0..6 0.8 1..0 VGS 15 V Top 10 V 8V 7V 6V 5.5 V Bottom 90 60 30 0 1..2 80 ms PULSE WIDTH TJ = 25°C 120 5.5 V 0 4 500 rDS(on), DRAIN TO SOURCE ON−RESISTANCE (mW) 80 ms PULSE WIDTH TJ = 150°C VGS 15 V Top 10 V 8V 7V 6V 5.5 V 5 V Bottom 48 32 16 5V 0 4 8 12 16 12 16 20 Figure 8. Saturation Characteristics 80 64 8 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Forward Diode Characteristics 0 10 150 100 VSD, BODY DIODE FORWARD VOLTAGE (V) ID, DRAIN CURRENT (A) 6 VDS, DRAIN TO SOURCE VOLTAGE (V) 300 IS, REVERSE DRAIN CURRENT (A) 75 0 100 PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX VDD = 20 V ID = 47 A 400 300 TJ = 150°C 200 100 TJ = 25°C 0 20 PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX VDS, DRAIN TO SOURCE VOLTAGE (V) 6 8 VGS, DRAIN TO SOURCE VOLTAGE (V) Figure 9. Saturation Characteristics Figure 10. RDSON vs. Gate Voltage www.onsemi.com 5 10 FCH47N60−F085 3.0 1.2 PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX 2.5 2.0 1.5 1.0 ID = 47 A VGS = 10 V 0.5 0.0 −80 −40 0 40 VGS = VDS ID = 250 mA 1.1 NORMALIZED GATE THRESHOLD VOLTAGE NORMALIZED DRAIN TO SOURCE ON−RESISTANCE TYPICAL CHARACTERISTICS (continued) 80 120 160 1.0 0.9 0.8 0.7 0.6 200 −80 TJ, JUNCTION TEMPERATURE (°C) 40 80 120 160 200 Figure 12. Normalized Gate Threshold Voltage vs. Temperature 100000 1.2 ID = 1 mA CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 0 TJ, JUNCTION TEMPERATURE (°C) Figure 11. Normalized RDSON vs. Junction Temperature 1.1 1.0 1000 10 −40 0 40 80 120 160 1 0.1 200 ID = 47 A f = 1 MHz VGS = 0 V Crss 1 10 100 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 14. Capacitance vs. Drain to Source Voltage Figure 13. Normalized Drain to Source Breakdown Voltage vs. Junction Temperature 10 Coss 100 0.9 0.8 −80 Ciss 10000 TJ, JUNCTION TEMPERATURE (°C) VGS, GATE TO SOURCE VOLTAGE (V) −40 VDD = 240 V 8 VDS = 300 V VDD = 360 V 6 4 2 0 0 40 80 120 160 200 Qg, GATE CHARGE (nC) Figure 15. Gate Charge vs. Gate to Source Voltage SUPERFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 6 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TO−247−3LD SHORT LEAD CASE 340CK ISSUE A A DATE 31 JAN 2019 A E P1 P A2 D2 Q E2 S B D 1 2 D1 E1 2 3 L1 A1 L b4 c (3X) b 0.25 M (2X) b2 B A M DIM (2X) e GENERIC MARKING DIAGRAM* AYWWZZ XXXXXXX XXXXXXX XXXX = Specific Device Code A = Assembly Location Y = Year WW = Work Week ZZ = Assembly Lot Code *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. DOCUMENT NUMBER: DESCRIPTION: 98AON13851G TO−247−3LD SHORT LEAD A A1 A2 b b2 b4 c D D1 D2 E E1 E2 e L L1 P P1 Q S MILLIMETERS MIN NOM MAX 4.58 4.70 4.82 2.20 2.40 2.60 1.40 1.50 1.60 1.17 1.26 1.35 1.53 1.65 1.77 2.42 2.54 2.66 0.51 0.61 0.71 20.32 20.57 20.82 13.08 ~ ~ 0.51 0.93 1.35 15.37 15.62 15.87 12.81 ~ ~ 4.96 5.08 5.20 ~ 5.56 ~ 15.75 16.00 16.25 3.69 3.81 3.93 3.51 3.58 3.65 6.60 6.80 7.00 5.34 5.46 5.58 5.34 5.46 5.58 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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