FCP125N65S3R0

FCP125N65S3R0 MOSFET – Power, N-Channel, SUPERFET) III, Easy Drive 650 V, 24 A, 125 mW Description SUPERFET III MOSFET is ON Semiconductor’s brand-new high voltage super-junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on-resistance and lower gate charge performance. This advanced technology is tailored to minimize conduction loss, provide superior switching performance, and withstand extreme dv/dt rate. Consequently, SUPERFET III MOSFET Easy drive series helps manage EMI issues and allows for easier design implementation. www.onsemi.com VDSS RDS(ON) MAX ID MAX 650 V 125 mW @ 10 V 24 A D Features • • • • • • 700 V @ TJ = 150°C Typ. RDS(on) = 105 mW Ultra Low Gate Charge (Typ. Qg = 46 nC) Low Effective Output Capacitance (Typ. Coss(eff.) = 439 pF) 100% Avalanche Tested These Devices are Pb−Free, Halogen Free / BFR Free and are RoHS Compliant G S N-Channel MOSFET Applications • Telecom / Server Power Supplies • Industrial Power Supplies • UPS / Solar G D S TO−220−3LD CASE 340AT MARKING DIAGRAM $Y&Z&3&K FCP125 N65S3R0 $Y &Z &3 &K FCP125N65S3R0 = ON Semiconductor Logo = Assembly Plant Code = Numeric Date Code = Lot Code = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2017 August, 2019 − Rev. 5 1 Publication Order Number: FCP125N65S3R0/D FCP125N65S3R0 ABSOLUTE MAXIMUM RATINGS (TC = 25°C, Unless otherwise specified) Symbol Parameter VDSS Drain to Source Voltage VGSS Gate to Source Voltage ID Drain Current Value Unit 650 V DC ±30 V AC (f > 1 Hz) ±30 V Continuous (TC = 25°C) 24 A Continuous (TC = 100°C) 15 IDM Drain Current 60 A EAS Single Pulsed Avalanche Energy (Note 2) 115 mJ IAS Avalanche Current (Note 2) 3.7 A EAR Repetitive Avalanche Energy (Note 1) 1.81 mJ dv/dt MOSFET dv/dt 100 V/ns Peak Diode Recovery dv/dt (Note 3) 20 PD Pulsed (Note 1) Power Dissipation TJ, TSTG TL (TC = 25°C) 181 W Derate Above 25°C 1.45 W/°C −55 to +150 °C 300 °C Operating and Storage Temperature Range Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 s Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Repetitive rating: pulse-width limited by maximum junction temperature. 2. IAS = 3.7 A, RG = 25 W, starting TJ = 25°C. 3. ISD ≤ 12 A, di/dt ≤ 200 A/ms, VDD ≤ 400 V, starting TJ = 25°C. THERMAL CHARACTERISTICS Symbol Parameter Value Unit _C/W RqJC Thermal Resistance, Junction to Case, Max. 0.69 RqJA Thermal Resistance, Junction to Ambient, Max. 62.5 PACKAGE MARKING AND ORDERING INFORMATION Part Number Top Marking Package Shipping FCP125N65S3R0 FCP125N65S3R0 TO−220−3LD (Pb−Free / Halogen Free) 50 Units / Tube www.onsemi.com 2 FCP125N65S3R0 ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Parameter Symbol Test Conditions Min Typ Max Unit OFF CHARACTERISTICS BVDSS Drain to Source Breakdown Voltage VGS = 0 V, ID = 1 mA, TJ = 25_C 650 V VGS = 0 V, ID = 1 mA, TJ = 150_C 700 V DBVDSS/DTJ Breakdown Voltage Temperature Coefficient ID = 1 mA, Referenced to 25_C IDSS Zero Gate Voltage Drain Current VDS = 650 V, VGS = 0 V IGSS Gate to Body Leakage Current 0.68 V/_C 1 mA ±100 nA 4.5 V 125 mW 1.35 VDS = 520 V, TC = 125_C VGS = ±30 V, VDS = 0 V ON CHARACTERISTICS VGS(th) Gate Threshold Voltage VGS = VDS, ID = 0.59 mA RDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 12 A 105 Forward Transconductance VDS = 20 V, ID = 12 A 16 S 1940 pF 40 pF gFS 2.5 DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance VDS = 400 V, VGS = 0 V, f = 1 MHz Coss(eff.) Effective Output Capacitance VDS = 0 V to 400 V, VGS = 0 V 439 pF Coss(er.) Energy Related Output Capacitance VDS = 0 V to 400 V, VGS = 0 V 62 pF Total Gate Charge at 10V VDS = 400 V, ID = 12 A, VGS = 10 V (Note 4) 46 nC 12 nC 19 nC f = 1 MHz 0.5 W VDD = 400 V, ID = 12 A, VGS = 10 V, Rg = 4.7 W (Note 4) 21 ns 19 ns Qg(tot) Qgs Gate to Source Gate Charge Qgd Gate to Drain “Miller” Charge ESR Equivalent Series Resistance SWITCHING CHARACTERISTICS td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time 48 ns Turn-Off Fall Time 4.6 ns tf SOURCE-DRAIN DIODE CHARACTERISTICS Maximum Continuous Source to Drain Diode Forward Current 24 A ISM Maximum Pulsed Source to Drain Diode Forward Current 60 A VSD Source to Drain Diode Forward Voltage VGS = 0 V, ISD = 12 A 1.2 V trr Reverse Recovery Time Qrr Reverse Recovery Charge VDD = 400 V, ISD = 12 A, dIF/dt = 100 A/ms IS 339 ns 5.7 mC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Essentially independent of operating temperature typical characteristics. www.onsemi.com 3 FCP125N65S3R0 TYPICAL PERFORMANCE CHARACTERISTICS 100 VGS = 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V 10 ID, Drain Current [A] ID, Drain Current [A] 100 1 *Notes: 1. VDS = 20 V 2. 250 ms Pulse Test 1505C 10 255C *Notes: 1. 250 ms Pulse Test 2. TC = 255C 0.1 0.1 1 −555C 1 10 3 Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 100 IS, Reverse Drain Current [A] RDS(ON), Drain−Source On−Resistance [W] *Note: TC = 255C 0.2 VGS = 10 V VGS = 20 V 0.1 0 10 20 30 40 *Notes: 1. VGS = 0 V 10 2. 250 ms Pulse Test 1 150 C o o 25 C 0.1 o 0.01 −55 C 0.001 0.0 50 0.5 1.0 1.5 ID, Drain Current [A] VSD, Body Diode Forward Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 10 10000 VGS, Gate−Source Voltage [V] 100000 Capacitances [pF] 9 VGS, Gate−Source Voltage [V] 0.3 0.0 6 VDS, Drain−Source Voltage [V] Ciss 1000 Coss 100 *Note: 1. VGS = 0 V 2. f = 1 MHz 10 1 Ciss = C gs + Cgd (C ds = shorted) C oss = C ds + Cgd Crss = Cgd 0.1 0.1 1 10 Crss 100 8 VDS = 130 V VDS = 400 V 6 4 2 0 1000 *Note: ID = 12 A VDS, Drain−Source Voltage [V] Figure 5. Capacitance Characteristics 0 10 20 30 40 Qg, Total Gate Charge [nC] 50 Figure 6. Gate Charge Characteristics www.onsemi.com 4 FCP125N65S3R0 TYPICAL PERFORMANCE CHARACTERISTICS (Continued) 2.5 *Notes: 1. VGS = 0 V 2. ID = 10 mA 1.1 RDS(on), [Normalized] Drain−Source On−Resistance BVDSS, [Normalized] Drain−Source Breakdown Voltage 1.2 1.0 0.9 0.8 −50 0 50 100 2.0 1.5 1.0 0.5 0.0 150 *Notes: 1. VGS = 10 V 2. ID = 12 A −50 0 50 100 150 o o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variant vs. Temperature 25 100 30m s 20 ID, Drain Current [A] ID, Drain Current [A] 100m s 10 1ms 10ms DC 1 Operation in This Area is Limited by R DS(on) *Notes: 0.1 o 1. TC = 25 C 15 10 5 o 2. TJ = 150 C 3. Single Pulse 0.01 1 10 100 0 25 1000 EOSS [m J] 8 6 4 2 130 260 390 520 150 200 Figure 10. Maximum Drain Current vs. Case Temperature 10 0 100 TC, Case Temperature [ C] Figure 9. Maximum Safe Operation Area 0 50 o VDS, Drain−Source Voltage [V] 650 VDS, Drain to Source Voltage [V] Figure 11. EOSS vs. Drain to Source Voltage www.onsemi.com 5 250 FCP125N65S3R0 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE TYPICAL PERFORMANCE CHARACTERISTICS (Continued) 2 1 0.1 DUTY CYCLE−DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 0.01 0.001 −5 10 NOTES: ZqJC(t) = r(t) x RqJC RqJC = 0.69 oC/W Peak TJ = PDM x ZqJC(t) + TC Duty Cycle, D = t1 / t2 SINGLE PULSE −4 10 −3 10 −2 10 −1 10 t, RECTANGULAR PULSE DURATION (sec) Figure 12. Transient Thermal Response Curve www.onsemi.com 6 0 10 10 FCP125N65S3R0 VGS RL Qg VDS VGS Qgs Qgd DUT IG = Const. Charge Figure 13. Gate Charge Test Circuit & Waveform RL VDS VDS 90% 90% 90% VDD VGS RG VGS DUT VGS 10% td(on) 10% tr tf td(off) ton toff Figure 14. Resistive Switching Test Circuit & Waveforms L E AS + 1 @ LI AS 2 VDS BVDSS ID IAS RG VDD DUT VGS 2 ID(t) VDD VDS(t) tp tp Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms www.onsemi.com 7 Time FCP125N65S3R0 + DUT VSD − ISD L Driver RG Same Type as DUT VGS − dv/dt controlled by RG − ISD controlled by pulse period D+ VGS (Driver) VDD Gate Pulse Width Gate Pulse Period 10 V IFM, Body Diode Forward Current ISD (DUT) di/dt IRM Body Diode Reverse Current Body Diode Recovery dv/dt VDS (DUT) VDD VSD Body Diode Forward Voltage Drop Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms SUPERFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 8 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TO−220−3LD CASE 340AT ISSUE A DATE 03 OCT 2017 Scale 1:1 DOCUMENT NUMBER: DESCRIPTION: 98AON13818G TO−220−3LD Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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