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FDB5800
N-Channel Logic Level PowerTrench® MOSFET
60 V, 80 A, 6 mΩ
Features
Description
• RDS(on) = 4.6 mΩ (Typ.), VGS = 10 V, ID = 80 A
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced PowerTrench® process
that has been tailored to minimize the on-state
resistance while maintaining superior switching
performance.
• High Performance Trench Technology for Extermly
Low RDS(on)
• Low Gate Charge
• High Power and Current Handing Capability
Applications
• RoHs Compliant
• Power tools
• Motor drives and Uninterruptible Power Supplies
D
D
G
G
D2-PAK
S
S
Absolute Maximum Ratings T
Symbol
VDSS
VGS
o
C
= 25 C unless otherwise noted.
Drain to Source Voltage
FDB5800
60
Unit
V
Gate to Source Voltage
±20
V
Drain Current
- Continuous (TC < 102oC, VGS = 10 V)
80
A
Parameter
o
ID
- Continuous (TC < 90 C, VGS = 5 V)
- Continuous (Tamb = 25oC, VGS = 10V, with RθJA = 43oC/W)
- Pulsed
EAS
Single Pulse Avalanche Energy
PD
TJ, TSTG
(Note 1)
80
A
14
A
Figure 4
A
652
mJ
- Power Dissipation
242
- Derate above 25oC
- Operating and Storage Temperature
1.61
W/oC
W
-55 to 175
C
o
Thermal Characteristics
RθJC
Thermal Resistance Junction to Case TO-263, Max.
RθJA
Thermal Resistance Junction to Ambient TO-263, Max.
RθJA
2
( Note 2)
Thermal Resistance Junction to Ambient TO-263, 1in copper pad area
©2005 Fairchild Semiconductor Corporation
FDB5800 Rev. C2
1
0.62
oC/W
62.5
oC/W
43
o
C/W
www.fairchildsemi.com
FDB5800 — N-Channel Logic Level PowerTrench® MOSFET
November 2013
Part Number
FDB5800
Package
D2-PAK
Top Mark
FDB5800
Electrical Characteristics T
Symbol
Packing Method
Tape and Reel
Reel Size
330 mm
Tape Width
24 mm
Quantity
800 units
o
C
= 25 C unless otherwise noted.
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
IDSS
Zero Gate Voltage Drain Current
IGSS
Gate to Source Leakage Current
ID = 250 µA, VGS = 0 V
VDS = 48 V
VGS = 0 V
VGS = ±20 V
TC = 150oC
60
-
-
-
-
1
-
-
250
-
-
±100
nA
V
µA
On Characteristics
VGS(TH)
Gate to Source Threshold Voltage
rDS(ON)
Drain to Source On Resistance
VGS = VDS, ID = 250 µA
1.0
-
2.5
-
4.6
6.0
ID = 80 A, VGS = 4.5 V
-
5.8
7.2
-
5.5
7.0
-
10
12.6
-
6625
-
pF
-
628
-
pF
-
262
-
pF
-
1.4
-
Ω
-
104
135
nC
-
55
72
nC
-
6.0
-
nC
-
18.4
-
nC
-
12.5
-
nC
-
20.1
-
nC
ID = 80 A, VGS = 10 V
ID = 80 A, VGS = 5 V
ID = 80 A, VGS = 10 V,
TJ = 175oC
mΩ
Dynamic Characteristics
CISS
Input Capacitance
CRSS
Reverse Transfer Capacitance
Qg(TOT)
Total Gate Charge at 10V
Qg(TH)
Threshold Gate Charge
Qgs2
Gate Charge Threshold to Plateau
COSS
Output Capacitance
RG
Gate Resistance
Qg(5)
Total Gate Charge at 5V
Qgs
Gate to Source Gate Charge
Qgd
Gate to Drain “Miller” Charge
VDS = 15 V, VGS = 0 V,
f = 1 MHz
VGS = 0.5 V, f = 1 MHz
VGS = 0 V to 10 V
VGS = 0 V to 5 V
VGS = 0 V to 1 V
VDD = 30 V
ID = 80 A
Ig = 1.0 mA
Switching Characteristics (VGS = 5V)
tON
Turn-On Time
-
-
62.1
ns
Turn-On Delay Time
-
20.3
-
ns
tr
Rise Time
-
22.0
-
ns
-
27.1
-
ns
tf
td(ON)
VDD = 30 V, ID = 80 A
VGS = 5 V, RGS = 2 Ω
td(OFF)
Turn-Off Delay Time
Fall Time
-
12.1
-
ns
tOFF
Turn-Off Time
-
-
59.0
ns
Drain-Source Diode Characteristics
VSD
tr
QSD
Source to Drain Diode Voltage
Reverse Recovery Time
Reverse Recovered Charge
ISD = 80 A
-
-
1.25
V
ISD = 40 A
-
-
1.0
V
-
-
44
ns
ISD = 60 A, dISD/dt = 100 A/µs
-
-
57
nC
ISD = 60 A, dISD/dt = 100 A/µs
Notes:
1: Starting TJ = 25°C, L = 1mH, IAS = 36A, VDD = 54V, VGS = 10V.
2: Pulse width = 100s.
©2005 Fairchild Semiconductor Corporation
FDB5800 Rev. C2
2
www.fairchildsemi.com
FDB5800 — N-Channel Logic Level PowerTrench® MOSFET
Package Marking and Ordering Information
140
1.0
120
ID, DRAIN CURRENT (A)
POWER DISSIPATION MULTIPLIER
1.2
0.8
0.6
0.4
0.2
CURRENT LIMITED
BY PACKAGE
100
VGS =10V
80
60
VGS = 5V
40
RθJC = 0.62°C/W
20
0
0
25
50
75
100
150
125
TC , CASE TEMPERATURE
0
175
25
50
(oC)
75
100
125
150
TC, CASE TEMPERATURE (°C)
Figure 1. Normalized Power Dissipation vs Case
Temperature
Figure 2. Maximum Continuous Drain Current vs
Case Temperature
2
ZθJC, NORMALIZED
THERMAL IMPEDANCE
1
DUTY CYCLE - DESCENDING ORDER
0.5
0.2
0.1
0.05
0.02
0.01
PDM
0.1
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x RθJC + TC
SINGLE PULSE
0.01
10-5
10-4
10-3
10-2
10-1
100
101
t, RECTANGULAR PULSE DURATION (s)
Figure 3. Normalized Maximum Transient Thermal Impedance
IDM, PEAK CURRENT (A)
1000
TC = 25oC
FOR TEMPERATURES
TRANSCONDUCTANCE
MAY LIMIT CURRENT
IN THIS REGION
ABOVE 25oC DERATE PEAK
CURRENT AS FOLLOWS:
175 - TC
I = I25
VGS = 5V
150
100
50
10-5
10-4
10-3
10-2
10-1
100
101
t, PULSE WIDTH (s)
Figure 4. Peak Current Capability
©2005 Fairchild Semiconductor Corporation
FDB5800 Rev. C2
3
www.fairchildsemi.com
FDB5800 — N-Channel Logic Level PowerTrench® MOSFET
Typical Characteristics TC = 25°C unless otherwise noted
1000
500
If R = 0
tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD)
If R ≠ 0
tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1]
IAS, AVALANCHE CURRENT (A)
ID, DRAIN TCURRENT (A)
10µs
100
100µs
10
OPERATION IN THIS
AREA MAY BE LIMITED
BY rDS(ON)
1
1ms
10ms
SINGLE PULSE
TJ = MAX RATED
TC = 25oC
100ms
DC
100
STARTING TJ = 25oC
10
STARTING TJ = 150oC
1
0.1
1
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
0.01
100
Figure 6. Unclamped Inductive Switching
Capability
VDS = 6V
100
TA = 125oC
60
40
1
2
3
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
100
80
3.5V
60
40
20
4
3.0V
0
5
0
VGS, GATE TO SOURCE VOLTAGE (V)
RDS(ON), ON-RESISTANCE(OHM)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
0.012
TA = 175oC
0.010
0.008
TA = 25oC
0.006
0.004
0.002
4
6
8
2.0
2.0
ID = 80A
VGS = 10V
1.8
1.6
1.4
1.2
1.0
0.6
- 80
10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 9. On-Resistance Variation vs Gate-to-
©2005 Fairchild Semiconductor Corporation
FDB5800 Rev. C2
1.5
2.2
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
0.8
2
1.0
Figure 8. Saturation Characteristics
0.016
0.014
0.5
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Transfer Characteristics
ID = 20A
4.0V
120
TA = -55oC
0
4.5V
5.0V
TA = 25oC
20
0
10V
140
ID, DRAIN TCURRENT (A)
ID, DRAIN TCURRENT (A)
160
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
80
1000
NOTE: Refer to Fairchild Application Notes AN7514 and AN7515
160
120
100
10
tAV, TIME IN AVALANCHE (ms)
Figure 5. Forward Bias Safe Operating Area
140
1
0.1
- 40
0
40
80
120
TJ, AMBIENT TEMPERATURE (oC)
160
200
Figure 10. Normalized Drain to Source On
4
www.fairchildsemi.com
FDB5800 — N-Channel Logic Level PowerTrench® MOSFET
Typical Characteristics TC = 25°C unless otherwise noted
1.4
1.2
NORMALIZED GATE
THRESHOLD VOLTAGE
1.2
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
VGS = VDS
ID = 250µA
1.0
0.8
0.6
0.4
0.2
- 80
- 40
0
40
80
120
TJ, AMBIENT TEMPERATURE (oC)
160
1.1
1.0
0.9
- 80
200
Figure 11. Normalized Gate Threshold Voltage vs
Junction Temperature
- 40
0
40
80
120
TJ, AMBIENT TEMPERATURE (oC)
160
200
Figure 12. Normalized Drain to Source
Breakdown Voltage vs Junction Temperature
10
20000
10000
VDD =30V
CISS
VGS, GATE- SOURCE VOLTAGE
CAPACITANCE (pF)
ID = 250µA
COSS
1000
f = 1MHz
VGS = 0V
CRSS
8
6
4
WAVEFORMS IN
ASCENDING ORDER:
ID = 80A
ID = 1A
2
0
100
0.1
1
10
0
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
40
60
80
100
Qg, GATE CHARGE (nC)
Figure 13. Capacitance vs Drain to Source
Voltage
©2005 Fairchild Semiconductor Corporation
FDB5800 Rev. C2
20
Figure 14. Gate Charge Waveforms for Constant
Gate Current
5
www.fairchildsemi.com
FDB5800 — N-Channel Logic Level PowerTrench® MOSFET
Typical Characteristics TC = 25°C unless otherwise noted
FDB5800 — N-Channel Logic Level PowerTrench® MOSFET
Mechanical Dimensions
Figure 15. TO263 (D2PAK), Molded, 2-Lead, Surface Mount
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_TT263-002
©2005 Fairchild Semiconductor Corporation
FDB5800 Rev. C2
6
www.fairchildsemi.com
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
No Identification Needed
Full Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I66
©2005 Fairchild Semiconductor Corporation
FDB5800 Rev. C2
7
www.fairchildsemi.com
FDB5800 — N-Channel Logic Level PowerTrench® MOSFET
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
intended to be an exhaustive list of all such trademarks.
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®
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ISOPLANAR™
DEUXPEED®
™
TinyPWM™
Dual Cool™
Marking Small Speakers Sound Louder
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Saving our world, 1mW/W/kW at a time™
and Better™
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regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
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