FDC3535

FDC3535 P-Channel Power Trench® MOSFET -80 V, -2.1 A, 183 m Features General Description Max rDS(on) = 183 m at VGS = -10 V, ID = -2.1 A Max rDS(on) = 233 m at VGS = -4.5 V, ID = -1.9 A This P-Channel MOSFET is produced using Fairchild Semiconductor‘s advanced Power Trench® process that has been optimized for rDS(on), switching performance and ruggedness. High performance trench technology for extremely low rDS(on) High power and current handling capability in a widely used surface mount package Applications Fast switching speed Load Switch 100% UIL Tested Synchronous Rectifier RoHS Compliant S D S 4 3 G D 5 2 D D 6 1 D D G D Pin 1 D SuperSOT TM -6 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS VGS ID EAS PD TJ, TSTG Parameter Drain to Source Voltage Gate to Source Voltage Drain Current -Continuous -Pulsed Single Pulse Avalanche Energy Power Dissipation Power Dissipation Operating and Storage Junction Temperature Range (Note 1a) (Note 3) (Note 1a) (Note 1b) Ratings -80 ±20 -2.1 -10 37 1.6 0.7 -55 to +150 Units V V A mJ W °C Thermal Characteristics R R JC Thermal Resistance, Junction to Case JA Thermal Resistance, Junction to Ambient 30 (Note 1a) 78 °C/W Package Marking and Ordering Information Device Marking .535 Device FDC3535 ©2010 Fairchild Semiconductor Corporation FDC3535 Rev. 1.2 Package SSOT-6 1 Reel Size 7 ’’ Tape Width 8 mm Quantity 3000 units www.fairchildsemi.com FDC3535 P-Channel Power Trench® MOSFET April 2015 Symbol TJ = 25 °C unless otherwise noted Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS BVDSS TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = -250 A, VGS = 0 V -80 ID = -250 A, referenced to 25 °C V -64 VDS = -64 V, VGS = 0 V VGS = ±20 V, VDS = 0 V mV/°C -1 ±100 A nA -3 V On Characteristics VGS(th) VGS(th) TJ Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient rDS(on) Static Drain to Source On Resistance VGS = -10 V, ID = -2.1 A VGS = -4.5 V, ID = -1.9 A 147 176 183 233 246 6.3 307 Forward Transconductance VGS = -10 V, ID = -2.1 A, TJ = 125 °C VDD = -10 V, ID = -2.1 A VDS = -40 V, VGS = 0 V, f = 1 MHz 659 49 24 880 65 40 pF pF pF 6.5 3.1 23 2.9 14 6.8 1.6 2.7 13 10 38 10 20 10 ns ns ns ns nC nC nC nC -0.81 25 23 -1.3 40 38 V ns nC gFS VGS = VDS, ID = -250 A -1 ID = -250 A, referenced to 25 °C -1.6 5 mV/°C m S Dynamic Characteristics Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance Rg Gate Resistance 5.7 Switching Characteristics td(on) tr td(off) tf Qg(TOT) Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Total Gate Charge Total Gate Charge Gate to Drain “Miller” Charge VDD = -40 V, ID = -2.1 A, VGS = -10 V, RGEN = 6 VGS = 0 V to -10 V VGS = 0 V to -4.5 V VDD = -40 V ID = -2.1 A Drain-Source Diode Characteristics VSD trr Qrr Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = -2.1 A (Note 2) IF = -2.1 A, di/dt = 100 A/ s NOTES: 1. R JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R JC is guaranteed by design while R CA is determined by the user's board design. b.175 °C/W when mounted on a minimum pad of 2 oz copper a. 78 °C/W when mounted on a 1 in2 pad of 2 oz copper SS SF DS DF G SS SF DS DF G 2. Pulse Test: Pulse Width < 300 s, Duty cycle < 2.0 %. 3. Starting TJ = 25 oC, L = 3 mH, IAS = -5 A, VDD = -80 V, VGS = -10 V. ©2010 Fairchild Semiconductor Corporation FDC3535 Rev. 1.2 2 www.fairchildsemi.com FDC3535 P-Channel Power Trench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted 10 4 -ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = -4.5 V VGS = -10 V VGS = -3.5 V 8 6 4 PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX 2 0 VGS = -3 V VGS = -2.5 V 0 1 2 3 4 VGS = -2.5 V VGS = -3.5 V 2 1 0 5 0 2 Figure 1. On-Region Characteristics 8 10 Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage ID = - 2.1 A VGS = -10 V 1.8 rDS(on), DRAIN TO 1.6 1.4 1.2 1.0 0.8 0.6 0.4 -75 -50 -25 0 25 50 75 SOURCE ON-RESISTANCE (m ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 4 6 -ID, DRAIN CURRENT (A) 600 2.0 500 400 TJ = 125 oC 300 200 100 100 125 150 TJ = 25 oC 2 -IS, REVERSE DRAIN CURRENT (A) PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX VDS = -5 V 6 4 TJ = 150 oC TJ = 25 oC TJ = -55 oC 1 2 3 4 20 10 8 10 VGS = 0 V 1 TJ = 150 oC TJ = 25 oC 0.1 0.01 TJ = -55 oC 0.001 0.0 5 -VGS, GATE TO SOURCE VOLTAGE (V) 0.2 0.4 0.6 0.8 1.0 1.2 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics ©2010 Fairchild Semiconductor Corporation FDC3535 Rev. 1.2 6 Figure 4. On-Resistance vs Gate to Source Voltage 10 2 4 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On- Resistance vs Junction Temperature 8 PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX ID = -2.1 A TJ, JUNCTION TEMPERATURE (oC) -ID, DRAIN CURRENT (A) VGS = -10 V VGS = -4.5 V PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX -VDS, DRAIN TO SOURCE VOLTAGE (V) 0 VGS = -3 V 3 Figure 6. Source to Drain Diode Forward Voltage vs Source Current 3 www.fairchildsemi.com FDC3535 P-Channel Power Trench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted 1000 ID = -2.1 A Ciss 8 VDD = -40 V CAPACITANCE (pF) -VGS, GATE TO SOURCE VOLTAGE (V) 10 6 VDD = -50 V VDD = -30 V 4 2 0 100 Coss 0 3 6 9 12 10 0.1 15 1 Qg, GATE CHARGE (nC) 2.5 6 -ID, DRAIN CURRENT (A) -IAS , AVALANCHE CURRENT (A) 100 Figure 8. Capacitance vs Drain to Source Voltage 7 TJ = 25 oC 5 TJ = 100 oC 4 3 TJ = 125 oC 2 2.0 VGS = -10 V 1.5 VGS = -4.5 V 1.0 0.5 R 1 0.01 0.1 1 JA = o 78 C/W 0.0 25 10 50 75 100 125 150 o tAV, TIME IN AVALANCHE (ms) TC, Ambient TEMPERATURE ( C) Figure 9. Unclamped Inductive Switching Capability Figure 10. Maximum Continuous Drain Current vs Ambient Temperature P(PK), PEAK TRANSIENT POWER (W) 1000 20 10 -ID, DRAIN CURRENT (A) 10 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics 100 us 1 ms 1 0.1 Crss f = 1 MHz VGS = 0 V 10 ms THIS AREA IS LIMITED BY rDS(on) 0.01 0.005 0.1 100 ms SINGLE PULSE TJ = MAX RATED R JA = 175 oC/W TA = 25 oC 1 1s 10 s DC 10 100 300 R JA o = 175 C/W o TA = 25 C 100 10 1 0.5 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, PULSE WIDTH (s) -VDS, DRAIN to SOURCE VOLTAGE (V) Figure 11. Forward Bias Safe Operating Area ©2010 Fairchild Semiconductor Corporation FDC3535 Rev. 1.2 SINGLE PULSE VGS = -10 V Figure 12. Single Pulse Maximum Power Dissipation 4 www.fairchildsemi.com FDC3535 P-Channel Power Trench® MOSFET Typical Characteristics 2 NORMALIZED THERMAL IMPEDANCE, Z JA 1 0.1 TJ = 25 °C unless otherwise noted DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 0.01 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x Z JA x R SINGLE PULSE R 0.001 -4 10 -3 10 -2 10 o JA = 175 C/W -1 10 1 10 JA 100 + TA 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Ambient Transient Thermal Response Curve ©2010 Fairchild Semiconductor Corporation FDC3535 Rev. 1.2 5 www.fairchildsemi.com FDC3535 P-Channel Power Trench® MOSFET Typical Characteristics SYMM CL 0.95 C 3.00 2.80 6 A 4 1.00 MIN B 3.00 2.60 1.70 1.50 1 0.95 2.60 C 3 0.50 0.30 0.95 0.20 1.90 M 0.70 MIN A B LAND PATTERN RECOMMENDATION (0.30) SEE DETAIL A 1.10 MAX H 1.00 0.70 C 0.10 0.00 0.10 C GAGE PLANE 0.25 0.55 0.35 SEATING PLANE 0.60 REF DETAIL A SCALE: 50X 0.20 0.08 NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MO-193. VAR. AA, ISSUE E. B) ALL DIMENSIONS ARE IN MILLIMETERS. C PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.25mm PER END. PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25mm PER SIDE. PACKAGE LENGTH AND WIDTH DIMENSIONS ARE DETERMINED AT DATUM H. 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