FDC6320C

ON Semiconductor Is Now To learn more about onsemi™, please visit our website at www.onsemi.com onsemi and       and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. 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All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others. FDC6320C Dual N & P Channel , Digital FET General Description Features These dual N & P Channel logic level enhancement mode field effect transistors are produced using ON Semiconductor's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. The device is an improved design especially for low voltage applications as a replacement for bipolar digital transistors in load switching applications. Since bias resistors are not required, this dual digital FET can replace several digital transistors with difference bias resistors. SOT-23 SuperSOTTM-6 Absolute Maximum Ratings Symbol Parameter VDSS, VCC SuperSOTTM-8 N-Ch 25 V, 0.22 A, RDS(ON) = 5 Ω @ VGS= 2.7 V. P-Ch 25 V, -0.12 A, RDS(ON) = 13 Ω @ VGS= -2.7 V. Very low level gate drive requirements allowing direct operation in 3 V circuits. VGS(th) < 1.5 V. Gate-Source Zener for ESD ruggedness. >6kV Human Body Model Replace NPN & PNP digital transistors. SO-8 SOIC-16 SOT-223 4 3 5 2 6 1 TA = 25oC unless other wise noted N-Channel P-Channel Units Drain-Source Voltage, Power Supply Voltage 25 -25 V VGSS, VIN Gate-Source Voltage, 8 -8 V ID, IO Drain/Output Current 0.22 -0.12 A PD Maximum Power Dissipation TJ,TSTG Operating and Storage Tempature Ranger ESD Electrostatic Discharge Rating MIL-STD-883D Human Body Model (100pf / 1500 Ohm) - Continuous - Pulsed 0.5 -0.5 0.9 W -55 to 150 °C 6 kV (Note 1a) (Note 1b) 0.7 THERMAL CHARACTERISTICS RθJA Thermal Resistance, Junction-to-Ambient RθJC Thermal Resistance, Junction-to-Case © 1997 Semiconductor Components Industries, LLC. October-2017, Rev. 3 (Note 1a) 140 °C/W (Note 1) 60 °C/W Publication Order Number: FDC6320C/D DMOS Electrical Characteristics (TA = 25 OC unless otherwise noted ) Symbol Parameter Conditions Type Min VGS = 0 V, ID = 250 µA N-Ch 25 VGS = 0 V, ID = -250 µA P-Ch -25 ID= 250 µA, Referenced to 25 oC N-Ch 25 ID = -250 µA, Referenced to 25 oC P-Ch -20 N-Ch Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage ∆BVDSS/∆TJ Breakdown Voltage Temp. Coefficient IDSS Zero Gate Voltage Drain Current VDS= 20 V, VGS= 0 V, IDSS Zero Gate Voltage Drain Current VDS =-20 V, VGS = 0 V, IGSS Gate - Body Leakage Current V mV /oC 1 TJ = 55°C µA 10 P-Ch -1 VGS = 8 V, VDS= 0 V N-Ch 100 nA VGS = -8 V, VDS= 0 V P-Ch -100 nA TJ = 55°C µA -10 ON CHARACTERISTICS (Note 2) ∆VGS(th)/∆TJ Gate Threshold Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 o C VGS(th) RDS(ON) Gate Threshold Voltage Static Drain-Source On-Resistance -2.1 ID= -250 µA, Referenced to 25 C P-Ch 1.9 VDS = VGS, ID= 250 µA N-Ch 0.65 0.85 1.5 VDS = VGS, ID= -250 µA P-Ch -0.65 -1 -1.5 3.8 5 6.3 9 N-Ch VGS = 2.7 V, ID = 0.2 A TJ =125°C VGS = 4.5 V, ID = 0.4 A P-Ch VGS = -2.7 V, ID = -0.05 A TJ =125°C VGS = -4.5 V, ID = -0.2 A ID(ON) On-State Drain Current gFS Forward Transconductance mV / oC N-Ch o 3.1 4 10.6 13 15 21 7.9 10 N-Ch 0.2 VGS = -2.7 V, VDS = -5 V P-Ch -0.05 VDS = 5 V, ID= 0.4 A N-Ch 0.2 VDS = -5 V, ID= -0.2 A P-Ch 0.135 N-Channel VDS = 10 V, VGS = 0 V, f = 1.0 MHz N-Ch 9.5 P-Ch 11 N-Ch 6 P-Ch 7 N-Ch 1.3 P-Ch 1.4 VGS = 2.7 V, VDS = 5 V V Ω A S DYNAMIC CHARACTERISTICS Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance P-Channel VDS = -10 V, VGS = 0 V, f = 1.0 MHz www.onsemi.com 2 pF pF pF DMOS Electrical Characteristics (TA = 25 OC unless otherwise noted ) Symbol Parameter Conditions Type Min Typ Max Units nS SWITCHING CHARACTERISTICS (Note 2) tD(on) Turn - On Delay Time N-Channel N-Ch 5 11 VDD = 6 V, ID = 0.5 A, P-Ch 6 12 tr Turn - On Rise Time VGS = 4.5 V, RGEN = 50 Ω N-Ch 4.5 10 P-Ch 6 12 tD(off) Turn - Off Delay Time P-Channel N-Ch 4 10 VDD = -6 V, ID = -0.5 A, P-Ch 7.4 15 tf Turn - Off Fall Time VGEN= -4.5 V, RGEN = 50 Ω N-Ch 3.2 8 P-Ch 4 10 Qg Total Gate Charge N-Ch 0.29 0.4 P-Ch 0.23 0.32 Qgs Gate-Source Charge N-Channel VDS = 5 V, ID = 0.2 A, VGS = 4.5 V N-Ch 0.105 Qgd Gate-Drain Charge P-Channel VDS = -5 V, ID = -0.2A, VGS = -4.5 V P-Ch 0.12 N-Ch 0.045 P-Ch 0.03 nS nS nS nC nC nC DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS Maximum Continuous Drain-Source Diode Forward Current VSD Drain-Source Diode Forward Voltage N-Ch 0.5 P-Ch VGS = 0 V, IS = 0.5 A VGS = 0 V, IS = -0.5 A (Note 2) (Note 2) A -0.5 N-Ch 0.97 1.3 P-Ch -1 -1.3 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. Typical RθJA using the board layouts shown below on FR-4 PCB in a still air environment: a. 140OC/W on a 0.125 in2 pad of 2oz copper. b. 180OC/W on a 0.005 in2 of pad of 2oz copper. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. www.onsemi.com 3 Typical Electrical Characteristics: N-Channel V GS = 4.5V 1.4 4.0 R DS(on) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE I D , DRAIN-SOURCE CURRENT (A) 0.5 3.5 3.0 0.4 2.7 2.5 0.3 0.2 2.0 0.1 1.5 0 0 0.5 V DS 1 1.5 2 , DRAIN-SOURCE VOLTAGE (V) 2.5 VGS = 2.0V 1.2 2.5 2.7 1 3.0 3.5 4.0 0.8 4.5 0.6 3 0 R DS(on) , ON-RESISTANCE (OHM) R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 0.5 VGS = 2.7 V 1.2 1 0.8 I D = 0.2A 12 25°C 6 3 0 -25 0 25 50 75 100 T , JUNCTION TEMPERATURE (°C) 125 150 125°C 9 2 2.5 3 3.5 4 V GS , GATE TO SOURCE VOLTAGE (V) J Figure 3. On-Resistance Variation with Temperature. Figure 4. On Resistance Variation with Gate-To- Source Voltage. 0.5 V DS = 5.0V V GS = 0V T = -55°C J 25°C 0.2 I S, REVERSE DRAIN CURRENT (A) 0.2 125°C I D , DRAIN CURRENT (A) 0.4 15 I D = 0.2A 1.4 0.15 0.1 0.05 0 0.5 0.3 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.8 0.6 -50 0.2 I D , DRAIN CURRENT (A) Figure 1. On-Region Characteristics. 1.6 0.1 1 1.5 2 V GS , GATE TO SOURCE VOLTAGE (V) 2.5 TJ = 125°C 0.1 25°C 0.01 -55°C 0.001 0.0001 0.2 0.4 0.6 0.8 1 V , BODY DIODE FORWARD VOLTAGE (V) SD Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. www.onsemi.com 4 1.2 Typical Electrical Characteristics: N-Channel (continued) 5 VGS , GATE-SOURCE VOLTAGE (V) 30 CAPACITANCE (pF) 20 C iss 10 C oss 5 3 f = 1 MHz 2 V GS = 0V C rss 1 0.1 0.5 1 2 5 10 I D = 0.2A 3 2 1 0 25 V , DRAIN TO SOURCE VOLTAGE (V) DS 0 0.2 0.25 0.3 0.35 10 0m s 1s DC V GS = 2.7V SINGLE PULSE RθJA =See note 1b TA = 25°C 1 2 V DS SINGLE PULSE RθJA =See note 1b TA = 25°C 4 POWER (W) ID , DRAIN CURRENT (A) IT LIM N) (O S RD 0.1 0.01 0.5 0.15 5 1m s 10 ms 0.5 0.02 0.1 Figure 8. Gate Charge Characteristics. 0.8 0.05 0.05 Q g , GATE CHARGE (nC) Figure 7. Capacitance Characteristics. 0.2 VDS = 5.0V 4 3 2 1 5 10 20 40 0 0.01 Figure 9. Maximum Safe Operating Area. 0.1 1 10 SINGLE PULSE TIME (SEC) , DRAI N-SOURCE VOLTAGE (V) Figure 10. Single Pulse Maximum Power Dissipation. www.onsemi.com 5 100 300 2 0.2 V GS = -5.0V -4.5 -4.0 -3.5 RDS(ON), NORMALIZED -3.0 0.15 -2.7 -2.5 0.1 -2.0 0.05 0 DRAIN-SOURCE ON-RESISTANCE -I D , DRAIN-SOURCE CURRENT (A) Typical Electrical Characteristics: P-Channel V GS = -2.0 V 1.5 -2.7 -3.0 1 1 2 3 -4.0 -3.5 -4.5 0.5 0 -2.5 4 0 0.05 ,DRAIN-SOURCE ON-RESISTANCE I D = -0.05A V GS = -2.7V 1.4 1.2 1 0.8 0.6 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 150 ID = -0.05A TA= 25°C 20 125 °C 15 10 5 R DS(ON) R DS(ON) , NORMALIZED 0.2 25 1.6 DRAIN-SOURCE ON-RESISTANCE 0.15 Figure 12. On-Resistance Variation with Drain Current and Gate Voltage. Figure 11. On-Region Characteristics. 0 0 1 2 3 4 5 6 7 8 -V GS ,GATE TO SOURCE VOLTAGE (V) Figure 13. On-Resistance Variation with Temperature. Figure 14. On Resistance Variation with Gate-To- Source Voltage. 0.5 -1 T = -55°C J -I , REVERSE DRAIN CURRENT (A) V DS = -5V 25°C -0.75 125°C -0.5 -0.25 VGS = 0V 0.1 TJ = 125°C 25°C 0.01 -55°C S I D , DRAIN CURRENT (A) 0.1 -I D , DRAIN CURRENT (A) -VDS , DRAIN-SOURCE VOLTAGE (V) 0 -0.5 -1 -1.5 -2 -2.5 V GS , GATE TO SOURCE VOLTAGE (V) 0.0001 -3 0 0.2 0.4 0.6 0.8 1 -V SD , BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 16. Body Diode Forward Voltage Variation with Source Current and Temperature. Figure 15. Transfer Characteristics. www.onsemi.com 6 Typical Electrical Characteristics: P-Channel (continued) 0.8 I D = -0.2A VDS = -5V 6 -15 4 2 0.2 R 0.2 0.3 0.4 0.5 0.05 IT 10 0m s VGS = -2.7V SINGLE PULSE RθJA =See Note 1b TA = 25°C 1 2 5 -V DS 10 20 40 , DRAIN-SOURCE VOLTAGE (V) Figure 18. Maximum Safe Operating Area. Figure 17. Gate Charge Characteristics. 25 5 15 POWER (W) Coss 5 3 f = 1 MHz V GS = 0 V 1 0.1 SINGLE PULSE RθJA =See note 1b TA = 25°C 4 C iss 10 3 2 1 Crss 0.3 1 2 5 10 15 0 0.01 25 0.1 1 10 100 SINGLE PULSE TIME (SEC) -V DS , DRAIN TO SOURCE VOLTAGE (V) Figure 20. Single Pulse Maximum Power Dissipation. Figure 19. Capacitance Characteristics. 1 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE CAPACITANCE (pF) LIM 0.01 Q g , GATE CHARGE (nC) 2 N) 1s DC 0.02 0.1 (O DS 0.1 0 0 1m s 10 m s 0.5 -10 -ID , DRAIN CURRENT (A) -V GS , GATE-SOURCE VOLTAGE (V) 8 0.5 D = 0.5 0.2 0.2 0.1 0.05 0.02 0.01 0.0001 RθJA (t) = r(t) * R θJA R θJA = See Note 1b 0.1 P(pk) 0.05 t1 0.02 0.01 Single Pulse t2 TJ - TA = P * R JA(t) θ Duty Cycle, D = t 1/ t 2 0.001 0.01 0.1 1 10 t 1, TIME (sec) Figure 21. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note 1b.Transient thermal response will change depending on the circuit board design. www.onsemi.com 7 100 300 300 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. 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