DATA SHEET
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Integrated Load Switch
FDC6323L
TSOT−23−6
CASE 419BL
Description
These Integrated Load Switches are produced using onsemi’s
proprietary, high cell density, DMOS technology. This very high
density process is especially tailored to minimize on−state resistance
and provide superior switching performance. These devices are
particularly suited for low voltage high side load switch application
where low conduction loss and ease of driving are needed.
Features
•
•
•
•
•
•
VDROP = 0.2 V @ VIN = 5 V, IL = 1 A, VON/OFF = 1.5 V to 8 V
VDROP = 0.3 V @ VIN = 3.3 V, IL = 1 A, VON/OFF = 1.5 V to 8 V
High Density Cell Design for Extremely Low On−Resistance
VON/OFF Zener Protection for ESD Ruggedness > 6 kV Human
Body Model
SUPERSOTt−6 Package Design Using Copper Lead Frame for
Superior Thermal and Electrical Capabilities
This is a Pb−Free and Halide Free Device
VIN,R1
4
3
VOUT, C1
2
VOUT, C1
1
R1
MARKING DIAGRAM
&E&Y
&.323&G
&E
&Y
&.
323
&G
= Designates Space
= Binary Calendar Year Coding Scheme
= Pin One Dot
= Specific Device Code
= Date Code
ORDERING INFORMATION
Device
FDC6323L
Package
Shipping†
TSOT−23−6
(Pb−Free)
3000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Q2
ON/OFF
5
Q1
R1, C1
6
See Application Circuit
Figure 1.
+
IN
VDROP
−
OUT
ON/OFF
Figure 2. Equivalent Circuit
© Semiconductor Components Industries, LLC, 1999
September, 2021 − Rev. 7
1
Publication Order Number:
FDC6323L/D
FDC6323L
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Parameter
Symbol
VIN
VON/OFF
IL
PD
TJ, TSTG
ESD
Input Voltage Range
On/Off Voltage Range
Value
Unit
3−8
V
1.5−8
V
Load Current @ VDROP = 0.5V − Continuous (Note 1)
1.5
A
Load Current @ VDROP = 0.5V − Pulsed (Note 1, Note 3)
2.5
Maximum Power Dissipation (Note 2a)
0.7
W
−55 to 150
°C
6
kV
Operating and Storage Temperature Range
Electrostatic Discharge Rating MIL−STD−883D Human Body Model (100 pF / 1500 W)
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Parameter
Symbol
Value
Unit
RqJA
Thermal Resistance, Junction−to−Ambient (Note 2a)
180
°C/W
RqJC
Thermal Resistance, Junction−to−Case (Note 2)
60
°C/W
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
IFL
Forward Leakage Current
VIN = 8 V, VON/OFF = 0 V
−
−
1
mA
IRL
Reverse Leakage Current
VIN = −8 V, VON/OFF = 0 V
−
−
−1
mA
3
−
8
V
ON CHARACTERISTICS (Note 3)
VIN
VON/OFF
VDROP
IL
Input Voltage
On/Off Voltage
Conduction Voltage Drop @ 1 A
Load Current
1.5
−
8
V
VIN = 5 V, VON/OFF = 3.3 V
−
0.145
0.2
V
VIN = 3.3 V, VON/OFF = 3.3 V
−
0.178
0.3
VDROP = 0.2 V, VIN = 5 V,
VON/OFF = 3.3 V
1
−
−
VDROP = 0.3 V, VIN = 3.3 V,
VON/OFF = 3.3 V
1
−
−
A
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
NOTES:
1. VIN = 8 V, VON/OFF = 8 V, VDROP = 0.5 V, TA = 25°C
2. RqJA is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder
mounting surface of the drain pins. RqJC is guaranteed by design while RqCA is determined by the user’s board design.
TJ * TA
PD(t) + TJ * TA +
+ I 2D(t) RDS(ON)@TJ
RqJA(t)
RqJC ) RqCA(t)
Typical RqCA for single device operation using the board layouts shown below on FR−4 PCB in a still air environment:
a) 180°C/W when mounted on a 2oz minimum copper pad.
3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2.0%.
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2
FDC6323L
TYPICAL ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
0.5
0.5
TJ = 125°C
0.4
TJ = 125°C
0.4
0.3
VDROP (V)
VDROP (V)
TJ = 25°C
TJ = 25°C
0.2
VIN = 5 V
VON/OFF = 1.5−8 V
PW = 300 ms, D ≤ 2%
0.1
0.3
0.2
VIN = 3.3 V
VON/OFF = 1.5−8 V
PW = 300 ms, D ≤ 2%
0.1
0
0
0
1
2
3
4
0
1
2
IL (A)
Figure 4. VDROP Versus IL at VIN = 3.3 V
1.0
IL = 1 A
VIN = 3.3 V
PW = 300 ms, D ≤ 2%
0.35
R(ON), (W)
0.8
VDROP (V)
0.4
IL = 1 A
VON/OFF = 1.5−8 V
PW = 300 ms, D ≤ 2%
0.6
0.4
0.3
TJ = 125°C
0.25
0.2
TJ = 125°C
0.2
TJ = 25°C
0.15
0
1
2
3
4
0.1
5
0
VIN (V)
IL = 1 A
VON/OFF = 1.5−8 V
PW = 300 ms, D ≤ 2%
R(ON), (W)
0.6
0.4
TJ = 125°C
0
TJ = 25°C
1
2
3
2
3
4
Figure 6. R(ON) Versus IL at VIN = 3.3 V
1
0.8
1
IL, (A)
Figure 5. VDROP Versus VIN at IL = 1 A
0.2
4
IL (A)
Figure 3. VDROP Versus IL at VIN = 5 V
TJ = 25°C
3
4
5
VIN, (V)
Figure 7. On Resistance Variation with Input Voltage
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3
5
FDC6323L
TYPICAL ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (continued)
50
50
VIN = 3.3 V
IL = 1 A
VON/OFF = 3.3 V
R1 = 20 kW
Ci = 10 mF
Co = 1 mF
td(off)
40
30
tf
VIN = 5 V
IL = 1 A
VON/OFF = 3.3 V
R1 = 20 kW
Ci = 10 mF
Co = 1 mF
20
10
0
Time (ms)
Time (ms)
40
0
2
tr
td(off)
30
tf
20
tr
10
td(on)
td(on)
4
8
6
0
10
0
2
4
R2 (kW)
Figure 8. Switching Variation with R2
at VIN = 5 V and R1 = 20 kW
Time (ms)
250
VIN = 2.5 V
IL = 1 A
VON/OFF = 3.3 V
R1 = 20 kW
Ci = 10 mF
Co = 1 mF
40
30
tr
20
tf
td(off)
10
td(on)
IL = 1 A
VON/OFF = 3.3 V
R1 = 20 kW
Ci = 10 mF
Co = 1 mF
200
VIN = 5 V
150
100
3.3 V
50
2.5 V
0
0
0
2
4
6
8
10
0
2
4
Figure 10. Switching Variation with R2
at VIN = 2.5 V and R1 = 20 kW
500
IL = 1 A
VON/OFF = 3.3 V
R1 = 20 kW
Ci = 10 mF
Co = 1 mF
400
300
6
8
10
R2 (kW)
R2 (kW)
VDROP (mV)
10
8
Figure 9. Switching Variation with R2
at VIN = 3.3 V and R1 = 20 kW
% of Current Overshoot
50
6
R2 (kW)
Figure 11. % of Current Overshoot
Variation with VIN and R2
toff
ton
tr
td(on)
VIN = 2.5 V
td(off)
tf
90%
90%
3.3 V
VOUT
5V
200
10%
10%
Inverted
90%
100
VIN
10%
0
0
20
40
60
80
50%
50%
Pulse Width
100
R2 (kW)
Figure 12. VDROP Variation with VIN and R2
Figure 13. Switching Waveforms
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4
FDC6323L
TYPICAL ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (continued)
10
100 ms
R(ON) Limit
IL, Drain Current (A)
3
1 ms
10 ms
1
100 ms
0.3
DC
0.1
0.03
0.01
0.1
1s
VIN = 5 V
Single Pulse
RqJA = See Note 2a
TA = 25°C
0.2
0.5
1
5
2
10
20 30
VDROP (V)
Figure 14. Safe Operating Area
r(t), Normalized Effective
Transient Thermal Resistance
1
0.5
0.2
0.1
0.05
D = 0.5
0.2
RqJA (t) = r(t) * RqJA
RqJA = See Note 2a
0.1
0.05
P(pk)
t1
0.02
0.02
0.01
t2
0.01
0.005
0.00001
TJ − TA = P * RqJA (t)
Duty Cycle, D = t1/t2
Single Pulse
0.0001
0.001
0.01
0.1
1
10
t1, Time (s)
Figure 15. Transient Thermal Response Curve
NOTE:
Thermal characterization performed on the conditions described in Note 2a.
Transient thermal response will change depends on the circuit board design.
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5
100
300
FDC6323L
LOAD SWITCH APPLICATION
General Description
This device is particularly suited for compact computer
peripheral switching applications where 8 V input and 1 A
output current capability are needed. This load switch
integrates a small N−Channel Power MOSFET (Q1) which
drives a large P−Channel Power MOSFET (Q2) in one tiny
SUPERSOT−6 package.
A load switch is usually configured for high side
switching so that the load can be isolated from the active
power source. A P−Channel Power MOSFET, because it
does not require its drive voltage above the input voltage, is
usually more cost effective than using an N−Channel device
in this particular application. A large P−Channel Power
MOSFET minimizes voltage drop. By using a small
N−Channel device the driving stage is simplified.
Q2
IN
OUT
C1
R1
Q1
ON/OFF
Co
LOAD
R2
Figure 16. Application Circuit
Component Values
• R1: Typical 10k−1 MW
• R2: Typical 0−100 kW (optional)
• C1: Typical 1000 pF (optional)
Design Notes
•
•
•
•
R1 is needed to turn off Q2.
R2 can be used to soft start the switch in case the output capacitance Co is small.
R2 should be at least 10 times smaller than R1 to guarantee Q1 turns on.
By using R1 and R2 a certain amount of current is lost from the input. This bias current loss is given by the equitation:
IBIAS_LOSS + VIN
R1 ) R2
when the switch is ON. IBIAS_LOSS can be minimized by selecting a large value for R1.
• R2 and CRSS of Q2 make ramp for slow turn on. If excessive overshoot current occurs due to fast turn on, additional
capacitance C1 can be added externally to slow down the turn on.
SUPERSOT is a trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United
States and/or other countries.
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6
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSOT23 6−Lead
CASE 419BL
ISSUE A
1
SCALE 2:1
DATE 31 AUG 2020
GENERIC
MARKING DIAGRAM*
XXX MG
G
1
XXX = Specific Device Code
M
= Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
DOCUMENT NUMBER:
DESCRIPTION:
98AON83292G
TSOT23 6−Lead
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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