FDC636P

May 1998 FDC636P P-Channel Logic Level Enhancement Mode Field Effect Transistor General Description Features These P-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as cellular phone and notebook computer power management and other battery powered circuits where high-side switching, and low in-line power loss are needed in a very small outline surface mount package. SOT-23 SuperSOTTM-6 SuperSOTTM-8 -2.8 A, -20 V. RDS(ON) = 0.130 Ω @ VGS = -4.5 V RDS(ON) = 0.180 Ω @ VGS = -2.5 V. SuperSOTTM-6 package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. SOT-223 SO-8 SOIC-16 S D D .63 1 6 2 5 3 4 6 G SuperSOT TM pin 1 -6 D D Absolute Maximum Ratings T A = 25°C unless otherwise noted Symbol Parameter FDC636P Units VDSS Drain-Source Voltage -20 V VGSS Gate-Source Voltage ±8 V ID Drain Current - Continuous -2.8 A PD Maximum Power Dissipation (Note 1a) - Pulsed -11 (Note 1a) (Note 1b) TJ,TSTG Operating and Storage Temperature Range 1.6 W 0.8 -55 to 150 °C THERMAL CHARACTERISTICS RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W RθJC Thermal Resistance, Junction-to-Case (Note 1) 30 °C/W © 1998 Fairchild Semiconductor Corporation FDC636P Rev.B ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Symbol Parameter Conditions Min -20 Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA ∆BVDSS/∆TJ Breakdown Voltage Temp. Coefficient ID = -250 µA, Referenced to 25 oC IDSS Zero Gate Voltage Drain Current VDS = -16 V, VGS = 0 V V mV/oC -22 o -1 µA -10 µA IGSSF Gate - Body Leakage, Forward VGS = 8 V, VDS = 0 V 100 nA IGSSR Gate - Body Leakage, Reverse VGS = -8 V, VDS = 0 V -100 nA TJ = 55 C ON CHARACTERISTICS (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = -250 µA ∆VGS(th)/∆TJ Gate Threshold VoltageTemp.Coefficient ID = -250 µA, Referenced to 25 oC -0.4 RDS(ON) Static Drain-Source On-Resistance VGS = -4.5 V, ID = -2.8 A TJ = 125 C VGS = -2.5 V, ID = -2.2 A ID(on) On-State Drain Current VGS = -4.5 V, VDS = -5 V Forward Transconductance VDS = -5 V, ID = -2.8 A -1 V mV/oC 2 o gFS -0.6 0.11 0.13 0.17 0.21 0.146 0.18 -11 Ω A 4 S DYNAMIC CHARACTERISTICS Ciss Input Capacitance VDS = -10 V, VGS = 0 V, 390 pF Coss Output Capacitance f = 1.0 MHz 170 pF Crss Reverse Transfer Capacitance 45 pF SWITCHING CHARACTERISTICS (Note 2) tD(on) Turn - On Delay Time VDD = -10 V, ID = -1 A, 30 48 ns tr Turn - On Rise Time VGS = -4.5 V, RGEN = 6 Ω 26 42 ns tD(off) Turn - Off Delay Time 8 16 ns tf Turn - Off Fall Time 15 27 ns 6 8.5 nC Qg Total Gate Charge VDS = -5 V, ID = -2.8 A, Qgs Gate-Source Charge VGS = -4.5 V Qgd Gate-Drain Charge 0.9 nC 1 nC DRAIN-SOURCE DIODE CHARACTERISTICS IS Continuous Source Diode Current VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = -1.3 A (Note 2) -0.77 -1.3 A -1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 78oC/W when mounted on a 1 in2 pad of 2oz Cu on FR-4 board. b. 156oC/W when mounted on a minimum pad of 2oz Cu on FR-4 board. 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%. FDC636P Rev.B Typical Electrical Characteristics -3.5V -3.0V 12 RDS(ON) , NORMALIZED -I D , DRAIN-SOURCE CURRENT (A) VGS = -4.5V - 2.5V 9 6 - 2.0V 3 0 DRAIN-SOURCE ON-RESISTANCE 2 15 1.8 1.6 -3.0V 1.2 1 2 3 4 -3.5V 5 0 3 Figure 1. On-Region Characteristics. 6 9 12 15 0.5 I D = -1.4A I D = - 2.8A VGS = - 4.5V 1.4 R DS(ON) ,ON-RESISTANCE(OHM) R DS(ON) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE -5.0V Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.6 1.2 1 0.8 0.6 -50 -25 0 25 50 75 100 125 0.4 0.3 0.2 TA = 125°C 0.1 25°C 0 150 1 2 TJ , JUNCTION TEMPERATURE (°C) -V GS Figure 3. On-Resistance Variation with Temperature. 3 4 5 ,GATE TO SOURCE VOLTAGE (V) Figure 4. On-Resistance Variation with Gate-To-Source Voltage. 10 VDS = -5V TA = -55°C 8 -I S , REVERSE DRAIN CURRENT (A) 10 -I D , DRAIN CURRENT (A) -4.5V -I D , DRAIN CURRENT (A) -VDS , DRAIN-SOURCE VOLTAGE (V) 25°C 125°C 6 4 2 0 -4.0V 1 0.8 0 V GS= -2.5V 1.4 0 1 2 3 -VGS , GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 4 VGS = 0V 1 TJ = 125°C 0.1 25°C -55°C 0.01 0.001 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -V SD , BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDC636P Rev.B Typical Electrical Characteristics (continued) 1000 I D = -2.8A 600 VDS = -5V -10V -15V 4 CAPACITANCE (pF) -VGS , GATE-SOURCE VOLTAGE (V) 5 3 2 200 Coss 100 50 1 0 0 1 2 3 4 5 6 7 100 10 IT LIM N) S(O D R 0.01 0.1 0.2 2 5 10 20 5 SINGLE PULSE RθJA =156°C/W TA = 25°C POWER (W) 4 10 0m s 1 0.05 1 us 1m s 10m s 0.5 0.1 0.5 Figure 8. Capacitance Characteristics. 20 1s DC VGS = -4.5V SINGLE PULSE RθJA =156 °C/W T AA = 25°C 0.2 -VDS , DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics. 5 Crss f = 1 MHz V GS = 0 V 20 0.1 8 Q g , GATE CHARGE (nC) 3 2 1 0.5 1 2 5 10 30 0 0.01 0.1 1 10 100 300 SINGLE PULSE TIME (SEC) - VDS , DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE 1 TRANSIENT THERMAL RESISTANCE -I D , DRAIN CURRENT (A) Ciss 400 0.5 D = 0.5 0.2 0.1 0.05 R θJA(t) = r(t) * R θJA R θJA = 156°C/W 0.2 0.1 P(pk) 0.05 t1 0.02 0.02 0.01 t2 TJ - TA = P * R θJA (t) 0.01 Duty Cycle, D = t 1/ t 2 Single Pulse 0.005 0.00001 0.0001 0.001 0.01 0.1 1 10 100 300 t 1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in note 1b. Transient thermal response will change depending on the circuit board design. FDC636P Rev.B