FDD2570

FDD2570

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    TO-252(DPAK)

  • 描述:

  • 数据手册
  • 价格&库存
FDD2570 数据手册
FDD2570 150V N-Channel PowerTrench MOSFET General Description Features This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. • 4.7 A, 150 V. RDS(ON) = 80 mΩ @ VGS = 10 V RDS(ON) = 90 mΩ @ VGS = 6 V • Low gate charge These MOSFETs feature faster switching and lower gate charge than other MOSFETs with comparable RDS(ON) specifications. • Fast switching speed • High performance trench technology for extremely low RDS(ON) The result is a MOSFET that is easy and safer to drive (even at very high frequencies), and DC/DC power supply designs with higher overall efficiency. • High power and current handling capability. D D G G S TO-252 S Absolute Maximum Ratings Symbol Parameter VDSS Drain-Source Voltage VGSS Gate-Source Voltage ID Drain Current – Continuous Drain Current – Pulsed PD TA=25oC unless otherwise noted (Note 1a) Units 150 V ±20 V 4.7 A 30 (Note 1) 70 @ TA = 25°C (Note 1a) 3.2 @ TA = 25°C (Note 1b) Maximum Power Dissipation @ TC = 25°C TJ, TSTG Ratings W 1.3 -55 to +150 °C (Note 1) 1.8 °C/W (Note 1b) 96 °C/W Operating and Storage Junction Temperature Range Thermal Characteristics RθJC Thermal Resistance, Junction-to-Case RθJA Thermal Resistance, Junction-to-Ambient Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity FDD2570 FDD2570 13’’ 16mm 2500 units 2001 Fairchild Semiconductor Corporation FDD2570 Rev C(W) FDD2570 February 2001 Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units Drain-Source Avalanche Ratings (Note 1) WDSS IAR Single Pulse Drain-Source Avalanche Energy Maximum Drain-Source Avalanche Current VDD = 75 V, ID = 4.7 A 375 mJ 4.7 A Off Characteristics BVDSS ∆BVDSS ∆TJ IDSS Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25°C Zero Gate Voltage Drain Current VDS = 120 V, VGS = 0 V 1 µA IGSSF Gate–Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA IGSSR Gate–Body Leakage, Reverse VGS = –20 V VDS = 0 V –100 nA 2.6 –7 4 V mV/°C 60 63 120 80 90 158 mΩ On Characteristics 150 V mV/°C 150 (Note 2) VDS = VGS, ID = 250 µA ID = 250 µA, Referenced to 25°C 2 VGS(th) ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance ID(on) On–State Drain Current VGS = 10 V, ID = 4.7 A ID = 4.5 A VGS = 6 V, VGS = 10 V, ID = 4.7 A, TJ = 125°C VGS = 10 V, VDS = 10 V gFS Forward Transconductance VDS = 10 V, ID = 6.3 A 20 VDS = 75 V, V GS = 0 V, 1907 pF 117 pF 33 pF 30 A S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics f = 1.0 MHz (Note 2) td(on) Turn–On Delay Time tr Turn–On Rise Time td(off) Turn–Off Delay Time tf Turn–Off Fall Time 21 34 ns Qg Total Gate Charge 39 62 nC Qgs Gate–Source Charge Qgd Gate–Drain Charge VDD = 75 V, VGS = 10 V, VDS = 75 V, VGS = 10 V ID = 1 A, RGEN = 6 Ω ID = 4.7 A, 12 19 ns 7 14 ns 41 65 ns 7 nC 9 nC Drain–Source Diode Characteristics and Maximum Ratings IS VSD Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward VGS = 0 V, IS = 2.7 A Voltage (Note 2) 0.7 2.7 A 1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) RθJA= 40oC/W when mounted on a 1in2 pad of 2oz copper. b) RθJA= 96oC/W on a minimum mounting pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDD2570 Rev C(W) FDD2570 Electrical Characteristics FDD2570 Typical Characteristics 1.6 30 VGS = 10V 25 VGS = 5.0V 4.5V 1.4 20 4.5V 1.2 15 5.0V 10V 4.0V 10 1 5 3.5V 0.8 0 0 1 2 3 4 0 5 5 10 15 20 25 30 ID, DRAIN CURRENT (A) VDS, DRAIN-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 2.6 0.2 ID = 2.2 A ID = 4.7 A VGS = 10 V 2.2 0.16 1.8 o TA = 125 C 1.4 0.12 1 o TA = 25 C 0.08 0.6 0.2 -50 -25 0 25 50 75 100 125 150 0.04 3 o 4 TJ, JUNCTION TEMPERATURE ( C) Figure 3. On-Resistance Variation with Temperature. 5 6 7 8 VGS, GATE TO SOURCE VOLTAGE (V) 9 10 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 10 15 VDS = 10 V VGS = 0V 1 12 o TA = 125 C 0.1 9 o TA = 125 C o 25 C o 25 C 6 0.01 o -55 C o -55 C 0.001 3 0.0001 0 2 2.5 3 3.5 4 VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 4.5 0 0.2 0.4 0.6 0.8 1 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDD2570 Rev C(W) FDD2570 Typical Characteristics 3000 10 ID = 4.7 A VDS = 25 V 50 V f = 1MHz VGS = 0 V 2500 8 CISS 75 2000 6 1500 4 1000 CRSS 2 500 0 0 COSS 0 10 20 30 0 40 10 20 30 40 50 60 Figure 7. Gate Charge Characteristics. 80 90 100 SINGLE PULSE RθJA = 96 °C/W TA = 25°C 100us 1ms 10ms 10 80 Figure 8. Capacitance Characteristics. 100 RDS(ON) LIMIT 70 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) 60 100ms 1s 1 10s 40 DC 0.1 VGS = 10V SINGLE PULSE 0.01 20 o RθJA = 96 C/W o TA = 25 C 0 0.001 0.1 1 10 100 0.01 1000 0.1 1 10 100 1000 t1, TIME (sec) VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 R θJA(t) = r(t) + R θ JA R θ JA = 96 °C/W 0.2 0.1 0.1 0.05 P(pk) 0.02 0.01 t1 t2 T J - T A = P * R θ JA(t) Duty Cycle, D = t1 / t2 0.01 SINGLE 0.001 0.001 0.01 0.1 1 10 100 1000 t1 , TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDD2570 Rev C(W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DOME™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST  FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ PowerTrench  QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER  SMART START™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. G
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