FDD9507L-F085

MOSFET - Power, Single P‐Channel POWERTRENCH) -40 V, -100 A, 4.4 mW FDD9507L-F085 Features • • • • • Typical RDS(on) = 3.3 mW at VGS = −10 V, ID = −80 A Typical Gg(tot) = 110 nC at VGS = −10 V, ID = −80 A UIS Capability Qualified to AEC Q101 These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant www.onsemi.com VDSS RDS(ON) MAX ID MAX −40 V 4.4 mW @ −10 V −100 A D Applications • • • • • • • Automotive Engine Control PowerTrain Management Solenoid and Motor Drivers Electrical Power Steering Integrated Starter/Alternator Distributed Power Architectures and VRM Primary Switch for 12 V Systems G S P-CHANNEL MOSFET MAXIMUM RATINGS (TA = 25°C unless otherwise noted) Parameter Symbol Value Unit D G VDSS Drain-to-Source Voltage −40 V VGS Gate-to-Source Voltage ±16 V Drain Current − Continuous, (VGS = −10 V) TC = 25°C (Note 1) −100 A DPAK3 (TO−252) CASE 369AS Pulsed Drain Current, TC = 25°C (See Figure 4) A MARKING DIAGRAM EAS Single Pulse Avalanche Energy (Note 2) 259 mJ PD Power Dissipation 227 W Derate Above 25°C 1.52 W/°C −55 to +175 °C ID TJ, TSTG Operating and Storage Temperature Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Current is limited by bondwire configuration. 2. Starting TJ = 25°C, L = 0.1 mH, IAS = −72 A, VDD = −40 V during inductor charging and VDD = 0 V during time in avalanche. S $Y&Z&3&K FDD 9507L $Y &Z &3 &K FDD9507L = ON Semiconductor Logo = Assembly Plant Code = Numeric Date Code = Lot Code = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 6 of this data sheet. © Semiconductor Components Industries, LLC, 2017 July, 2021 − Rev. 5 1 Publication Order Number: FDD9507L−F085/D FDD9507L−F085 THERMAL CHARACTERISTICS Symbol Parameter RqJC Thermal Resistance, Junction to Case RqJA Thermal Resistance, Junction to Ambient (Note 3) Value Unit 0.66 °C/W 52 3. RqJA is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder mounting surface of the drain pins. RqJC is guaranteed by design, while RqJA is determined by the board design. The maximum rating presented here is based on mounting on a 1 in2 pad of 2oz copper. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Parameter Test Condition Min Typ Max Unit OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage ID = −250 mA, VGS = 0 V −40 − − V IDSS Drain-to-Source Leakage Current VDS = −40 V, VGS = 0 V TJ = 25°C TJ = 175°C (Note 4) − − − − 1 1 mA mA IGSS Gate-to-Source Leakage Current VGS = ±16 V − − ±100 nA BVDSS ON CHARACTERISTICS VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 mA −1 −2 −3 V RDS(on) Static Drain to Source On Resistance VGS = −4.5 V, ID = −80 A, TJ = 25°C − 4.9 7.2 mW VGS = −10 V, ID = −80 A TJ = 25°C TJ = 175°C (Note 4) − − 3.3 5.3 4.4 7.1 VDS = −20 V, VGS = 0 V, f = 1 MHz − 6250 − pF DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance − 2640 − pF Crss Reverse Transfer Capacitance − 61 − pF Rg Gate Resistance f = 1 MHz − 19.3 − W Qg(tot) Total Gate Charge VGS = 0 V to −10 V, VDD = −20 V, ID = −80 A − 100 130 nC Qg(−4.5) Total Gate Charge VGS = 0 V to −4.5 V, VDD = −20 V, ID = −80 A − 46 − nC Qg(th) Threshold Gate Charge VGS = 0 V to −2 V, VDD = −20 V, ID = −80 A − 13 − nC Qgs Gate to Source Charge VDD = −20 V, ID = −80 A − 22 − nC Qgd Gate to Drain “Miller” Charge VDD = −20 V, ID = −80 A − 13 − nC VDD = −20 V, ID = −80 A, VGS = −10 V, RGEN = 6 W − − 21 ns − 10 − ns Rise Time − 6 − ns Turn-Off Delay − 400 − ns Fall Time − 132 − ns Turn-Off Time − − 710 ns V SWITCHING CHARACTERISTICS ton Turn-On Time td(on) Turn-On Delay tr td(off) tf toff DRAIN-SOURCE DIODE CHARACTERISTICS VSD Source to Drain Diode Forward Voltage ISD = −80 A, VGS = 0 V − −0.9 −1.3 ISD = −40 A, VGS = 0 V − −0.85 −1.2 trr Reverse Recovery Time IF = −80 A, dISD/dt = 100 A/ms − 87 113 ns Qrr Reverse Recovery Charge − 115 150 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. The maximum value is specified by design at TJ = 175°C. Product is not tested to this condition in production. www.onsemi.com 2 FDD9507L−F085 200 1.2 1.0 −ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER TYPICAL CHARACTERISTICS 0.8 0.6 0.4 0.2 0.0 0 25 50 75 100 125 150 160 80 CURRENT LIMITED BY PACKAGE 40 25 TC, CASE TEMPERATURE (5C) NORMALIZED THERMAL IMPEDANCE, ZqJC 50 75 100 125 150 Figure 2. Maximum Continuous Drain Current vs. Case Temperature DUTY CYCLE − DESCENDING ORDER 1 D = 0.50 0.20 0.10 0.05 0.02 t1 0.01 PDM 0.1 t2 SINGLE PULSE 0.01 −5 10 −4 10 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x Z qJC x RqJC + TC −3 −2 −1 10 10 10 t, RECTANGULAR PULSE DURATION(s) 10 0 10 1 Figure 3. Normalized Maximum Transient Thermal Impedance 5000 T C = 25 o C IDM, PEAK CURRENT (A) VGS = −10 V FOR TEMPERATURES ABOVE 25 o C DERATE PEAK CURRENT AS FOLLOWS: 1000 I = I 25 175 − T C 150 100 10 −5 10 SINGLE PULSE −4 10 175 TC, CASE TEMPERATURE(oC) Figure 1. Normalized Power Dissipation vs. Case Temperature 2 VGS = −10 V 120 0 175 CURRENT LIMITED BY SILICON −3 −2 −1 10 10 10 t, RECTANGULAR PULSE DURATION(s) Figure 4. Peak Current Capability www.onsemi.com 3 10 0 10 1 FDD9507L−F085 TYPICAL CHARACTERISTICS 300 −IAS, AVALANCHE CURRENT (A) −I D , DRAIN CURRENT (A) 1000 100 100 us 10 1 ms 10 ms 1 OPERATION IN THIS AREA MAY BE LIMITED BY r DS(on) 0.1 1 SINGLE PULSE TJ = MAX RATED TC = 25oC 100 ms 10 −VDS, DRAIN TO SOURCE VOLTAGE (V) −I S, REVERSE DRAIN CURRENT (A) TJ = 175oC 1 2 TJ = −55oC 3 4 0.1 1 10 100 VGS = 0 V TJ = 175 oC TJ = −55oC 1 0.1 0.0 5 0.2 0.4 0.6 0.8 1.0 −VGS, GATE TO SOURCE VOLTAGE (V) −V SD, BODY DIODE FORWARD VOLTAGE (V) Figure 7. Transfer Characteristics Figure 8. Forward Diode Characteristics 250 250 200 150 100 50 250 m s PULSE WIDTH Tj=25oC 1 2 3 VGS -10V Top -7V -5V -4.5V -4V −3.5V Bottom 4 1000 TJ = 25 oC 300 0 0.01 10 300 0 STARTING TJ = 150oC 100 −I D, DRAIN CURRENT (A) −ID, DRAIN CURRENT (A) TJ = 25oC 50 0 −I D, DRAIN CURRENT (A) 300 200 100 10 Figure 6. Unclamped Inductive Switching Capability VDD = −5 V 150 STARTING TJ = 25oC tAV, TIME IN AVALANCHE (ms) PULSE DURATION = 250 m s DUTY CYCLE = 0.5% MAX 250 100 1 0.001 100 Figure 5. Forward Bias Safe Operating Area 300 If R = 0 t AV = (L)(I AS )/(1.3*RATED BV DSS − VDD ) If R 0 0 tAV = (L/R)ln[(I AS *R)/(1.3*RATED BV DSS − VDD ) +1] 200 150 −VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 9. Saturation Characteristics VGS 100 50 0 5 250 m s PULSE WIDTH Tj=175oC 0 -10V Top -7V -5V -4.5V -4V -3.5V Bottom 1 2 3 4 −VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 10. Saturation Characteristics www.onsemi.com 4 1.2 5 FDD9507L−F085 RDS(on), DRAIN TO SOURCE ON−RESISTANCE (mW) 50 NORMALIZED DRAIN TO SOURCE ON−RESISTANCE TYPICAL CHARACTERISTICS PULSE DURATION = 250 m s DUTY CYCLE = 0.5% MAX 40 ID = −80 A 30 20 o TJ = 175 C 10 TJ = 25 oC 0 2 4 6 8 −VGS, GATE TO SOURCE VOLTAGE (V) 10 VGS = VDS NORMALIZED GATE THRESHOLD VOLTAGE ID = −250 m A 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 −80 −40 0 40 80 120 160 1.4 1.2 1.0 ID = −80 A VGS = −10 V 0.8 0.6 −80 200 Coss 100 Crss 10 120 160 200 ID = −5 mA 1.05 1.00 0.95 0.90 −80 −VGS, GATE TO SOURCE VOLTAGE (V) CAPACITANCE (pF) Ciss 1 80 −40 0 40 80 100 120 160 Figure 14. Normalized Drain to Source Breakdown Voltage vs. Junction Temperature 1000 10 0.1 40 TJ, JUNCTION TEMPERATURE (oC) Figure 13. Normalized Gate Threshold Voltage vs. Temperature f = 1 MHz VGS = 0 V 0 1.10 TJ, JUNCTION TEMPERATURE ( oC) 10000 −40 Figure 12. Normalized RDS(on) vs. Junction Temperature NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.3 PULSE DURATION = 250 m s DUTY CYCLE = 0.5% MAX 1.6 TJ, JUNCTION TEMPERATURE ( oC) Figure 11. RDS(on) vs. Gate Voltage 1.2 1.8 40 −V DS, DRAIN TO SOURCE VOLTAGE (V) 10 ID = −8 A 8 VDD = −20 V 6 VDD = −24 V VDD = −16 V 4 2 0 0 20 40 60 80 Qg, GATE CHARGE (nC) Figure 15. Capacitance vs. Drain to Source Voltage Figure 16. Gate Charge vs. Gate to Source Voltage www.onsemi.com 5 100 FDD9507L−F085 ORDERING INFORMATION Device Marking Package Reel Size Tape Width Quantity FDD9507L−F085 FDD9507L DPAK3 (TO−252) (Pb-Free / Halogen Free) 13″ 16 mm 2500 Units www.onsemi.com 6 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DPAK3 (TO−252 3 LD) CASE 369AS ISSUE A DATE 28 SEP 2022 GENERIC MARKING DIAGRAM* XXXXXX XXXXXX AYWWZZ XXXX A Y WW ZZ = Specific Device Code = Assembly Location = Year = Work Week = Assembly Lot Code DOCUMENT NUMBER: DESCRIPTION: *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. 98AON13810G DPAK3 (TO−252 3 LD) Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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