FDG6321C

Digital FET, Dual N & P Channel FDG6321C General Description These dual N & P−Channel logic level enhancement mode field effect transistors are produced using ON Semiconductor’s proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on−state resistance. This device has been designed especially on low voltage replacement for bipolar digital transistors and small signal MOSFETS. Since bias resistors are not required, this dual digital FET can replace several different digital transistors, with different bias resistor values. www.onsemi.com S2 G2 D1 D2 G1 S1 SC−88/SC70−6/SOT−363 CASE 419B−02 Features • N−Ch 0.50 A, 25 V MARKING DIAGRAM RDS(ON) = 0.45 W @ VGS = 4.5 V ♦ RDS(ON) = 0.60 W @ VGS = 2.7 V P−Ch −0.41 A, −25 V ♦ RDS(ON) = 1.1 W @ VGS = −4.5 V ♦ RDS(ON) = 1.5 W @ VGS = −2.7 V Very Small Package Outline SC70−6 Very Low Level Gate Drive Requirements Allowing Direct Operation in 3 V Circuits (VGS(th) < 1.5 V) Gate−Source Zener for ESD Ruggedness (>6 kV Human Body Model) These Devices are Pb−Free and are RoHS Compliant ♦ • • • • • ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted) Parameter Symbol N−Channel P−Channel Drain−Source Voltage 25 −25 V VGSS Gate−Source Voltage 8 −8 V Continuous 0.5 −0.41 A Pulsed 1.5 Drain Current PD Maximum Power Dissipation (Note 1) TJ, TSTG ESD Operating and Storage Temperature Range Electrostatic Discharge Rating MIL−STD−883D Human Body Model (100 pF / 1500 W) 21 M = Specific Device Code = Assembly Operation Month PIN CONNECTIONS 1 6 2 5 3 4 Units VDSS ID 21M −1.2 0.3 W −55 to 150 °C 6 kV ORDERING INFORMATION See detailed ordering and shipping information on page 8 of this data sheet. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. © Semiconductor Components Industries, LLC, 1998 June, 2020 − Rev. 5 1 Publication Order Number: FDG6321C/D FDG6321C THERMAL CHARACTERISTICS Symbol RqJA Parameter Ratings Unit 415 _C/W Thermal Resistance, Junction−to−Ambient (Note 1) 1. RqJA is the sum of the junction−to−case and case−to−ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RqJC is guaranteed by design while RqCA is determined by the user’s board design. RqJA = 415°C/W on minimum pad mounting on FR−4 board in still air. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Symbol Parameter Conditions Type Min Typ Max Unit VGS = 0 V, ID = 250 mA N−Ch 25 − − V VGS = 0 V, ID = −250 mA P−Ch −25 − − Breakdown Voltage Temperature Coefficient ID = 250 mA, Referenced to 25_C N−Ch − 26 − ID = −250 mA, Referenced to 25_C P−Ch − −22 − Zero Gate Voltage Drain Current VDS = 20 V, VGS = 0 V N−Ch − − 1 − − 10 − − −1 − − −10 OFF CHARACTERISTICS BVDSS DBVDSS / DTJ IDSS Drain−Source Breakdown Voltage VDS = 20 V, VGS = 0 V, TJ = 55_C IGSS Gate−Body Leakage Current VDS = −20 V, VGS = 0 V P−Ch VDS = −20 V, VGS = 0 V, TJ = 55_C IGSS Gate−Body Leakage Current VGS = 8 V, VDS = 0 V N−Ch − − 100 VGS = −8 V, VDS = 0 V P−Ch − − −100 VDS = VGS, ID = 250 mA N−Ch 0.65 0.8 1.5 VDS = VGS, ID = −250 mA P−Ch −0.65 −0.82 −1.5 Gate Threshold Voltage Temperature Coefficient ID = 250 mA, Referenced to 25_C N−Ch − −2.6 − ID = −250 mA, Referenced to 25_C P−Ch − 2.1 − Static Drain−Source On−Resistance VGS = 4.5 V, ID = 0.5 A N−Ch − 0.34 0.45 − 0.55 0.72 − 0.44 0.6 − 0.85 1.1 VGS = −4.5 V, ID = −0.41 A, TJ = 125_C − 1.2 1.8 VGS = −2.7 V, ID = −0.05 A − 1.15 1.5 mV/_C mA mA nA ON CHARACTERISTICS (Note 2) VGS(th) DVGS(th) / DTJ RDS(ON) Gate Threshold Voltage VGS = 4.5 V, ID = 0.5 A, TJ = 125_C VGS = 2.7 V, ID = 0.2 A VGS = −4.5 V, ID = −0.41 A ID(ON) gFS On−State Drain Current Forward Transconductance P−Ch VGS = 4.5 V, VDS = 5 V N−Ch 0.5 − − VGS = −4.5 V, VDS = −5 V P−Ch −0.41 − − VDS = 5 V, ID = 0.5 A N−Ch − 1.45 − VDS = −5 V, ID = −0.41 A P−Ch − 0.9 − N−Channel VDS = 10 V, VGS = 0 V, f = 1.0 MHz N−Ch − 50 − P−Ch − 62 − N−Ch − 28 − P−Ch − 34 − N−Ch − 9 − P−Ch − 10 − V mV/_C W A S DYNAMIC CHARACTERISTICS Ciss Coss Crss Input Capacitance Output Capacitance P−Channel VDS = −10 V, VGS = 0 V, f = 1.0 MHz Reverse Transfer Capacitance www.onsemi.com 2 pF FDG6321C ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (continued) Symbol Parameter Conditions Type Min Typ Max Unit N−Ch − 3 6 ns P−Ch − 7 15 N−Ch − 8.5 18 P−Ch − 8 16 N−Ch − 17 30 P−Ch − 55 80 N−Ch − 13 25 P−Ch − 35 60 N−Ch − 1.64 2.3 SWITCHING CHARACTERISTICS (Note 2) tD(on) tr tD(off) tf Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time P−Channel VDD = −5 V, ID = −0.5 A, VGS = −4.5 V, RGEN = 50 W Turn-Off Fall Time Qg Total Gate Charge Qgs Gate−Source Charge Qgd N−Channel VDD = 5 V, ID = 0.5 A, VGS = 4.5 V, RGEN = 50 W Gate−Drain Charge N−Channel VDS = 5 V, ID = 0.5 A, VGS = 4.5 V P−Ch − 1.1 1.5 N−Ch − 0.38 − P−Ch − 0.31 − N−Ch − 0.45 − P−Ch − 0.29 − N−Ch − − 0.25 P−Ch − − −0.25 VGS = 0 V, IS = 0.5 A (Note 2) N−Ch − 0.8 1.2 VGS = 0 V, IS = −0.5 A (Note 2) P−Ch − −0.8 −1.2 P−Channel VDS = −5 V, ID =−0.41 A, VGS = −4.5 V ns ns ns nC nC nC DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS VSD Maximum Continuous Drain−Source Diode Forward Current Drain−Source Diode Forward Voltage A V Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2.0% www.onsemi.com 3 FDG6321C VGS = 4.5 V 3.0 V 2.7 V 1.2 , NORMALIZED 2.5 V 2.0 V 0.9 0.6 1.5 V R ID , DRAIN−SOURCE CURRENT (A) 1.5 0.3 0 DRAIN−SOURCE ON−RESISTANCE TYPICAL PERFORMANCE CHARACTERISTICS: N−CHANNEL 2 VGS = 2.0 V 1.5 2.5 V 0.5 1 1.5 2 2.5 3 0 0.2 R DS(ON) , ON−RESISTANCE ( W) R DS(ON) , NORMALIZED DRAIN−SOURCE ON−RESISTANCE VGS = 4.5 V 1.2 1 0.8 1 1.2 ID = 0.3 A 1.6 1.2 −25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 0.4 150 1 25°C 125°C 0.6 0.4 0.2 1 1.5 2 2 2.5 3 3.5 4 V GS , GATE TO SOURCE VOLTAGE (V) 4.5 5 VGS = 0 V TJ = 125°C 0.1 25°C −55°C 0.01 0.001 0.0001 0.5 1.5 Figure 4. On−Resistance Variation with Gate−to−Source Voltage I , REVERSE DRAIN CURRENT (A) 0.8 TA = 25°C 1 TJ = −55°C VDS = 5.0 V TA = 125°C 0.8 0 Figure 3. On−Resistance Variation with Temperature I , DRAIN CURRENT (A) 0.8 2 I D = 0.5 A 0 0.6 Figure 2. On−Resistance Variation with Drain Current and Gate Voltage 1.6 0.6 −50 0 0.4 ID , DRAIN CURRENT (A) Figure 1. On−Region Characteristics 1 3.5 V 4.5 V VDS , DRAIN−SOURCE VOLTAGE (V) 1.4 3.0 V 1 0.5 0 2.7 V 2.5 0 0.2 0.4 0.6 0.8 1 1.2 V SD , BODY DIODE FORWARD VOLTAGE (V) VGS , GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature www.onsemi.com 4 FDG6321C TYPICAL PERFORMANCE CHARACTERISTICS: N−CHANNEL (continued) 200 ID = 0.5 A VDS = 5 V 10 V 15 V 4 CAPACITANCE (pF) V GS , GATE−SOURCE VOLTAGE (V) 5 3 2 70 C iss 30 C oss 10 0 0 0.4 0.8 1.2 1.6 3 0.1 2 0.3 3 50 1 40 0.5 0.2 0.1 VGS = 4.5 V SINGLE PULSE RqJA = 415°C/W TA = 25°C 0.01 0.1 DS 5 10 25 SINGLE PULSE RqJA = 415°C/W TA = 25°C 30 20 10 1 V 2 Figure 8. Capacitance Characteristics POWER (W) I D , DRAIN CURRENT (A) Figure 7. Gate Charge Characteristics 0.02 1 V DS, DRAIN TO SOURCE VOLTAGE (V) Q g , GATE CHARGE (nC) 0.05 C rss f = 1 MHz VGS = 0 V 1 2 5 10 25 0 0.0001 40 0.001 0.01 0.1 1 10 SINGLE PULSE TIME (sec) , DRAI N−SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area Figure 10. Single Pulse Maximum Power Dissipation www.onsemi.com 5 200 FDG6321C VGS =−4.5 V −3.0 V −2.7 V −2.5 V 0.9 0.6 R DS(ON), NORMALIZED −I D , DRAIN−SOURCE CURRENT (A) 1.2 −2.0 V 0.3 −1.5 V 0 0 1 2 3 DRAIN−SOURCE ON−RESISTANCE TYPICAL PERFORMANCE CHARACTERISTICS: P−CHANNEL 2.5 −2.5 V 1.5 −V DS , DRAIN−SOURCE VOLTAGE (V) 0 0.2 0.4 0.6 0.8 1 1.2 Figure 12. On−Resistance Variation with Drain Current and Gate Voltage 5 R DS(ON) , ON−RESISTANCE ( W) I D = −0.41 A V GS = −4.5 V 1.2 1 0.8 0.6 −50 −25 0 25 50 75 100 125 I D =−0.2 A 4 3 2 TJ =125°C 1 25°C 0 150 1 2 T , JUNCTION TEMPERATURE (°C) Figure 13. On−Resistance Variation with Temperature 1 25°C 0.8 125°C 0.6 0.4 0.2 0 0.5 1 1.5 2 4 5 Figure 14. On−Resistance Variation with Gate−to−Source Voltage TJ = −55°C V DS = −5 V 3 −V GS , GATE TO SOURCE VOLTAGE (V) J 2.5 1 −I , REVERSE DRAIN CURRENT (A) R DS(ON) , NORMALIZED DRAIN−SOURCE ON−RESISTANCE −3.5 V −I D , DRAIN CURRENT (A) 1.6 −I , DRAIN CURRENT (A) −3.0 V −4.5 V Figure 11. On−Region Characteristics 1.4 −2.7 V 1 0.5 4 VGS = −2.0 V 2 VGS = 0 V 0.1 25°C 0.01 −VGS , GATE TO SOURCE VOLTAGE (V) Figure 15. Transfer Characteristics −55°C 0.001 0.0001 0.2 3 TJ = 125°C 0.4 0.6 0.8 1 −VSD , BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 16. Body Diode Forward Voltage Variation with Source Current and Temperature www.onsemi.com 6 FDG6321C 5 I D = −0.41 A 200 VDS = −5 V −10 V 4 −15 V CAPACITANCE (pF) −V GS , GATE−SOURCE VOLTAGE (V) TYPICAL PERFORMANCE CHARACTERISTICS: P−CHANNEL (continued) 3 2 80 30 5 0 0.4 0.8 1.2 Coss 10 1 0 Ciss 3 0.1 1.6 0.3 1 2 5 Figure 17. Gate Charge Characteristics 50 1 40 SINGLE PULSE RqJA = 415°C/W TA = 25°C POWER (W) 0.5 0.1 0.01 0.1 VGS = −4.5 V SINGLE PULSE RqJA = 415°C/W TA = 25°C 0.2 0.5 25 Figure 18. Capacitance Characteristics 3 0.05 10 −V DS , DRAIN TO SOURCE VOLTAGE (V) Q g , GATE CHARGE (nC) −I D, DRAIN CURRENT (A) Crss f = 1 MHz VGS = 0 V 30 20 10 1 2 5 10 0 0.0001 25 40 0.001 0.01 0.1 1 10 SINGLE PULSE TIME (sec) − V DS , DRAIN−SOURCE VOLTAGE (V) Figure 19. Maximum Safe Operating Area Figure 20. Single Pulse Maximum Power Dissipation www.onsemi.com 7 200 FDG6321C TYPICAL PERFORMANCE CHARACTERISTICS: N & P−CHANNEL r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 0.5 D = 0.5 0.2 0.2 0.1 0.05 0.02 RqJA (t) = r(t) * RqJA RqJA = 415°C/W 0.1 0.05 P(pk) 0.02 0.01 t1 Single Pulse 0.01 t2 TJ − TA = P * RqJA (t) Duty Cycle, D = t1 / t2 0.005 0.002 0.0001 0.001 0.01 0.1 1 10 100 200 t 1, TIME (sec) Thermal characterization performed using the conditions described in Note 1. Transient thermal response will change depending on the circuit board design. Figure 21. Transient Thermal Response Curve ORDERING INFORMATION Device Order Number Device Marking Package Type Shipping† FDG6321C 21 SC−88/SC70−6/SOT−363 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 8 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SC−88 (SC−70 6 Lead), 1.25x2 CASE 419AD−01 ISSUE A SYMBOL D e e E1 E DATE 07 JUL 2010 MIN MAX A 0.80 1.10 A1 0.00 0.10 A2 0.80 1.00 b 0.15 0.30 c 0.10 0.18 D 1.80 2.00 2.20 E 1.80 2.10 2.40 E1 1.15 1.25 1.35 0.65 BSC e L TOP VIEW NOM 0.26 0.36 L1 0.42 REF L2 0.15 BSC 0.46 θ 0º 8º θ1 4º 10º q1 A2 A q b q1 L L1 A1 SIDE VIEW c L2 END VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-203. DOCUMENT NUMBER: DESCRIPTION: 98AON34266E Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. SC−88 (SC−70 6 LEAD), 1.25X2 PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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