FDG6324L

June 1999 FDG6324L Integrated Load Switch General Description Features VDROP =0.2V @ VIN=12V, I L=0.36A. R (ON) = 0.55Ω. VDROP =0.2V @ This device is intended to be configured as a load switch and is particularly suited for compact computer peripheral switching applications where 3V to 20V input and 0.6A output current capability are needed. This device features a small N-Channel MOSFET (Q1) together with a large P-Channel Power MOSFET (Q2) in a single SC70-6 package. VIN=5V, I L=0.27A. R (ON) = 0.75Ω. Very small package outline (SC70-6). Control MOSFET (Q1) includes Zener protection for ESD ruggedness (>6KV Human Body Model). High density cell design for extremely low on-resistance. SC70-6 SuperSOTTM-6 SOT-23 3 4 V IN , R1 . SuperSOTTM-8 24 SOT-223 SO-8 VOUT , C1 EQUIVALENT APPLICATION Q2 5 VON/OFF 2 VOUT , C1 1 R2 V + DROP - IN OUT Q1 pin 1 6 R 1, C 1 SC70-6 Absolute Maximum Ratings Symbol Parameter VIN ON/OFF See Application Circuit TA = 25°C unless otherwise noted FDG6324L Units Input Voltage Range 3 - 20 V VON/OFF On/Off Voltage Range 2.5 - 8 V IL Load Current 0.6 A PD Maximum Power Dissipation TJ ,TSTG Operating and Storage Temperature Range ESD Electrostatic Discharge Rating Human Body Model (100pf/1500Ohm) - Continuous (Note 1) - Pulsed (Note 1 & 3) (Note 2) 1.8 0.3 W -55 to 150 °C 6 kV 415 °C/W THERMAL CHARACTERISTICS R θJA Thermal Resistance, Junction-to-Ambient (Note 2) FDG6324L Rev.D Electrical Characteristics (T Symbol A = 25°C unless otherwise noted) Parameter Conditions Min Typ Max Units 1 µA 0.2 V OFF CHARACTERISTICS I FL Forward Leakage Current ON CHARACTERISTICS (Note 3) VDROP Conduction Voltage Drop R (ON) Q2 - Static On-Resistance IL VIN = 20 V, VON/OFF = 0 V Load Current VIN = 12 V, VON/OFF = 3.3 V, I L = 0.36 A 0.14 VIN = 5 V, VON/OFF = 3.3 V, I L = 0.27 A 0.16 0.2 VGS = -12 V, I D = -0.6 A 0.37 0.55 VGS = -5 V, I D = -0.5 A 0.58 0.75 VDROP = 0.2 V, VIN = 12 V, VON/OFF = 3.3 V 0.36 VDROP = 0.2 V, VIN = 5 V, VON/OFF = 3.3 V 0.27 Ω A Notes: 1. Range of Vin can be up to 25V, but R1 and R2 must be scaled such that V GS of Q2 does not exceed -20V. 2. Rθ JA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. Rθ JC is guaranteed by design while Rθ CA is determined by the user's board design. Thermal ratings based on minimum mounting pad. 3. Pulse Test: Pulse Width < 300µs, Duty Cycle< 2.0% FDG6324L Load Switch Application APPLICATION CIRCUIT Q2 IN OUT R1 C1 Q1 Co LOAD ON/OFF R2 External Component Recommendation For Co ≤ 1uF applications: R1 is required to turn Q2 off. R2 and C1 are optional for slew rate control. First select R2, 100 -1KΩ, for slew rate control. Then select R1 such that the ratio R1/R2 is maintained between 10-100. SPICE model (FDG6324L.MOD) available at www.fairchildsemi.com. FDG6324L Rev.D Typical Electrical Characteristics (TA = 25 O C unless otherwise noted ) 1.2 1.2 P 1 0.9 TJ = 125°C O 0.8 VD R O ,P(V) ,R(V) V IN = 5V V ON/OFF = 2.5 - 8V PW =300us, D≤ 2% V IN = 12V VON/OFF = 2.5 - 8V PW =300us, D≤ 2% 0.6 VD TJ = 25°C TJ = 125°C TJ = 25°C 0.6 0.4 0.3 0.2 0 0 0 0.5 1 I L , (A) 1.5 2 0 0.4 0.8 1.2 1.6 2 IL , (A) Figure 2. Conduction Voltage Drop Variation with Load Current. Figure 1. Conduction Voltage Drop Variation with Load Current. 1.5 IL = 0.5A VON/OFF = 2.5 - 8V PW =300us, D≤ 2% 0.9 T = 125°C J 0.6 25°C 0.3 2 4 6 8 10 12 V IN, (V) Figure 3. On-Resistance Variation with Input Voltage. 1 TRANSIENT THERMAL RESISTANCE 0 r(t), NORMALIZED EFFECTIVE R (ON) ,(Ohm) 1.2 0.5 D = 0.5 0.2 0.2 0.1 0.05 0.02 0.01 R θ JA (t) = r(t) * R θJA R θ JA =415 °C/W 0.1 P(pk) 0.05 t1 0.02 0.01 t2 TJ - TA = P * R θJA (t) Single Pulse Duty Cycle, D = t 1 / t 2 0.005 0.002 0.0001 0.001 0.01 0.1 1 10 100 200 t 1, TIME (sec) Figure 4. Transient Thermal Response Curve. 2. Thermal characterization performed using the conditions described in Note Transient thermal response will change depending on the circuit board FDG6324L Rev.D TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ISOPLANAR™ MICROWIRE™ POP™ PowerTrench™ QFET™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 ACEx™ CoolFET™ CROSSVOLT™ E2CMOSTM FACT™ FACT Quiet Series™ FAST® FASTr™ GTO™ HiSeC™ TinyLogic™ UHC™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.