MOSFET – N-Channel,
POWERTRENCH
150 V, 167 A, 5.9 mW
FDH055N15A
Description
This N−Channel MOSFET is produced using ON Semiconductor’s
advanced POWERTRENCH® process that has been tai−lored
to minimize the on−state resistance while maintaining superior
switching performance.
Features
•
•
•
•
•
•
RDS(on) = 4.8 mW (Typ.) @ VGS = 10 V, ID = 120 A
Fast Switching Speed
Low Gate Charge
High Performance Trench Technology for Extremely Low RDS(on)
High Power and Current Handling Capability
This Device is Pb−Free and is RoHS Compliant
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VDS
RDS(ON) MAX
ID MAX
150 V
5.9 mW @ 10 V
167 A
Applications
•
•
•
•
Synchronous Rectification for ATX / Sever / Telecom PSU
Battery Protection Circuit
Motor Drives and Uninterruptible Power Supplies
Micro Solar Inverter
N-CHANNEL MOSFET
G
D
S
TO−247−3LD
CASE 340CK
MARKING DIAGRAM
$Y&Z&3&K
FDH
055N15A
$Y
&Z
&3
&K
FDH055N15A
= ON Semiconductor Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2011
October, 2020 − Rev. 4
1
Publication Order Number:
FDH055N15A/D
FDH055N15A
ABSOLUTE MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Symbol
Parameter
VDSS
Drain to Source Voltage
VGSS
Gate to Source Voltage
ID
Drain Current
Value
Unit
150
V
− DC
±20
V
− AC (f > 1 Hz)
±30
− Continuous (TC = 25°C, Silicon Limited)
167
(Note 1)
− Continuous (TC = 100°C, Silicon Limited)
118
− Continuous (TC = 25°C, Package Limited)
156
− Pulsed (Note 2)
668
A
IDM
Drain Current
EAS
Single Pulsed Avalanche Energy (Note 3)
835
mJ
dv/dt
Peak Diode Recovery dv/dt (Note 4)
6.0
V/ns
(TC = 25°C)
429
W
− Derate above 25°C
2.86
W/°C
−55 to + 175
°C
300
°C
PD
TJ, TSTG
TL
Power Dissipation
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 Second
A
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Calculated continuous current based on maximum allowable junction temperature, Package limitation current is 156 A.
2. Repetitive Rating: Pulse width limited by maximum junction temperature.
3. Starting TJ = 25°C, L = 3 mH, IAS = 23.6 A
4. ISD ≤ 120 A, di/dt ≤ 200 A/s, VDD ≤ BVDSS, Starting TJ = 25 °C.
THERMAL CHARACTERISTICS
Symbol
Parameter
RqJC
Thermal Resistance, Junction to Case, Max.
RqJA
Thermal Resistance, Junction to Ambient, Max.
FDH055N15A
Unit
0.35
°C/W
40
PACKAGE MARKING AND ORDERING INFORMATION
Part Number
Top Mark
Package
Package Method
Reel Size
Tape Width
Quantity
FDH055N15A
FDH055N15A
TO−247−3LD
Tube
N/A
N/A
30 Units
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2
FDH055N15A
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
150
−
−
V
OFF CHARACTERISTICS
Drain to Source Breakdown Voltage
ID = 250 mA, VGS = 0 V
DBVDSS
/ DTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 mA, Referenced to 25°C
−
0.1
−
V/°C
IDSS
Zero Gate Voltage Drain Current
VDS = 120 V, VGS = 0 V
−
−
1
mA
VDS = 120 V, TC = 150°C
−
−
500
VGS = ±20 V, VDS = 0 V
−
−
±100
BVDSS
IGSS
Gate to Body Leakage Current
nA
ON CHARACTERISTICS
VGS(th)
Gate Threshold Voltage
VGS = VDS, ID = 250 mA
2.0
−
4.0
V
RDS(on)
Static Drain to Source On Resistance
VGS = 10 V, ID = 120 A
−
4.8
5.9
mW
Forward Transconductance
VDS = 10 V, ID = 120 A
−
219
−
S
VDS = 75 V, VGS = 0 V,
f = 1 MHz
−
7100
9445
pF
−
664
885
pF
gFS
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
−
23
35
pF
Coss(er)
Energy Related Output Capacitance
VDS = 75 V, VGS = 0 V
−
1159
−
pF
Qg(tot)
Total Gate Charge at 10 V
VDS = 75 V, ID = 120 A,
VGS = 10 V
(Note 5)
−
92
−
nC
−
31
−
nC
Qgs
Gate to Source Gate Charge
Qgs2
Gate Charge Threshold to Plateau
−
15
−
nC
Qgd
Gate to Drain “Miller” Charge
−
16
−
nC
ESR
Equivalent Series Resistance(G−S)
f = 1 MHz
−
1.2
−
W
VDD = 75 V, ID = 120 A,
VGS = 10 V, RG = 4.7 W
(Note 5)
−
35
80
ns
−
67
144
ns
SWITCHING CHARACTERISTICS
td(on)
Turn-On Delay Time
tr
Turn−On Rise Time
td(off)
Turn-Off Delay Time
−
71
152
ns
Turn−Off Fall Time
−
21
52
ns
Maximum Continuous Drain to Source Diode Forward Current
−
−
167
(Note 1)
A
ISM
Maximum Pulsed Drain to Source Diode Forward Current
−
−
668
A
VSD
tf
DRAIN-SOURCE DIODE CHARACTERISTICS
IS
Drain to Source Diode Forward Voltage
VGS = 0 V, ISD = 120 A
−
−
1.25
V
trr
Reverse Recovery Time
−
105
−
ns
Qrr
Reverse Recovery Charge
VGS = 0 V, ISD = 120 A, VDS = 75 V,
dIF/dt = 100 A/ms
−
342
−
nC
Qrr
Reverse Recovery Charge
VGS = 0 V, ISD = 30 A, VDS = 75 V,
dIF/dt = 100 A/ms
−
348
−
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Essentially Independent of Operating Temperature Typical Characteristics.
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3
FDH055N15A
TYPICAL CHARACTERISTICS
500
VGS = 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
100
5.5 V
5.0 V
ID, Drain Current [A]
ID, Drain Current [A]
500
100
1
−55°C
1
4
2
6
5
500
IS, Reverse Drain Current [A]
RDS(ON) [mW],
Drain−Source On−Resistance
6.5
6.0
5.5
VGS = 10 V
5.0
VGS = 20 V
4.5
100
175°C
50
25°C
10
*Note: TC = 25°C
0
1
0.2
100 150 200 250 300 350 400 450
*Notes:
1. VGS = 0 V
2. 250 ms Pulse Test
0.4
0.6
0.8
1.0
1.2
1.4
VSD, Body Diode Forward Voltage [V]
ID, Drain Current [A]
Figure 4. Body Diode Forward Voltage Variation
vs. Source Current and Temperature
Figure 3. On−Resistance Variation vs. Drain Current
and Gate Voltage
10000
10
VGS, Gate−Source Voltage [V]
Ciss
Capacitance [pF]
4
Figure 2. Transfer Characteristics
Figure 1. On−Region Characteristics
1000
Coss
*Notes:
100 1. VGS = 0 V
2. f = 1 MHz
10
3
VGS, Gate−Source Voltage [V]
VDS, Drain−Source Voltage [V]
4.0
25°C
175°C
10
*Notes:
1. 250 ms Pulse Test
2. TC = 25°C
10
0.1
*Notes:
1. VDS = 10 V
2. 250 ms Pulse Test
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
0.1
1
Crss
10
6
4
2
0
100 200
VDS = 30 V
VDS = 75 V
VDS = 120 V
8
*Note: ID = 120 A
0
25
50
75
100
QG, Total Gate Charge [nC]
VDS, Drain−Source Voltage [V]
Figure 6. Gate Charge Characteristics
Figure 5. Capacitance Characteristics
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4
FDH055N15A
TYPICAL CHARACTERISTICS (continued)
2.8
RDS(ON), (Normalized)
Drain−Source On−Resistance
BVDSS, (Normalized)
Drain−Source Breakdown Voltage
1.15
1.10
1.05
1.00
*Notes:
1. VGS = 0 V
2. ID = 250 mA
0.95
0.90
−100
−50
0
50
100
150
2.4
2.0
1.6
1.2
0.4
−100
200
*Notes:
1. VGS = 10 V
2. ID = 120 A
0.8
−50
0
50
100
150
200
TJ, Junction Temperature [°C]
TJ, Junction Temperature [°C]
Figure 8. On−Resistance Variation
vs. Temperature
Figure 7. Breakdown Voltage Variation
vs. Temperature
1000
180
1 ms
10
Operation in This Area
1 is Limited by RDS(on)
10 ms
DC
*Notes:
1. TC = 25°C
2. TJ = 175°C
3. Single Pulse
0.1
0.01
ID, Drain Current [A]
100 ms
100
1
135
VGS = 10 V
90
Limited by Package
45
10
100
0
200
RqJC = 0.35°C/W
25
50
75
6
4
2
0
125
150
175
Figure 10. Maximum Drain Current
vs. Case Temperature
8
0
100
TC, Case Temperature [°C]
VDS, Drain−Source Voltage [V]
Figure 9. Maximum Safe Operating Area
Eoss, [mJ]
ID, Drain Current [A]
10 ms
30
60
90
120
150
VDS, Drain to Source [V]
Figure 11. Eoss vs. Drain to Source Voltage
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5
FDH055N15A
ZqJC(t), Thermal Response [°C/W]
TYPICAL CHARACTERISTICS (continued)
1
0.5
0.1 0.2
0.1
0.05
0.02
0.01 0.01
Single Pulse
0.001
10−5
10−4
P
DM
t
1
t
2
*Notes:
1. ZqJC(t) = 0.35°C/W Max.
2. Duty Factor, D = t1/t2
3. TJM − TC = PDM * ZqJC(t)
10−3
10−2
10−1
t1, Rectangular Pulse Duration [sec]
Figure 12. Transient Thermal Response Curve
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6
1
FDH055N15A
VGS
RL
Qg
VDS
VGS
Qgs
Qgd
DUT
IG = const.
Charge
Figure 13. Gate Charge Test Circuit & Waveform
RL
VDS
VDS
90%
VDD
VGS
RG
VGS
DUT
VGS
10%
td(on)
td(off) t
f
tr
ton
toff
Figure 14. Resistive Switching Test Circuit & Waveforms
L
E AS + 1 LI AS
2
VDS
BVDSS
ID
IAS
RG
VDD
DUT
VGS
2
ID(t)
VDD
VDS(t)
tp
tp
Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms
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7
Time
FDH055N15A
+
DUT
VDS
−
ISD
L
Driver
RG
Same Type
as DUT
VGS
− dv/dt controlled by RG
− ISD controlled by pulse period
D+
VGS
(Driver)
VDD
Gate Pulse Width
Gate Pulse Period
10 V
IFM, Body Diode Forward Current
ISD
(DUT)
di/dt
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VDS
(DUT)
VDD
VSD
Body Diode
Forward Voltage Drop
Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms
POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States
and/or other countries.
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8
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−247−3LD SHORT LEAD
CASE 340CK
ISSUE A
A
DATE 31 JAN 2019
A
E
P1
P
A2
D2
Q
E2
S
B
D
1
2
D1
E1
2
3
L1
A1
L
b4
c
(3X) b
0.25 M
(2X) b2
B A M
DIM
(2X) e
GENERIC
MARKING DIAGRAM*
AYWWZZ
XXXXXXX
XXXXXXX
XXXX = Specific Device Code
A
= Assembly Location
Y
= Year
WW = Work Week
ZZ
= Assembly Lot Code
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
DOCUMENT NUMBER:
DESCRIPTION:
98AON13851G
TO−247−3LD SHORT LEAD
A
A1
A2
b
b2
b4
c
D
D1
D2
E
E1
E2
e
L
L1
P
P1
Q
S
MILLIMETERS
MIN NOM MAX
4.58 4.70 4.82
2.20 2.40 2.60
1.40 1.50 1.60
1.17 1.26 1.35
1.53 1.65 1.77
2.42 2.54 2.66
0.51 0.61 0.71
20.32 20.57 20.82
13.08
~
~
0.51 0.93 1.35
15.37 15.62 15.87
12.81
~
~
4.96 5.08 5.20
~
5.56
~
15.75 16.00 16.25
3.69 3.81 3.93
3.51 3.58 3.65
6.60 6.80 7.00
5.34 5.46 5.58
5.34 5.46 5.58
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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