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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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FDMA7630
Single N-Channel PowerTrench® MOSFET
30 V, 11 A, 13 mΩ
Features
General Description
Max rDS(on) = 13 mΩ at VGS = 10 V, ID = 11 A
This device has been designed to provide maximum efficiency
and thermal performance for synchronous buck converters. The
low rDS(on) and gate charge provide excellent switching
performance.
Max rDS(on) = 20 mΩ at VGS = 4.5 V, ID = 9 A
Low Profile - 0.8 mm maximum - in the new package
MicroFET 2x2 mm
Free from halogenated compounds and antimony oxides
Application
RoHS compliant
Pin 1
DC – DC Buck Converters
D
D
G
Drain
Bottom Drain Contact
D
D
D
D
G
S
Source
S
D
D
MicroFET 2X2 (Bottom View)
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDSS
Drain to Source Voltage
Parameter
VGSS
Gate to Source Voltage
Drain Current -Continuous
ID
TA = 25 °C
(Note 1a)
-Pulsed
PD
TJ, TSTG
Ratings
30
Units
V
±20
V
11
24
Power Dissipation
TA = 25 °C
(Note 1a)
2.4
Power Dissipation
TA = 25 °C
(Note 1b)
0.9
Operating and Storage Junction Temperature Range
–55 to +150
A
W
°C
Thermal Characteristics
RθJA
Thermal Resistance, Junction to Ambient
(Note 1a)
52
RθJA
Thermal Resistance, Junction to Ambient
(Note 1b)
145
°C/W
Package Marking and Ordering Information
Device Marking
630
Device
FDMA7630
©2012 Fairchild Semiconductor Corporation
FDMA7630 Rev.C5
Package
MicroFET 2x2
1
Reel Size
7 ’’
Tape Width
8 mm
Quantity
3000 units
www.fairchildsemi.com
FDMA7630 Single N-Channel Power Trench® MOSFET
May 2014
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
1
μA
IGSS
Gate to Source Leakage Current
VGS = 20 V, VDS = 0 V
100
nA
3.0
V
30
V
15
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
–6
VGS = 10 V, ID = 11 A
10
rDS(on)
Static Drain to Source On Resistance
VGS = 4.5 V, ID = 9 A
14
20
VGS = 10 V, ID = 11 A, TJ = 125 °C
14
18
VDS = 5 V, ID = 11 A
36
gFS
Forward Transconductance
1.0
2.0
mV/°C
13
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
VDS = 15 V, VGS = 0 V
f = 1.0 MHz
1020
1360
pF
315
415
pF
35
55
pF
Ω
1.7
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
VDD = 15 V, ID = 11 A
VGS = 10 V, RGEN = 6 Ω
Qg
Total Gate Charge
VGS = 0 V to 10 V
Qg
Total Gate Charge
VGS = 0 V to 4.5 V
Qgs
Gate to Source Gate Charge
Qgd
Gate to Drain “Miller” Charge
VDD = 15 V,
ID = 11 A
8
15
ns
3
10
ns
19
34
ns
3
10
ns
16
22
nC
8
10
nC
3.0
nC
2.2
nC
Drain-Source Diode Characteristics
IS
Maximum Continuous Drain-Source Diode Forward Current
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 2 A
IF = 11 A, di/dt = 100 A/μs
2
(Note 2)
A
0.8
1.2
V
21
33
ns
6
12
nC
NOTES:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a. 52 °C/W when mounted
on a 1 in2 pad of 2 oz copper.
b. 145 °C/W when mounted on a
minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
©2012 Fairchild Semiconductor Corporation
FDMA7630 Rev.C5
2
www.fairchildsemi.com
FDMA7630 Single N-Channel Power Trench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
24
3.0
ID, DRAIN CURRENT (A)
20
16
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
VGS = 10 V
VGS = 6 V
VGS = 4.5 V
VGS = 4 V
VGS = 3.5 V
12
8
4
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0
0.5
1.0
1.5
2.0
VGS = 4 V
VGS = 4.5 V
1.5
1.0
VGS = 6 V VGS = 10 V
0.5
2.0
0
4
8
VDS, DRAIN TO SOURCE VOLTAGE (V)
rDS(on), DRAIN TO
1.4
1.2
1.0
0.8
0.6
-75
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
20
24
60
ID = 11 A
VGS = 10 V
ID = 11 A
40
30
10
TJ = 25 oC
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
IS, REVERSE DRAIN CURRENT (A)
125 oC
12
TJ = 25 oC
TJ = -55 oC
4
1.5
2.0
2.5
3.0
3.5
4.0
4.5
8
10
VGS = 0 V
10
TJ = 125 oC
1
TJ = 25 oC
0.1
TJ = -55 oC
0.01
0.2
5.0
VGS, GATE TO SOURCE VOLTAGE (V)
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
Figure 5. Transfer Characteristics
©2012 Fairchild Semiconductor Corporation
FDMA7630 Rev.C5
6
24
VDS = 5 V
0
1.0
4
Figure 4. On-Resistance vs Gate to
Source Voltage
16
8
2
VGS, GATE TO SOURCE VOLTAGE (V)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
TJ =
TJ = 125 oC
20
0
-50
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
50
Figure 3. Normalized On- Resistance
vs Junction Temperature
ID, DRAIN CURRENT (A)
16
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.6
20
12
ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics
24
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 3.5 V
2.5
3
www.fairchildsemi.com
FDMA7630 Single N-Channel Power Trench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
3000
VGS, GATE TO SOURCE VOLTAGE (V)
10
ID = 11 A
1000
CAPACITANCE (pF)
8
VDD = 10 V
6
VDD = 15 V
4
VDD = 20 V
Ciss
Coss
100
2
f = 1 MHz
VGS = 0 V
0
0
5
10
15
10
0.1
20
1
Qg, GATE CHARGE (nC)
10
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 8. Capacitance vs Drain
to Source Voltage
Figure 7. Gate Charge Characteristics
50
1000
P(PK), PEAK TRANSIENT POWER (W)
ID, DRAIN CURRENT (A)
Crss
10
1 ms
1
THIS AREA IS
LIMITED BY rDS(on)
10 ms
100 ms
SINGLE PULSE
TJ = MAX RATED
0.1
1s
RθJA = 145 oC/W
DERIVED FROM
TEST DATA
TA = 25 oC
0.01
0.01
10 s
DC
0.1
1
10
100
SINGLE PULSE
RθJA = 145 oC/W
VGS = 10 V
TA = 25 oC
100
10
1
0.1
-4
10
-3
10
VDS, DRAIN to SOURCE VOLTAGE (V)
-2
10
-1
10
1
10
100
1000
t, PULSE WIDTH (sec)
Figure 9. Forward Bias Safe
Operating Area
Figure 10. Single Pulse Maximum
Power Dissipation
2
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
0.01
t2
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
o
RθJA = 145 C/W
0.001
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 11. Transient Thermal Response Curve
©2012 Fairchild Semiconductor Corporation
FDMA7630 Rev.C5
4
www.fairchildsemi.com
FDMA7630 Single N-Channel Power Trench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
2.0
0.05 C
A
B
2X
2.0
1.70
(0.20)
1.00
PIN#1 IDENT
0.05 C
TOP VIEW
No Traces
allowed in
this Area
4
6
2X
1.05
2.30
0.10 C
0.47(6X)
0.08 C
1
SIDE VIEW
C
0.40(6X)
0.65
RECOMMENDED
LAND PATTERN OPT 1
SEATING
PLANE
(0.15)
3
(0.50)
1.70
PIN #1 IDENT
1
0.45
(0.20)
(0.20)4X
3
1.00
6
(6X)
4
(0.50)
1.05
6
4
0.65
1.30
0.10
0.05
BOTTOM VIEW
NOTES:
A. PACKAGE DOES NOT FULLY CONFORM
TO JEDEC MO-229 REGISTRATION
B. DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSIONS AND TOLERANCES PER
ASME Y14.5M, 2009.
D. LAND PATTERN RECOMMENDATION IS
EXISTING INDUSTRY LAND PATTERN.
E. DRAWING FILENAME: MKT-MLP06Lrev4.
(6X)
C A B
C
0.66
2.30
0.47(6X)
1
0.65
3
0.40(7X)
RECOMMENDED
LAND PATTERN OPT 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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