FDMA86551L

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The low rDS(on) and gate charge provide excellent switching performance. „ Max rDS(on) = 35 mΩ at VGS = 4.5 V, ID = 6 A „ Low Profile - 0.8 mm maximum in the new package MicroFET 2x2 mm „ Free from halogenated compounds and antimony oxides Application „ RoHS Compliant „ DC – DC Buck Converters Pin 1 D D G Drain Bottom Drain Contact D D D D G S Source D S D MicroFET 2X2 (Bottom View) MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current ID -Continuous TA = 25 °C -Pulsed Single Pulse Avalanche Energy EAS PD TJ, TSTG Ratings 60 Units V ±20 V (Note 1a) 7.5 (Note 4) 45 (Note 3) 37 Power Dissipation TA = 25 °C (Note 1a) 2.4 Power Dissipation TA = 25 °C (Note 1b) 0.9 Operating and Storage Junction Temperature Range -55 to +150 A mJ W °C Thermal Characteristics RθJA Thermal Resistance, Junction to Ambient (Note 1a) 52 RθJA Thermal Resistance, Junction to Ambient (Note 1b) 145 °C/W Package Marking and Ordering Information Device Marking 551 Device FDMA86551L ©2013 Fairchild Semiconductor Corporation FDMA86551L Rev.C2 Package MicroFET 2X2 1 Reel Size 7” Tape Width 8 mm Quantity 3000 units www.fairchildsemi.com FDMA86551L Single N-Channel PowerTrench® MOSFET October 2014 Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = 48 V, VGS = 0 V 1 μA IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V 100 nA 3.0 V 60 V 31 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C rDS(on) gFS Static Drain to Source On Resistance Forward Transconductance 1.0 1.8 -5 mV/°C VGS = 10 V, ID = 7.5 A 19 23 VGS = 4.5 V, ID = 6 A 26 35 VGS = 10 V, ID = 7.5 A, TJ = 125 °C 28 33 VDD = 5 V, ID = 7.5 A 21 VDS = 30 V, VGS = 0 V, f = 1 MHz 881 1235 pF 182 255 pF 6.1 15 pF 0.5 1.5 Ω 7.3 15 ns 1.7 10 ns 16 29 ns 1.4 10 ns nC mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance 0.1 Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg(TOT) Total Gate Charge VGS = 0 V to 10 V 12 17 Qg(TOT) Total Gate Charge 5.8 8.1 nC Qgs Gate to Source Charge VGS = 0 V to 4.5 V VDD = 30 V, ID = 7.5 A 2.7 3.8 nC Qgd Gate to Drain “Miller” Charge 1.4 2.0 nC VDD = 30 V, ID = 7.5 A, VGS = 10 V, RGEN = 6 Ω Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 2 A (Note 2) 0.8 1.2 V VGS = 0 V, IS = 7.5 A (Note 2) 0.9 1.2 V IF = 7.5 A, di/dt = 100 A/μs 23 37 ns 9.7 19 nC NOTES: 1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined by the user's board design. a. 52 °C/W when mounted on a 1 in2 pad of 2 oz copper. b. 145 °C/W when mounted on a minimum pad of 2 oz copper. SS SF DS DF G SS SF DS DF G 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. EAS of 37 mJ is based on starting TJ = 25 °C, L = 3 mH, IAS = 5 A, VDD = 60 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 16 A. 4. Pulse Id measured at td