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FDMA910PZ
Single P-Channel PowerTrench® MOSFET
-20 V, -9.4 A, 20 mΩ
Features
General Description
Max rDS(on) = 20 mΩ at VGS = -4.5 V, ID = -9.4 A
This device is designed specifically for battery charge or load
switching in cellular handset and other ultraportable
applications.It features a MOSFET with low on-state resistance
and zener diode protection against ESD. The MicroFET 2X2
package offers exceptional thermal performance for its physical
size and is well suited to linear mode applications.
Max rDS(on) = 24 mΩ at VGS = -2.5 V, ID = -8.6 A
Max rDS(on) = 34 mΩ at VGS = -1.8 V, ID = -7.2 A
Low Profile - 0.8 mm maximum in the new package MicroFET
2x2 mm
HBM ESD protection level > 2.8k V typical (Note 3)
Free from halogenated compounds and antimony oxides
RoHS Compliant
Pin 1
D
G
D
Bottom Drain Contact
Drain
Source
D
D
D
1
6
D
D
2
5
D
G
3
4
S
S
MicroFET 2X2 (Bottom View)
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
-Continuous
ID
TA = 25°C
(Note 1a)
-Pulsed
PD
TJ, TSTG
Ratings
-20
Units
V
±8
V
-9.4
-45
Power Dissipation
TA = 25°C
(Note 1a)
2.4
Power Dissipation
TA = 25°C
(Note 1b)
0.9
Operating and Storage Junction Temperature Range
-55 to +150
A
W
°C
Thermal Characteristics
RθJA
Thermal Resistance, Junction to Ambient
(Note 1a)
52
RθJA
Thermal Resistance, Junction to Ambient
(Note 1b)
145
°C/W
Package Marking and Ordering Information
Device Marking
910
Device
FDMA910PZ
©2012 Fairchild Semiconductor Corporation
FDMA910PZ Rev.C5
Package
MicroFET 2X2
1
Reel Size
7”
Tape Width
8 mm
Quantity
3000 units
www.fairchildsemi.com
FDMA910PZ Single P-Channel PowerTrench® MOSFET
June 2014
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = -250 μA, VGS = 0 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = -250 μA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = -16 V, VGS = 0 V
-1
μA
IGSS
Gate to Source Leakage Current
VGS = ±8 V, VDS = 0 V
±1
μA
-1.5
V
-20
V
-12
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = -250 μA
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = -250 μA, referenced to 25 °C
rDS(on)
gFS
Static Drain to Source On Resistance
Forward Transconductance
-0.4
-0.5
3
mV/°C
VGS = -4.5 V, ID = -9.4 A
16
20
VGS = -2.5 V, ID = -8.6 A
19
24
VGS = -1.8 V, ID = -7.2 A
24
34
VGS = -4.5 V, ID = -9.4 A,
TJ = 125 °C
20
25
VDD = -5 V, ID = -9.4 A
52
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = -10 V, VGS = 0 V,
f = 1 MHz
2110
2805
pF
414
620
pF
388
580
pF
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg
Total Gate Charge
Qgs
Gate to Source Charge
Qgd
Gate to Drain “Miller” Charge
VDD = -10 V, ID = -9.4 A,
VGS = -4.5 V, RGEN = 6 Ω
VGS = -4.5 V, VDD = -10 V,
ID = -9.4 A
9.4
19
ns
19
34
ns
135
216
ns
103
165
ns
21
29
nC
2.5
nC
6
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = -2 A
(Note 2)
-0.6
-1.2
V
VGS = 0 V, IS = -9.4 A
(Note 2)
-0.8
-1.2
V
IF = -9.4 A, di/dt = 100 A/μs
23
37
ns
6.3
13
nC
NOTES:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθJA is determined by
the user's board design.
a. 52 °C/W when mounted
on a 1 in2 pad of 2 oz copper.
b. 145 °C/W when mounted on a
minimum pad of 2 oz copper.
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
©2012 Fairchild Semiconductor Corporation
FDMA910PZ Rev.C5
2
www.fairchildsemi.com
FDMA910PZ Single P-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
VGS = -4.5 V
VGS = -3.5 V
VGS = -1.8 V
VGS = -2.5 V
30
VGS = -1.5 V
15
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0.0
0.5
1.0
1.5
3
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
-ID, DRAIN CURRENT (A)
45
2.0
VGS = -1.5 V
VGS = -1.8 V
2
VGS = -2.5 V
1
VGS = -3.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0
15
30
-ID, DRAIN CURRENT (A)
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics
60
ID = -9.4 A
VGS = -4.5 V
rDS(on), DRAIN TO
1.3
1.2
1.1
1.0
0.9
0.8
-75
-50
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
45
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.4
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
45
ID = -9.4 A
30
TJ = 125 oC
15
0
1.0
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
Figure 3. Normalized On- Resistance
vs Junction Temperature
TJ = 25 oC
1.5
2.0
2.5
3.0
3.5
4.0
-VGS, GATE TO SOURCE VOLTAGE (V)
4.5
Figure 4. On-Resistance vs Gate to
Source Voltage
100
-IS, REVERSE DRAIN CURRENT (A)
45
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
-ID, DRAIN CURRENT (A)
VGS = -4.5 V
VDS = -5 V
30
TJ = 150 oC
15
TJ = 25 oC
TJ = -55 oC
0
0.5
1.0
1.5
10
1
TJ = 150 oC
TJ = 25 oC
0.1
TJ = -55 oC
0.01
0.001
0.0
2.0
0.2
0.4
0.6
0.8
1.0
1.2
-VSD, BODY DIODE FORWARD VOLTAGE (V)
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
©2012 Fairchild Semiconductor Corporation
FDMA910PZ Rev.C5
VGS = 0 V
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
3
www.fairchildsemi.com
FDMA910PZ Single P-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
5000
ID = -9.4 A
Ciss
VDD = -8 V
CAPACITANCE (pF)
-VGS, GATE TO SOURCE VOLTAGE (V)
4.5
3.0
VDD = -10 V
VDD = -12 V
1.5
1000
Coss
Crss
f = 1 MHz
VGS = 0 V
0.0
0
5
10
15
20
100
0.1
25
1
10
20
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain
to Source Voltage
-1
100
-2
VDS = 0 V
10
-ID, DRAIN CURRENT (A)
-Ig, GATE LEAKAGE CURRENT (A)
10
-3
10
-4
10
-5
10
TJ = 125 oC
-6
10
-7
10
TJ = 25 oC
-8
10
100 μs
10
1 ms
1
THIS AREA IS
LIMITED BY rDS(on)
-9
10
0
3
6
9
12
0.01
0.01
15
100 ms
1s
10 s
DC
SINGLE PULSE
TJ = MAX RATED
RθJA = 145 oC/W
TA = 25 oC
0.1
10
-10
10 ms
-VGS, GATE TO SOURCE VOLTAGE (V)
0.1
1
10
100
-VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 9. Gate Leakage Current vs Gate to
Source Voltage
Figure 10. Forward Bias Safe
Operating Area
P(PK), PEAK TRANSIENT POWER (W)
1000
100
10
SINGLE PULSE
o
RθJA = 145 C/W
o
1
0.5 -4
10
TA = 25 C
-3
10
-2
10
-1
10
1
10
100
1000
t, PULSE WIDTH (sec)
Figure 11. Single Pulse Maximum Power Dissipation
©2012 Fairchild Semiconductor Corporation
FDMA910PZ Rev.C5
4
www.fairchildsemi.com
FDMA910PZ Single P-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
2
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
0.01
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
SINGLE PULSE
o
RθJA = 145 C/W
0.001
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 12. Junction-to-Ambient Transient Thermal Response Curve
©2012 Fairchild Semiconductor Corporation
FDMA910PZ Rev.C5
5
www.fairchildsemi.com
FDMA910PZ Single P-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
FDMA910PZ Single P-Channel PowerTrench® MOSFET
Dimensional Outline and Pad Layout
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/package/packageDetails.html?id=PN_MLDEB-C06
©2012 Fairchild Semiconductor Corporation
FDMA910PZ Rev.C5
6
www.fairchildsemi.com
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
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Definition
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Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
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Datasheet contains preliminary data; supplementary data will be published at a later
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Semiconductor. The datasheet is for reference information only.
Rev. I68
©2012 Fairchild Semiconductor Corporation
FDMA910PZ Rev.C5
7
www.fairchildsemi.com
FDMA910PZ Single P-Channel PowerTrench® MOSFET
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
intended to be an exhaustive list of all such trademarks.
AccuPower™
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®*
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®
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PowerXS™
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®
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™
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Marking Small Speakers Sound Louder
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and Better™
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®
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Solutions for Your Success™
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®
OPTOLOGIC
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仙童 ™
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