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FDMC6686P
P-Channel PowerTrench® MOSFET
-20 V, -56 A, 4 mΩ
Features
General Description
Max rDS(on) = 4 mΩ at VGS = -4.5 V, ID = -18 A
This P-Channel MOSFET is produced using Fairchild
Semiconductor’s advanced PowerTrench® process that has
been optimized for rDS(ON), switching performance and
ruggedness.
Max rDS(on) = 5.7 mΩ at VGS = -2.5 V, ID = -16 A
Max rDS(on) =11.5 mΩ at VGS = -1.8 V, ID = -11 A
High performance trench technology for extremely low rDS(on)
Applications
High power and current handling capability in a widely used
surface mount package
Load Switch
Lead-free and RoHS Compliant
Battery Management
Power Management
Reverse Polarity Protection
Pin 1
Pin 1
S
D
D
Top
D
S
S
S
D
S
D
S
D
G
D
G
D
Bottom
Power 33
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current -Continuous
TC = 25 °C
-Continuous
TA = 25 °C
ID
-Pulsed
PD
TJ, TSTG
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Ratings
-20
Units
V
±8
V
-56
(Note 1a)
-18
(Note 3)
-377
(Note 1a)
2.3
40
Operating and Storage Junction Temperature Range
-55 to +150
A
W
°C
Thermal Characteristics
RθJC
Thermal Resistance, Junction to Case
RθJA
Thermal Resistance, Junction to Ambient
3.1
(Note 1a)
53
°C/W
Package Marking and Ordering Information
Device Marking
FDMC6686P
Device
FDMC6686P
©2014 Fairchild Semiconductor Corporation
FDMC6686P Rev.C1
Package
Power 33
1
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
www.fairchildsemi.com
FDMC6686P P-Channel PowerTrench® MOSFET
February 2015
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = -250 μA, VGS = 0 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = -250 μA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = -16 V, VGS = 0 V
-1
μA
IGSS
Gate to Source Leakage Current
VGS = ±8 V, VDS = 0 V
±100
nA
-1
V
-20
V
-15
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = -250 μA
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = -250 μA, referenced to 25 °C
rDS(on)
Static Drain to Source On Resistance
gFS
Forward Transconductance
-0.4
-0.75
3
mV/°C
VGS = -4.5 V, ID = -18 A
3.3
4
VGS = -2.5 V, ID = -16 A
4.1
5.7
VGS = -1.8 V, ID = -11 A
6
11.5
VGS = -4.5 V, ID = -18 A, TJ = 125 °C
4.3
6.5
VDS = -5 V, ID = -18 A
116
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
VDS = -10 V, VGS = 0 V,
f = 1 MHz
8800
13200
pF
1520
2280
pF
1340
2010
pF
Ω
6.2
Switching Characteristics
td(on)
Turn-On Delay Time
25
40
ns
tr
Rise Time
77
122
ns
td(off)
Turn-Off Delay Time
317
506
ns
tf
Fall Time
178
285
ns
Qg
Total Gate Charge
87
122
nC
Qgs
Gate to Source Charge
Qgd
Gate to Drain “Miller” Charge
VDD = -10 V, ID = -18 A,
VGS = -4.5 V, RGEN = 6 Ω
VDD = -10 V, ID = -18 A,
VGS = -4.5 V
14
nC
24
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = -18 A
(Note 2)
-0.7
-1.2
VGS = 0 V, IS = -2 A
(Note 2)
-0.6
-1.2
IF = -18 A, di/dt = 100 A/μs
V
38
61
ns
24
39
nC
NOTES:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.
a. 53 °C/W when mounted on a
1 in2 pad of 2 oz copper.
SS
SF
DS
DF
G
SS
SF
DS
DF
G
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. Pulse Id refers to Forward Bias Safe Operation Area.
©2014 Fairchild Semiconductor Corporation
FDMC6686P Rev.C1
2
www.fairchildsemi.com
FDMC6686P P-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
200
3
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
-ID, DRAIN CURRENT (A)
VGS = -4.5 V
VGS = -3.8 V
150
VGS = -3 V
VGS = -2.5 V
100
VGS = -1.8 V
50
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0.0
0.5
1.0
1.5
2.0
VGS = -1.8 V
2
VGS = -2.5 V
1
VGS = -3 V
0
VGS = -4.5 V
50
100
150
200
-ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics
Figure 2. Normalized On- Resistance
vs Drain Current and Gate Voltage
20
ID = -18 A
VGS = -4.5 V
1.4
rDS(on), DRAIN TO
1.3
1.2
1.1
1.0
0.9
0.8
0.7
-75
-50
SOURCE ON-RESISTANCE (mΩ)
1.5
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
VGS = -3.8 V
0
-VDS, DRAIN TO SOURCE VOLTAGE (V)
-IS, REVERSE DRAIN CURRENT (A)
150
VDS = -5 V
100
TJ = 150 oC
TJ = 25 oC
TJ = -55 oC
0
1
2
ID = -18 A
10
TJ = 125 oC
5
TJ = 25 oC
1.5
2.0
2.5
3.0
3.5
4.0
200
100
VGS = 0 V
10
TJ = 150 oC
1
TJ = 25 oC
0.1
TJ = -55 oC
0.01
0.001
0.0
3
0.2
0.4
0.6
0.8
1.0
1.2
-VGS, GATE TO SOURCE VOLTAGE (V)
-VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
©2014 Fairchild Semiconductor Corporation
FDMC6686P Rev.C1
4.5
Figure 4. On-Resistance vs Gate to
Source Voltage
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
15
-VGS, GATE TO SOURCE VOLTAGE (V)
200
50
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
1.0
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
Figure 3. Normalized On- Resistance
vs Junction Temperature
-ID, DRAIN CURRENT (A)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
3
1.4
www.fairchildsemi.com
FDMC6686P P-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
50000
ID = -18 A
VDD = -8 V
Ciss
CAPACITANCE (pF)
-VGS, GATE TO SOURCE VOLTAGE (V)
4.5
3.0
VDD = -10 V
VDD = -12 V
1.5
10000
Coss
Crss
1000
f = 1 MHz
VGS = 0 V
100
0.1
0.0
0
40
80
120
1
10
Figure 8. Capacitance vs Drain
to Source Voltage
Figure 7. Gate Charge Characteristics
100
500
o
10 us
-ID, DRAIN CURRENT (A)
RθJC = 3.1 C/W
-ID, DRAIN CURRENT (A)
80
VGS = -4.5 V
60
VGS = -2.5 V
40
20
100
100 us
10
THIS AREA IS
LIMITED BY rDS(on)
50
75
100
125
RθJC = 3.1 oC/W
0.1
0.1
150
1 ms
10 ms
DC
SINGLE PULSE
TJ = MAX RATED
1
TC = 25 oC
0
25
20
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
CURVE BENT TO
MEASURED DATA
1
o
TC, CASE TEMPERATURE ( C)
10
100
-VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 9. Maximum Continuous Drain
Current vs Case Temperature
Figure 10. Forward Bias Safe
Operating Area
P(PK), PEAK TRANSIENT POWER (W)
10000
SINGLE PULSE
o
RθJC = 3.1 C/W
o
TC = 25 C
1000
100
10
-5
10
-4
10
-3
-2
10
10
-1
10
1
t, PULSE WIDTH (sec)
Figure 11. Single Pulse Maximum Power Dissipation
©2014 Fairchild Semiconductor Corporation
FDMC6686P Rev.C1
4
www.fairchildsemi.com
FDMC6686P P-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
2
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
0.01
NOTES:
SINGLE PULSE
ZθJC(t) = r(t) x RθJC
RθJC = 3.1 oC/W
Peak TJ = PDM x ZθJC(t) + TC
Duty Cycle, D = t1 / t2
0.001
-5
10
-4
10
-3
-2
10
10
-1
10
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 12. Junction-to-Case Transient Thermal Response Curve
©2014 Fairchild Semiconductor Corporation
FDMC6686P Rev.C1
5
www.fairchildsemi.com
FDMC6686P P-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
3.40
3.20
PKG
CL
8
2.37 MIN
A
(0.45) 8
B
5
PKG
CL
3.40
3.20
PKG CL
SYM
CL
5
2.15 MIN
(0.40)
(0.65)
0.70 MIN
PIN 1
INDICATOR
1
4
1
4
0.65
1.95
SEE
DETAIL A
0.65
1
LAND PATTERN
RECOMMENDATION
0.10 C
1.95
0.10 C A B
0.37 (8X)
0.27
0.42 MIN
(8X)
4
0.60
0.40
0.80
0.70
0.08 C
0.25
0.15
0.05
0.00
C
SEATING
PLANE
PKG CL
1.99
1.79
SCALE: 2X
NOTES: UNLESS OTHERWISE SPECIFIED
(0.34)
(0.52 TYP)
8
5
(2.27)
(0.33) TYP
A) PACKAGE STANDARD REFERENCE:
JEDEC MO-240, ISSUE A, VAR. BA,
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS
OR MOLD FLASH. MOLD FLASH OR
BURRS DOES NOT EXCEED 0.10MM.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M-2009.
E) DRAWING FILE NAME: MKT-PQFN08SREV1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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