Dual N-Channel PowerTrench® MOSFET
30 V, 10 mΩ, 20 mΩ
General Description
This device includes two specialized N-Channel MOSFETs in a
due power33(3mm X 3mm MLP) package. The switch node has
been internally connected to enable easy placement and routing
of synchronous buck converters. The control MOSFET (Q1) and
synchronous MOSFET (Q2) have been designed to provide
optimal power efficiency.
Features
Q1: N-Channel
Max rDS(on) = 20 mΩ at VGS = 10 V, ID = 6 A
Max rDS(on) = 32 mΩ at VGS = 4.5 V, ID = 5 A
Applications
Q2: N-Channel
Max rDS(on) = 10 mΩ at VGS = 10 V, ID = 8.5 A
Mobile Computing
Max rDS(on) = 13.5 mΩ at VGS = 4.5 V, ID = 7.2 A
Mobile Internet Devices
RoHS Compliant
General Purpose Point of Load
Bottom
D1
Pin 1
G1
Bottom
D1
V
GHS IN
D1
D1
S1
D2/
VIN
E
OD
HN
C
T
I
GND
GND
GND
S2
S2
Q2
5
VIN
SW
S2
G2
VIN
4
6
3
7
2
8
GLS
1
Q1
Power33
MOSFET Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
(Note 4)
Drain Current -Continuous (Package limited)
ID
TC = 25 °C
TJ, TSTG
Units
V
±20
±20
V
18
13
TC = 25 °C
23
46
-Continuous
TA = 25 °C
6 1a
8.5 1b
40
27
-Pulsed
PD
Q2
30
-Continuous (Silicon limited)
Single Pulse Avalanche Energy
EAS
Q1
30
(Note 3)
12
32
Power Dissipation for Single Operation
TA = 25°C
1.9 1a
2.5 1b
Power Dissipation for Single Operation
TA = 25°C
0.7 1c
1.0 1d
Operating and Storage Junction Temperature Range
-55 to +150
A
W
°C
Thermal Characteristics
RθJA
Thermal Resistance, Junction to Ambient
65 1a
50 1b
RθJA
Thermal Resistance, Junction to Ambient
180 1c
125 1d
RθJC
Thermal Resistance, Junction to Case
7.5
4.2
°C/W
Package Marking and Ordering Information
Device Marking
FDMC8200S
Device
FDMC8200S
©2011 Semiconductor Components Industries, LLC.
October-2017,Rev.3
Package
Power 33
Reel Size
13”
Tape Width
12 mm
Quantity
3000 units
Publication Order Number:
FDMC8200S/D
FDMC8200S Dual N-Channel PowerTrench® MOSFET
FDMC8200S
Symbol
Parameter
Test Conditions
Type
Min
30
30
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ID = 1mA, VGS = 0 V
Q1
Q2
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25°C
ID = 1mA, referenced to 25°C
Q1
Q2
IDSS
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
Q1
Q2
1
500
μA
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
Q1
Q2
100
100
nA
nA
3.0
3.0
V
V
14
13
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
VGS = VDS, ID = 1mA
Q1
Q2
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25°C
ID = 1mA, referenced to 25°C
Q1
Q2
-5
-6
VGS = 10 V, ID = 6 A
VGS = 4.5 V, ID = 5 A
VGS = 10 V, ID = 6 A, TJ = 125°C
Q1
16
24
22
20
32
28
VGS = 10 V, ID = 8.5 A
VGS = 4.5 V, ID = 7.2 A
VGS = 10 V, ID = 8.5 A, TJ = 125°C
Q2
7.8
10.3
11.4
10.0
13.5
13.1
VDD = 5 V, ID = 6 A
VDD = 5 V, ID = 8.5 A
Q1
Q2
29
43
Q1
Q2
495
1080
660
1436
pF
Q1
Q2
145
373
195
495
pF
20
35
30
52
pF
1.4
1.2
4.2
3.6
Ω
Q1
Q2
11
7.6
20
15
ns
Q1
Q2
3.1
1.8
10
10
ns
Q1
Q2
35
21
56
34
ns
Q1
Q2
1.3
8.5
10
17
ns
Q1
Q2
7.3
15.7
10
22
nC
Q1
Q2
3.1
7.2
4.3
10
nC
Q1
Q2
1.8
3
nC
Q1
Q2
1
1.9
nC
rDS(on)
gFS
Static Drain to Source On Resistance
Forward Transconductance
1.0
1.0
2.3
2.0
mV/°C
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Q1
Q2
Rg
Gate Resistance
Q1
Q2
VDS = 15 V, VGS = 0 V, f = 1 MHZ
0.2
0.2
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg(TOT)
Total Gate Charge
Qg(TOT)
Total Gate Charge
Qgs
Gate to Source Charge
Qgd
Gate to Drain “Miller” Charge
Q1
VDD = 15 V, ID = 1 A,
VGS = 10 V, RGEN = 6 Ω
Q2
VDD = 15 V, ID = 1 A,
VGS = 10 V, RGEN = 6 Ω
VGS = 0 V to 10 V Q1
VDD = 15 V,
VGS = 0 V to 4.5 V ID = 6 A
Q2
VDD = 15 V
ID = 8.5 A
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FDMC8200S Dual N-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max
Units
Q1
Q2
Q2
0.8
0.8
0.6
1.2
1.2
0.8
V
Q1
Q2
13
20
24
32
ns
Q1
Q2
2.3
15
10
24
nC
Drain-Source Diode Characteristics
VSD
VGS = 0 V, IS = 6 A
Source-Drain Diode Forward Voltage VGS = 0 V, IS = 8.5 A
VGS = 0 V, IS = 1.3 A
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
(Note 2)
(Note 2)
(Note 2)
Q1
IF = 6 A, di/dt = 100 A/s
Q2
IF = 8.5 A, di/dt = 300 A/s
Notes:
1. RθJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined
by the user's board design.
a.65 °C/W when mounted on
a 1 in2 pad of 2 oz copper
b.50 °C/W when mounted on
a 1 in2 pad of 2 oz copper
c. 180 °C/W when mounted on a
minimum pad of 2 oz copper
d. 125 °C/W when mounted on a
minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3.Starting Q1: T = 25 °C, L = 1 mH, I = 5 A, Vgs = 10V, Vdd = 27V, 100% test at L = 3 mH, I = 4 A; Q2: T = 25°C, L = 1 mH, I = 8 A, Vgs = 10V, Vdd = 27V,
100% test at L = 3 mH, I = 3.2 A.
4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied.
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3
FDMC8200S Dual N-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25°C unless otherwise noted
4
40
ID, DRAIN CURRENT (A)
VGS = 6 V
30
VGS = 4.5 V
20
VGS = 4 V
10
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 3.5 V
0
0.0
0.5
1.0
1.5
2.0
2.5
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
VGS = 10 V
3
VGS = 3.5 V
VGS = 4 V
2
VGS = 4.5 V
1
0
0
3.0
10
Figure 1. On Region Characteristics
30
40
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
100
1.6
ID = 6 A
VGS = 10 V
rDS(on), DRAIN TO
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
20
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
1.4
1.2
1.0
0.8
-75
-50
-25
0
25
50
75
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
80
ID = 6 A
60
TJ = 125 oC
40
20
TJ = 25 oC
0
100 125 150
2
TJ, JUNCTION TEMPERATURE (oC)
4
6
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs Junction Temperature
Figure 4. On-Resistance vs Gate to
Source Voltage
40
40
IS, REVERSE DRAIN CURRENT (A)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
ID, DRAIN CURRENT (A)
VGS = 10 V
VGS = 6 V
30
VDS = 5 V
20
TJ = 150 oC
TJ = 25 oC
10
TJ = -55 oC
0
2.0
2.5
3.0
3.5
4.0
4.5
VGS = 0 V
10
1
TJ = 150 oC
0.1
TJ = 25 oC
0.01
0.001
0.2
VGS, GATE TO SOURCE VOLTAGE (V)
TJ = -55 oC
0.4
0.6
0.8
1.0
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
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4
1.2
FDMC8200S Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted
1000
ID = 6 A
Ciss
8
CAPACITANCE (pF)
VGS, GATE TO SOURCE VOLTAGE (V)
10
VDD = 20 V
VDD = 15 V
6
VDD = 10 V
4
Coss
100
Crss
2
f = 1 MHz
VGS = 0 V
0
0
2
4
6
10
0.1
8
1
30
Figure 8. Capacitance vs Drain
to Source Voltage
25
8
7
6
5
o
RθJC = 7.5 C/W
ID, DRAIN CURRENT (A)
IAS, AVALANCHE CURRENT (A)
Figure 7. Gate Charge Characteristics
4
TJ = 25 oC
3
TJ
= 100 oC
2
TJ = 125 oC
1
0.01
0.1
1
20
VGS = 10 V
15
Limited by Package
10
VGS = 4.5 V
5
0
25
7
50
tAV, TIME IN AVALANCHE (ms)
100
125
150
o
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
100
50
100
100
usus
1 ms
1
1 ms
1
10 ms
THIS
AREA
ISIS
THIS
AREA
LIMITED
BY
rDS(on)
LIMITED
BY
r
10100
ms ms
SINGLE PULSE
SINGLE PULSE
TJ = MAX RATED
TJ = MAX RATED
1 s10 s
DS(on)
0.1
0.1
0.01
oR
θJA =
C/W
1 sms
100
DC
10 s
DC
125 oC/W
RθJA = 180
o
TC = 25 oC TA = 25 C
0.01
0.1
0.1
1
1
10
10
VDS, DRAIN to SOURCE VOLTAGE (V)
100200
100200
P(PK), PEAK TRANSIENT POWER (W)
100
10
10
0.01
0.001
0.01
75
Tc, CASE TEMPERATURE ( C)
Figure 9. Unclamped Inductive
Switching Capability
, DRAINCURRENT
CURRENT (A)
(A)
IDI,DDRAIN
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
VGS = 10 V
10
1
SINGLE PULSE
RθJA = 125 oC/W
TA = 25 oC
0.1
0.001
0.01
0.1
1
10
100
t, PULSE WIDTH (sec)
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
Figure 12. Single Pulse Maximum
Power Dissipation
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5
1000
FDMC8200S Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted
2
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJc + TC
SINGLE PULSE
0.01
o
RθJA = 180 C/W
0.003
-4
10
-3
10
-2
10
-1
10
1
10
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
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6
100
1000
FDMC8200S Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted
4
VGS = 10 V
VGS = 4.5 V
VGS = 4 V
VGS = 3.5 V
18
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
27
VGS = 3 V
9
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0.0
0.5
1.0
3
VGS = 3.5 V
2
VGS = 4 V
1
1.5
0
9
18
27
ID, DRAIN CURRENT (A)
Figure 14. On- Region Characteristics
Figure 15. Normalized on-Resistance vs Drain
Current and Gate Voltage
1.6
100
ID = 8.5 A
VGS = 10 V
rDS(on), DRAIN TO
1.4
1.2
1.0
0.8
-75
-50
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
VGS = 10 V
VGS = 4.5 V
VDS, DRAIN TO SOURCE VOLTAGE (V)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
ID = 8.5 A
80
60
40
TJ = 125 oC
20
TJ = 25 oC
0
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
2
4
6
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 17. On-Resistance vs Gate to
Source Voltage
Figure 16. Normalized On-Resistance
vs Junction Temperature
30
IS, REVERSE DRAIN CURRENT (A)
27
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
ID, DRAIN CURRENT (A)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS = 3 V
VDS = 5 V
18
TJ = 150 oC
TJ
9
= 25 oC
TJ = -55 oC
0
1.0
1.5
2.0
2.5
3.0
3.5
4.0
VGS = 0 V
10
TJ = 150 oC
1
TJ = 25 oC
0.1
TJ = -55 oC
0.01
0.001
0.0
VGS, GATE TO SOURCE VOLTAGE (V)
0.2
0.4
0.6
0.8
1.0
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 18. Transfer Characteristics
Figure 19. Source to Drain Diode
Forward Voltage vs Source Current
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7
1.2
FDMC8200S Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted
3000
ID = 8.5 A
1000
8
VDD = 15 V
CAPACITANCE (pF)
VGS, GATE TO SOURCE VOLTAGE (V)
10
6
VDD = 10 V
VDD = 20 V
4
Ciss
Coss
100
2
f = 1 MHz
VGS = 0 V
10
0.1
0
0
2
4
6
8
10
12
14
16
10
30
Figure 21. Capacitance vs Drain
to Source Voltage
Figure 20. Gate Charge Characteristics
15
ID, DRAIN CURRENT (A)
20
IAS, AVALANCHE CURRENT (A)
1
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
10
TJ = 25 oC
TJ = 100 oC
TJ = 125 oC
12
VGS = 10 V
9
VGS = 4.5 V
6
Limited by package
3
o
RθJA = 50 C/W
1
0.01
0.1
1
10
0
25
30
50
125
150
Figure 23. Maximum Continuous Drain
Current vs Case Temperature
100
10
100 us
1 ms
THIS AREA IS
LIMITED BY rDS(on)
10 ms
100 ms
SINGLE PULSE
TJ = MAX RATED
0.1
1s
10 s
RθJA = 125 oC/W
DC
TA = 25 oC
0.1
1
10
100200
P(PK), PEAK TRANSIENT POWER (W)
50
0.01
0.01
100
o
Figure 22. Unclamped Inductive
Switching Capability
1
75
TA, CASE TEMPERATURE ( C)
tAV, TIME IN AVALANCHE (ms)
ID, DRAIN CURRENT (A)
Crss
VGS = 10 V
10
1
SINGLE PULSE
RθJA = 125 oC/W
TA = 25 oC
0.1
0.001
Figure 24. Forward Bias Safe
Operating Area
0.01
0.1
1
10
100
t, PULSE WIDTH (sec)
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 25. Single Pulse Maximum Power
Dissipation
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8
1000
FDMC8200S Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (Q2 N-Channel) TJ = 25°C unless otherwise noted
2
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
0.01
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC x RθJC + TC
SINGLE PULSE
o
RθJA = 125 C/W
(Note 1b)
0.001
-4
10
-3
10
-2
10
-1
10
1
10
t, RECTANGULAR PULSE DURATION (sec)
Figure 26. Junction-to-Ambient Transient Thermal Response Curve
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9
100
1000
FDMC8200S Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted
SyncFET Schottky body diode
Characteristics
Fairchild’s SyncFET process embeds a Schottky diode in parallel
with PowerTrench MOSFET. This diode exhibits similar
characteristics to a discrete external Schottky diode in parallel
with a MOSFET. Figure 14 shows the reverses recovery
characteristic of the FDMC8200S.
Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power
in the device.
7
6
CURRENT (A)
5
4
di/dt = 300 A/μs
3
2
1
0
-1
-2
0
20
40
60
80
100
IDSS, REVERSE LEAKAGE CURRENT (A)
0.01
TJ = 125 oC
0.001
0.00001
TJ = 25 oC
0.000001
0
TIME (ns)
Figure 27. FDMC8200S SyncFET body
diode reverse recovery characteristic
TJ = 100 oC
0.0001
5
10
15
20
25
VDS, REVERSE VOLTAGE (V)
Figure 28. SyncFET body diode reverses
leakage versus drain-source voltage
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10
30
FDMC8200S Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (continued)
FDMC8200S Dual N-Channel PowerTrench® MOSFET
Dimensional Outline and Pad Layout
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11
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