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N-Channel Dual CoolTM 33 PowerTrench® MOSFET
40 V, 108 A, 2.5 mΩ
Features
General Description
High performance technology for extremely low rDS(on)
This N-Channel MOSFET is produced using ON
process.
Semiconductor’s
advanced
PowerTrench®
Advancements in both silicon and Dual CoolTM package
technologies have been combined to offer the lowest rDS(on)
while maintaining excellent switching performance by extremely
low Junction-to-Ambient thermal resistance.
RoHS Compliant
Applications
Dual CoolTM Top Side Cooling PQFN package
Max rDS(on) = 2.5 mΩ at VGS = 10 V, ID = 27 A
Max rDS(on) = 4.1 mΩ at VGS = 4.5 V, ID = 21 A
Primary DC-DC Switch
Motor Bridge Switch
Synchronous Rectifier
Pin 1
S
S
S
G
D
Dual CoolTM 33
Top
D
D
D
S
D
S
D
S
D
G
D
Bottom
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current
ID
-Continuous
TC = 25 °C
-Continuous
TA = 25 °C
-Pulsed
Single Pulse Avalanche Energy
EAS
PD
TJ, TSTG
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
Ratings
40
Units
V
±20
V
108
(Note 1a)
27
(Note 4)
320
(Note 3)
181
A
mJ
56
(Note 1a)
Operating and Storage Junction Temperature Range
W
2.9
-55 to +150
°C
Thermal Characteristics
RθJC
Thermal Resistance, Junction to Case
RθJA
Thermal Resistance, Junction to Ambient
(Note 1)
2.2
(Note 1a)
42
°C/W
Package Marking and Ordering Information
Device Marking
8321LD
Device
FDMC8321LDC
©2014 Semiconductor Components Industries, LLC.
August-2017, Rev.2
Package
Dual CoolTM 33
1
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
Publication Order Number:
FDMC8321LDC/D
FDMC8321LDC N-Channel Dual CoolTM 33 PowerTrench® MOSFET
FDMC8321LDC
RθJC
Thermal Resistance, Junction to Case
(Top Source)
5.0
RθJC
Thermal Resistance, Junction to Case
(Bottom Drain)
2.2
RθJA
Thermal Resistance, Junction to Ambient
(Note 1a)
42
RθJA
Thermal Resistance, Junction to Ambient
(Note 1b)
105
RθJA
Thermal Resistance, Junction to Ambient
(Note 1c)
29
RθJA
Thermal Resistance, Junction to Ambient
(Note 1d)
40
RθJA
Thermal Resistance, Junction to Ambient
(Note 1e)
19
RθJA
Thermal Resistance, Junction to Ambient
(Note 1f)
23
RθJA
Thermal Resistance, Junction to Ambient
(Note 1g)
30
RθJA
Thermal Resistance, Junction to Ambient
(Note 1h)
79
RθJA
Thermal Resistance, Junction to Ambient
(Note 1i)
17
RθJA
Thermal Resistance, Junction to Ambient
(Note 1j)
26
RθJA
Thermal Resistance, Junction to Ambient
(Note 1k)
12
RθJA
Thermal Resistance, Junction to Ambient
(Note 1l)
16
°C/W
Notes:
1. RθJA is determined with the device mounted on a FR-4 board using a specified pad of 2 oz copper as shown below. RθJC is guaranteed by design while RθCA is determined
by the user's board design.
b. 105 °C/W when mounted on
a minimum pad of 2 oz copper
a. 42 °C/W when mounted on
a 1 in2 pad of 2 oz copper
SS
SF
DS
DF
G
SS
SF
DS
DF
G
c. Still air, 20.9x10.4x12.7mm Aluminum Heat Sink, 1 in2 pad of 2 oz copper
d. Still air, 20.9x10.4x12.7mm Aluminum Heat Sink, minimum pad of 2 oz copper
e. Still air, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, 1 in2 pad of 2 oz copper
f. Still air, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, minimum pad of 2 oz copper
g. 200FPM Airflow, No Heat Sink,1 in2 pad of 2 oz copper
h. 200FPM Airflow, No Heat Sink, minimum pad of 2 oz copper
i. 200FPM Airflow, 20.9x10.4x12.7mm Aluminum Heat Sink, 1 in2 pad of 2 oz copper
j. 200FPM Airflow, 20.9x10.4x12.7mm Aluminum Heat Sink, minimum pad of 2 oz copper
k. 200FPM Airflow, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, 1 in2 pad of 2 oz copper
l. 200FPM Airflow, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. EAS of 181 mJ is based on starting TJ = 25 oC, L = 3 mH, IAS = 11 A, VDD = 40 V, VGS = 10 V. 100% tested at L = 0.1 mH, IAS = 35 A.
4. Pulse Id measured at 250μs, refer to Fig 11 SOA graph for more details.
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2
FDMC8321LDC N-Channel Dual CoolTM 33 PowerTrench® MOSFET
Thermal Characteristics
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = 32 V, VGS = 0 V
1
μA
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
±100
nA
3.0
V
40
V
39
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
rDS(on)
Static Drain to Source On Resistance
gFS
Forward Transconductance
1.0
1.7
-6
mV/°C
VGS = 10 V, ID = 27 A
2.0
2.5
VGS = 4.5 V, ID = 21 A
2.8
4.1
VGS = 10 V, ID = 27 A, TJ = 125 °C
3.0
3.8
VDS = 5 V, ID = 27 A
126
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
VDS = 20 V, VGS = 0 V,
f = 1 MHz
0.1
2832
3965
pF
777
1090
pF
66
105
pF
0.7
2.5
Ω
ns
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
4.8
10
ns
Qg(TOT)
Total Gate Charge at 10 V
43
60
nC
22
31
Qg(TOT)
Total Gate Charge at 5 V
Qgs
Total Gate Charge
Qgd
Gate to Drain “Miller” Charge
VDD = 20 V, ID = 27 A,
VGS = 10 V, RGEN = 6 Ω
VDD = 20 V, ID = 27 A
13
23
5.5
11
ns
31
50
ns
nC
7.1
nC
6.1
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 2.3 A
(Note 2)
0.7
1.2
VGS = 0 V, IS = 27 A
(Note 2)
0.8
1.3
IF = 27 A, di/dt = 100 A/μs
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3
V
31
50
ns
11
20
nC
FDMC8321LDC N-Channel Dual CoolTM 33 PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
320
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
VGS = 10 V
240
VGS = 4.5 V
VGS = 4 V
160
VGS = 3.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
80
VGS = 3 V
0
0
1
2
3
4
5
VGS = 3 V
4
VGS = 3.5 V
3
VGS = 4 V
2
VGS = 4.5 V
1
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
5
0
80
VDS, DRAIN TO SOURCE VOLTAGE (V)
rDS(on), DRAIN TO
1.2
1.0
0.8
-50
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
10
1.4
0.6
-75
2
TJ = 25 oC
1
2
3
2
4
5
4
6
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
IS, REVERSE DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
oC
TJ = -55 oC
0
TJ = 25 oC
400
160
80
TJ = 125 oC
4
Figure 4. On-Resistance vs Gate to
Source Voltage
VDS = 5 V
TJ = 150
ID = 27 A
6
0
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
240
320
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
8
Figure 3. Normalized On Resistance
vs Junction Temperature
320
240
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
ID = 27 A
VGS = 10 V
1.6
160
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
1.8
VGS = 10 V
6
VGS = 0 V
100
10
TJ = 150 oC
1
TJ = 25 oC
0.1
0.01
TJ = -55 oC
0.001
0.0
0.2
0.4
0.6
0.8
1.0
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
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4
1.2
FDMC8321LDC N-Channel Dual CoolTM 33 PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
10000
ID = 27 A
Ciss
VDD = 16 V
8
CAPACITANCE (pF)
VGS, GATE TO SOURCE VOLTAGE (V)
10
VDD = 20 V
6
VDD = 24 V
4
1000
Coss
100
Crss
2
f = 1 MHz
VGS = 0 V
0
0
10
20
30
40
10
0.1
50
1
10
40
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain
to Source Voltage
100
120
o
TJ =
10
ID, DRAIN CURRENT (A)
IAS, AVALANCHE CURRENT (A)
RθJC = 2.2 C/W
25 oC
TJ = 100 oC
TJ = 125 oC
1
0.01
0.1
100
80
VGS = 10 V
60
Limited by Package
20
1
10
0
25
100
50
75
100
125
150
o
tAV, TIME IN AVALANCHE (ms)
TC, CASE TEMPERATURE ( C)
Figure 9. Unclamped Inductive
Switching Capability
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
100
10 us
P(PK), PEAK TRANSIENT POWER (W)
10000
600
ID, DRAIN CURRENT (A)
VGS = 4.5 V
40
SINGLE PULSE
RθJC = 2.2 oC/W
TC = 25 oC
1000
10
1
1 ms
10 ms
DC
SINGLE PULSE
TJ = MAX RATED
RθJC = 2.2 oC/W
0.1
0.1
100 us
THIS AREA IS
LIMITED BY rDS(on)
CURVE BENT TO
MEASURED DATA
TC = 25 oC
1
10
100
100
10
-5
10
-4
10
-3
10
-2
10
-1
10
t, PULSE WIDTH (sec)
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe
Operating Area
Figure 12. Single Pulse Maximum
Power Dissipation
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5
1
FDMC8321LDC N-Channel Dual CoolTM 33 PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
2
1
0.1
0.01
0.005
-5
10
DUTY CYCLE-DESCENDING ORDER
PDM
D = 0.5
0.2
0.1
0.05
0.02
0.01
t1
t2
NOTES:
ZθJC(t) = r(t) x RθJC
RθJC = 2.2 oC/W
Peak TJ = PDM x ZθJC(t) + TC
Duty Cycle, D = t1 / t2
SINGLE PULSE
-4
10
-3
10
-2
10
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Case Transient Thermal Response Curve
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6
-1
10
1
FDMC8321LDC N-Channel Dual CoolTM 33 PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
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