FDMC9430L-F085

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Other names and brands may be claimed as the property of others. Dual N-Channel Logic Level PowerTrench® MOSFET 40 V, 12 A, 8.2 mΩ Pin 1 G1 S1 S1 S1 Features D1 „ Typical RDS(on) = 6.3 mΩ at VGS = 10V, ID = 12 A „ Typical Qg(tot) = 15 nC at VGS = 10V, ID = 12 A D2 „ UIS Capability „ RoHS Compliant „ Qualified to AEC Q101 G2 S2 S2 S2 Applications Power 33 „ Battery Protection „ Load Switching Bottom Drain2 Contact G2 8 „ Point of Load 1 G1 S2 7 Q2 2 S1 S2 6 Q1 3 S1 S2 5 4 S1 Bottom Drain1 Contact MOSFET Maximum Ratings TJ = 25°C unless otherwise noted. Symbol VDSS Drain-to-Source Voltage VGS ID EAS PD Parameter Ratings 40 Units V ±12 V Gate-to-Source Voltage Drain Current - Continuous (VGS=10) (Note 1) TC = 25°C 12 Pulsed Drain Current TC = 25°C See Figure 4 Single Pulse Avalanche Energy (Note 2) 21.6 A mJ Power Dissipation 11.4 W Derate Above 25oC 0.1 W/oC TJ, TSTG Operating and Storage Temperature RθJC Thermal Resistance, Junction to Case RθJA Maximum Thermal Resistance, Junction to Ambient -55 to + 150 oC 13 oC/W 65 oC/W (Note 3) FDMC9430L-F085 Dual N-Channel Logic Level PowerTrench® MOSFET FDMC9430L-F085 Notes: 1: Current is limited by bondwire configuration. 2: Starting TJ = 25°C, L = 0.3mH, IAS = 12A, VDD = 40V during inductor charging and VDD = 0V during time in avalanche. 3: RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance, where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design, while RθJAis determined by the board design. The maximum rating presented here is based on mounting on a 1 in2 pad of 2oz copper. Package Marking and Ordering Information Device Marking FDMC9430L Device FDMC9430L-F085 ©2016 Semiconductor Components Industries, LLC. August-2017, Rev. 2 Package Power 33 Reel Size 13” 1 Tape Width 12mm Quantity 3000 units Publication Order Number: FDMC9430L-F085/D Symbol Parameter Test Conditions Min. Typ. Max. Units Off Characteristics BVDSS Drain-to-Source Breakdown Voltage IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Leakage Current ID = 250μA, VGS = 0V VDS = 40V, VGS = 0V 40 - - V - - 1 μA TJ = 25oC TJ = 150oC (Note 4) - - 0.2 mA VGS = ±12V - - ±100 nA VGS = VDS, ID = 250μA 1 1.8 3 V ID = 10A, VGS= 4.5V - 8.9 11.5 mΩ ID = 12A, VGS= 10V - 6.3 8.0 mΩ - 10.2 13.0 mΩ On Characteristics VGS(th) RDS(on) Gate to Source Threshold Voltage Drain to Source On Resistance TJ = 25oC TJ = 150oC (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VGS = 0.5V, f = 1MHz Qg(ToT) Total Gate Charge VGS = 0 to 10V Qg(th) Threshold Gate Charge VGS = 0 to 1V - 0.9 - nC Qgs Gate-to-Source Gate Charge - 2.6 - nC Qgd Gate-to-Drain “Miller“ Charge - 2.1 - nC ns VDS = 20V, VGS = 0V, f = 1MHz VDD = 32V ID = 12A - 984 - pF - 315 - pF - 18 - pF - 1.1 - Ω - 15 22 nC Switching Characteristics ton Turn-On Time - - 13 td(on) Turn-On Delay - 7 - ns tr Rise Time - 2 - ns td(off) Turn-Off Delay - 17 - ns tf Fall Time - 2 - ns toff Turn-Off Time - - 28 ns VDD = 20V, ID = 12A, VGS = 10V, RGEN = 6Ω Drain-Source Diode Characteristics VSD Source-to-Drain Diode Voltage trr Reverse-Recovery Time Qrr Reverse-Recovery Charge ISD = 12A, VGS = 0V - - 1.2 V ISD = 6A, VGS = 0V - - 1.1 V VDD = 32V, IF = 12A, dISD/dt = 100A/μs - 32 48 ns - 16 24 nC Note: 4: The maximum value is specified by design at TJ = 150°C. Product is not tested to this condition in production. www.onsemi.com 2 FDMC9430L-F085 Dual N-Channel Logic Level PowerTrench® MOSFET Electrical Characteristics TJ = 25°C unless otherwise noted. 35 1.0 30 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER 1.2 0.8 0.6 0.4 0.2 0.0 0 25 50 75 100 125 TC, CASE TEMPERATURE(oC) 25 VGS = 10V CURRENT LIMITED BY PACKAGE 20 15 10 5 0 150 Figure 1. Normalized Power Dissipation vs. Case Temperature CURRENT LIMITED BY SILICON 25 50 75 100 125 150 TC, CASE TEMPERATURE(oC) 175 Figure 2. Maximum Continuous Drain Current vs. Case Temperature NORMALIZED THERMAL IMPEDANCE, ZθJC 2 1 0.1 DUTY CYCLE - DESCENDING ORDER D = 0.50 0.20 0.10 0.05 0.02 0.01 PDM t1 t2 0.01 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TC SINGLE PULSE 1E-3 -5 10 -4 10 -3 -2 -1 0 10 10 10 t, RECTANGULAR PULSE DURATION(s) 1 10 10 Figure 3. Normalized Maximum Transient Thermal Impedance 10000 TC = 25oC VGS = 10V IDM, PEAK CURRENT (A) FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: 1000 I = I2 150 - TC 125 100 SINGLE PULSE 10 -5 10 -4 10 -3 -2 -1 10 10 10 t, RECTANGULAR PULSE DURATION(s) Figure 4. Peak Current Capability www.onsemi.com 3 0 10 1 10 FDMC9430L-F085 Dual N-Channel Logic Level PowerTrench® MOSFET Typical Characteristics 500 100 IAS, AVALANCHE CURRENT (A) ID, DRAIN CURRENT (A) 1000 100 10 100us 1 1ms OPERATION IN THIS AREA MAY BE LIMITED BY PACKAGE 0.1 SINGLE PULSE TJ = MAX RATED TC = 25oC 0.01 0.1 10ms 100ms 1 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 35 25 20 TJ = 25oC 10 TJ = -55oC o TJ = 150 C 5 0 1.0 1.5 2.0 2.5 3.0 3.5 VGS, GATE TO SOURCE VOLTAGE (V) 15 10 100 VGS = 0 V 1 0.4 0.6 0.8 1.0 1.2 80μs PULSE WIDTH TJ = 150oC 30 25 20 3V VGS 10V Top 5V 4V 3.5V 3V Bottom 15 10 5 0 Figure 9. Saturation Characteristics 0.2 35 5 1 2 3 4 VDS, DRAIN TO SOURCE VOLTAGE (V) TJ = 25 oC TJ = 150 oC Figure 8. Forward Diode Characteristics 3V 0 10 10 0.1 0.0 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 20 1 VSD, BODY DIODE FORWARD VOLTAGE (V) VGS 10V Top 5V 4V 3.5V 3V Bottom 25 0.1 Figure 6. Unclamped Inductive Switching Capability 4.0 80μs PULSE WIDTH TJ = 25oC 30 0.01 NOTE: Refer to ON Semiconductor Application Notes AN7514 and AN7515 Figure 7. Transfer Characteristics 35 STARTING TJ = 125oC tAV, TIME IN AVALANCHE (ms) IS, REVERSE DRAIN CURRENT (A) ID, DRAIN CURRENT (A) VDD = 5V 15 STARTING TJ = 25oC 35 PULSE DURATION = 80μs DUTY CYCLE = 0.5% MAX 30 10 1 0.001 100 Figure 5. Forward Bias Safe Operating Area If R = 0 tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD) If R ≠ 0 tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1] 5 0 0 1 2 3 4 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 10. Saturation Characteristics www.onsemi.com 4 5 FDMC9430L-F085 Dual N-Channel Logic Level PowerTrench® MOSFET Typical Characteristics NORMALIZED DRAIN TO SOURCE ON-RESISTANCE rDS(on), DRAIN TO SOURCE ON-RESISTANCE (mΩ) 70 PULSE DURATION = 80μs DUTY CYCLE = 0.5% MAX 60 ID = 12A 50 40 30 20 o TJ = 150 C 10 0 TJ = 25oC 1 2 3 4 5 6 7 8 9 VGS, GATE TO SOURCE VOLTAGE (V) 10 Figure 11. RDSON vs. Gate Voltage 1.6 1.4 1.2 1.0 0.8 ID = 12A VGS = 10V 0.6 0.4 -80 -40 0 40 80 120 TJ, JUNCTION TEMPERATURE(oC) 160 Figure 12. Normalized RDSON vs. Junction Temperature 1.10 VGS = VDS ID = 250μA 1.2 ID = 1mA 1.05 1.0 1.00 0.8 0.95 0.6 0.4 -80 -40 0 40 80 120 TJ, JUNCTION TEMPERATURE(oC) Ciss Coss 100 10 Crss f = 1MHz VGS = 0V 1 0.1 1 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 160 10 100 Figure 15. Capacitance vs. Drain to Source Voltage -40 0 40 80 120 TJ, JUNCTION TEMPERATURE (oC) Figure 14. Normalized Drain to Source Breakdown Voltage vs. Junction Temperature VGS, GATE TO SOURCE VOLTAGE(V) 10000 1000 0.90 -80 160 Figure 13. Normalized Gate Threshold Voltage vs. Temperature CAPACITANCE (pF) PULSE DURATION = 80μs DUTY CYCLE = 0.5% MAX 1.8 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE NORMALIZED GATE THRESHOLD VOLTAGE 1.4 2.0 ID = 12A 8 VDD = 20V VDD = 24V 6 VDD = 16V 4 2 0 0 4 8 12 Qg, GATE CHARGE(nC) 16 Figure 16. Gate Charge vs. Gate to Source Voltage www.onsemi.com 5 FDMC9430L-F085 Dual N-Channel Logic Level PowerTrench® MOSFET Typical Characteristics ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 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