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FDMD8900
N-Channel PowerTrench® MOSFET
Q1: 30 V, 66 A, 4 mΩ Q2: 30 V, 42 A, 5.5 mΩ
Features
General Description
Q1: N-Channel
This devices utilizes two optimized N-ch FETs in a dual 3.3x5mm
Max rDS(on) = 4 mΩ at VGS = 10 V, ID = 19 A
thermally enhanced power package. The HS Source and LS
Max rDS(on) = 5 mΩ at VGS = 4.5 V, ID = 17 A
drain are internally connected providing a low source inductance
package, helping to provide the best FOM.
Max rDS(on) = 6.5 mΩ at VGS = 3.8 V, ID = 15 A
Max rDS(on) = 8.3 mΩ at VGS = 3.5 V, ID = 14 A
Q2: N-Channel
Applications
Max rDS(on) = 5.5 mΩ at VGS = 10 V, ID = 17 A
Computing
Max rDS(on) = 6.5 mΩ at VGS = 4.5 V, ID = 15 A
Buck, Boost and Buck/Boost Applications
Max rDS(on) = 9 mΩ at VGS = 3.8 V, ID = 13 A
General Purpose POL
Max rDS(on) = 12 mΩ at VGS = 3.5 V, ID = 12 A
Ideal for Flexible Layout in Primary Side of Bridge Topology
Termination is Lead-free and RoHS Compliant
100% UIL Tested
Kelvin High Side MOSFET Drive Pin-out Capability
Pin 1
Power 3.3 x 5
D1
1
12 G1
D1
2
11
D1
3
10 D2/S1
G2
4
9
D2/S1
S2
5
8
D2/S1
S2
6
7
D2/S1
G1R
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted.
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current
-Continuous
ID
TC = 25 °C
TJ, TSTG
Units
V
V
±12
±12
(Note 5)
66
42
-Continuous
TC = 100°C
(Note 5)
42
26
TA = 25 °C
(Note 1a)
19
17
(Note 4)
280
210
(Note 3)
73
54
27
15
-Pulsed
PD
Q2
30
-Continuous
Single Pulse Avalanche Energy
EAS
Q1
30
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
(Note 1a)
Operating and Storage Junction Temperature Range
2.1
-55 to +150
A
mJ
W
°C
Thermal Characteristics
RθJC
Thermal Resistance, Junction to Case
RθJA
Thermal Resistance, Junction to Ambient
4.7
(Note 1a)
8.4
60
°C/W
Package Marking and Ordering Information
Device Marking
8900
Device
FDMD8900
©2015 Fairchild Semiconductor Corporation
FDMD8900 Rev.1.1
Package
Power 3.3 x 5
1
Reel Size
13 ”
Tape Width
12 mm
Quantity
3000 units
www.fairchildsemi.com
FDMD8900 N-Channel PowerTrench® MOSFET
June 2016
Symbol
Parameter
Test Conditions
Type
Min.
Typ.
Max.
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ID = 250 μA, VGS = 0 V
Q1
Q2
30
30
V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
ID = 250 μA, referenced to 25 °C
Q1
Q2
14
13
mV/°C
IDSS
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
VDS = 24 V, VGS = 0 V
Q1
Q2
1
1
μA
IGSS
Gate to Source Leakage Current
VGS = ±12 V, VDS= 0 V
VGS = ±12 V, VDS= 0 V
Q1
Q2
±100
±100
nA
2.5
2.5
mV
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
VGS = VDS, ID = 250 μA
Q1
Q2
0.8
1
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
ID = 250 μA, referenced to 25 °C
Q1
Q2
-4
-4
rDS(on)
gFS
Drain to Source On Resistance
Forward Transconductance
1.3
1.4
mV/°C
Q1
3.4
4
4.3
4.6
4.6
4
5
6.5
8.3
6
VGS = 10 V, ID = 17 A
VGS = 4.5 V, ID = 15 A
VGS = 3.8 V, ID = 13 A
VGS = 3.5 V, ID = 12 A
VGS = 10 V, ID = 17 A ,TJ =125 °C
Q2
4.5
5.4
6
6.6
5.8
5.5
6.5
9
12
6.9
VDS = 5 V, ID = 19 A
VDS = 5 V, ID = 17 A
Q1
Q2
86
80
Q1:
VDS = 15 V, VGS = 0 V, f = 1 MHZ
Q1
Q2
1735
1210
2605
1815
pF
Q1
Q2
462
356
695
535
pF
Q1
Q2
47
52
75
80
pF
Q1
Q2
0.8
1.9
VGS = 10 V, ID = 19 A
VGS = 4.5 V, ID = 17 A
VGS = 3.8 V, ID = 15 A
VGS = 3.5 V, ID = 14 A
VGS = 10 V, ID = 19 A,TJ =125 °C
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
Q2:
VDS = 15 V, VGS = 0 V, f = 1 MHZ
Ω
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg
Total Gate Charge
Qg
Total Gate Charge
Qgs
Gate to Source Gate Charge
Qgd
Gate to Drain “Miller” Charge
©2015 Fairchild Semiconductor Corporation
FDMD8900 Rev.1.1
Q1:
VDD = 15 V, ID = 19 A, RGEN = 6 Ω
Q2:
VDD = 15 V, ID = 17 A, RGEN = 6 Ω
VGS = 0 V to 10 V Q1:
VDD = 15 V,
VGS = 0 V to 4.5 V ID = 19 A
Q2:
VDD = 15 V,
ID = 17 A
2
Q1
Q2
8.7
7.1
17
14
ns
Q1
Q2
2.3
2
10
10
ns
Q1
Q2
25
22
40
35
ns
Q1
Q2
2.4
2.3
10
10
ns
Q1
Q2
25
19
35
27
nC
Q1
Q2
12
8.8
17
12
nC
Q1
Q2
3.6
2.7
nC
Q1
Q2
2.7
2.6
nC
www.fairchildsemi.com
FDMD8900 N-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted.
Symbol
Parameter
Test Conditions
Type
Min.
Typ.
Max.
Units
Q1
Q2
0.8
0.8
1.2
1.2
V
Q1
Q2
26
22
42
35
ns
Q1
Q2
10
7.8
20
16
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 19 A
VGS = 0 V, IS = 17 A
(Note 2)
(Note 2)
Q1:
IF = 19 A, di/dt = 100 A/μs
Q2:
IF = 17 A, di/dt = 100 A/μs
NOTES:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
b. 130 °C/W when mounted on
a minimum pad of 2 oz copper
a. 60 °C/W when mounted on
a 1 in2 pad of 2 oz copper
SS
SF
DS
DF
G
SS
SF
DS
DF
G
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0 %.
3. Q1: EAS of 73 mJ is based on starting TJ = 25 oC, L = 3 mH, IAS = 7 A, VDD = 30 V, VGS = 10 V. 100% tested at L = 0.1 mH, IAS = 25 A.
Q2: EAS of 54 mJ is based on starting TJ = 25 oC, L = 3 mH, IAS = 6 A, VDD = 30 V, VGS = 10 V. 100% tested at L = 0.1 mH, IAS = 20 A.
4. Pulse Id refers to Figure “Forward Bias Safe Operation Area”.
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro-mechanical application board design.
©2015 Fairchild Semiconductor Corporation
FDMD8900 Rev.1.1
3
www.fairchildsemi.com
FDMD8900 N-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted.
80
3
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
VGS = 10 V
ID, DRAIN CURRENT (A)
VGS = 4.5 V
VGS = 3.8 V
60
40
VGS = 3.5 V
VGS = 3 V
20
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0.0
0.2
0.4
0.6
VDS, DRAIN TO SOURCE VOLTAGE (V)
rDS(on), DRAIN TO
0.8
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
1.0
-50
IS, REVERSE DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
20
TJ = -55
0
0
20
40
ID, DRAIN CURRENT (A)
60
80
1
2
oC
3
15
ID = 19 A
10
TJ = 125 oC
5
TJ = 25 oC
2
4
6
8
10
VGS = 0 V
10
TJ = 150 oC
1
TJ = 25 oC
0.1
0.01
TJ = -55 oC
0.001
0.0
4
VGS, GATE TO SOURCE VOLTAGE (V)
0.2
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
©2015 Fairchild Semiconductor Corporation
FDMD8900 Rev.1.1
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
100
TJ = 25 oC
0
0
Figure 4. On Resistance vs. Gate to
Source Voltage
TJ = 150 oC
40
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VGS, GATE TO SOURCE VOLTAGE (V)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
VDS = 5 V
60
VGS = 10 V
0
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
Figure 3. Normalized On Resistance
vs. Junction Temperature
80
1
20
1.2
0.6
-75
VGS = 4.5 V
VGS = 3.8 V
Figure 2. Normalized On-Resistance
vs. Drain Current and Gate Voltage
ID = 19 A
VGS = 10 V
1.4
VGS = 3 V
VGS = 3.5 V
0.8
Figure 1. On-Region Characteristics
1.6
2
Figure 6. Source to Drain Diode
Forward Voltage vs. Source Current
4
www.fairchildsemi.com
FDMD8900 N-Channel PowerTrench® MOSFET
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted.
10000
ID = 19 A
VDD = 10 V
8
Ciss
CAPACITANCE (pF)
VGS, GATE TO SOURCE VOLTAGE (V)
10
VDD = 15 V
6
VDD = 20 V
4
1000
Coss
Crss
100
2
f = 1 MHz
VGS = 0 V
0
0
5
10
15
20
25
10
0.1
30
1
10
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs. Drain
to Source Voltage
80
100
o
ID, DRAIN CURRENT (A)
IAS, AVALANCHE CURRENT (A)
RθJC = 4.7 C/W
TJ = 25 oC
10
TJ = 100 oC
TJ = 125 oC
1
0.001
0.01
0.1
1
10
60
VGS = 10 V
40
VGS = 4.5 V
20
0
25
100
50
P(PK), PEAK TRANSIENT POWER (W)
ID, DRAIN CURRENT (A)
150
10000
100
10 μs
THIS AREA IS
LIMITED BY rDS(on)
100 μs
SINGLE PULSE
TJ = MAX RATED
RθJC = 4.7 oC/W
TC = 25 oC
0.1
0.1
125
Figure 11. Maximum Continuous Drain
Current vs. Case Temperature
1000
1
100
TC, CASE TEMPERATURE ( C)
Figure 9. Unclamped Inductive
Figure 10. Switching Capability
10
75
o
tAV, TIME IN AVALANCHE (ms)
CURVE BENT TO
MEASURED DATA
1
1 ms
10 ms
100 ms/DC
10
100 200
TC = 25 oC
1000
100
10
-5
10
-4
10
-3
10
-2
10
-1
10
1
t, PULSE WIDTH (sec)
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 12. Forward Bias Safe
Operating Area
©2015 Fairchild Semiconductor Corporation
FDMD8900 Rev.1.1
SINGLE PULSE
RθJC = 4.7 oC/W
Figure 13. Single Pulse Maximum
Power Dissipation
5
www.fairchildsemi.com
FDMD8900 N-Channel PowerTrench® MOSFET
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted.
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
2
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
0.01
NOTES:
SINGLE PULSE
ZθJC(t) = r(t) x RθJC
RθJC = 4.7 oC/W
Peak TJ = PDM x ZθJC(t) + TC
Duty Cycle, D = t1 / t2
0.001
-5
10
-4
10
-3
-2
10
10
-1
10
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 14. Junction-to-Case Transient Thermal Response Curve
©2015 Fairchild Semiconductor Corporation
FDMD8900 Rev.1.1
6
www.fairchildsemi.com
FDMD8900 N-Channel PowerTrench® MOSFET
Typical Characteristics (Q1 N-Channel) TJ = 25°C unless otherwise noted.
4
VGS = 10 V
VGS = 4.5 V
VGS = 3.8 V
45
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
60
30
VGS = 3.5 V
15
VGS = 3 V
0
0.0
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0.2
0.4
0.6
VDS, DRAIN TO SOURCE VOLTAGE (V)
0.8
Figure 14. On- Region Characteristics
VGS = 3.5 V
2
VGS = 3.8 V
1
0
0
45
60
rDS(on), DRAIN TO
1.0
0.8
0.6
-75
-50
-25
0
25
50
75
SOURCE ON-RESISTANCE (mΩ)
1.2
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
ID = 17 A
20
TJ = 150 oC
10
TJ = 25 oC
0
100 125 150
2
TJ, JUNCTION TEMPERATURE (oC)
4
6
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 17. On-Resistance vs. Gate to
Source Voltage
Figure 16. Normalized On-Resistance
vs. Junction Temperature
60
100
IS, REVERSE DRAIN CURRENT (A)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
ID, DRAIN CURRENT (A)
15
30
ID, DRAIN CURRENT (A)
30
ID = 17 A
VGS = 10 V
1.4
VDS = 5 V
40
TJ = 150 oC
TJ = 25 oC
20
TJ = -55 oC
0
VGS = 10 V
VGS = 4.5 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
Figure 15. Normalized on-Resistance vs. Drain
Current and Gate Voltage
1.6
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
VGS = 3 V
3
1
2
3
TJ = 150 oC
1
0.1
TJ = 25 oC
0.01
TJ = -55 oC
0.001
0.0
4
VGS, GATE TO SOURCE VOLTAGE (V)
0.2
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 18. Transfer Characteristics
©2015 Fairchild Semiconductor Corporation
FDMD8900 Rev.1.1
VGS = 0 V
10
Figure 19. Source to Drain Diode
Forward Voltage vs. Source Current
7
www.fairchildsemi.com
FDMD8900 N-Channel PowerTrench® MOSFET
Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted.
10000
ID = 17 A
8
Ciss
VDD = 10 V
6
CAPACITANCE (pF)
VGS, GATE TO SOURCE VOLTAGE (V)
10
VDD = 15 V
4
VDD = 20 V
1000
Coss
Crss
100
f = 1 MHz
VGS = 0 V
2
0
0
5
10
15
10
0.1
20
1
10
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 21. Capacitance vs. Drain
to Source Voltage
Figure 20. Gate Charge Characteristics
60
100
ID, DRAIN CURRENT (A)
IAS, AVALANCHE CURRENT (A)
o
RθJC = 8.4 C/W
TJ = 25 oC
10
TJ = 100 oC
TJ = 125 oC
1
0.001
0.01
0.1
1
10
VGS = 10 V
40
VGS = 4.5 V
20
0
25
100
50
P(PK), PEAK TRANSIENT POWER (W)
ID, DRAIN CURRENT (A)
150
2000
SINGLE PULSE
RθJC = 8.4 oC/W
1000
100
10 μs
THIS AREA IS
LIMITED BY rDS(on)
100 μs
SINGLE PULSE
TJ = MAX RATED
RθJC = 8.4 oC/W
1 ms
10 ms
CURVE BENT TO
MEASURED DATA
TC = 25 oC
0.1
0.1
125
Figure 23. Maximum Continuous Drain
Current vs. Case Temperature
500
1
100
TC, CASE TEMPERATURE ( C)
Figure 22. Unclamped Inductive
Switching Capability
10
75
o
tAV, TIME IN AVALANCHE (ms)
1
10
DC
100
100
10
-5
10
-4
10
-3
10
-2
10
-1
10
1
10
100 1000
t, PULSE WIDTH (sec)
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 24. Forward Bias Safe
Operating Area
©2015 Fairchild Semiconductor Corporation
FDMD8900 Rev.1.1
TC = 25 oC
Figure 25. Single Pulse Maximum Power
Dissipation
8
www.fairchildsemi.com
FDMD8900 N-Channel PowerTrench® MOSFET
Typical Characteristics (Q2 N-Channel) TJ = 25°C unless otherwise noted.
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
SINGLE PULSE
t2
NOTES:
0.01
0.001
-5
10
ZθJC(t) = r(t) x RθJC
RθJC = 8.4 oC/W
Peak TJ = PDM x ZθJC(t) + TC
Duty Cycle, D = t1 / t2
-4
10
-3
-2
10
10
-1
10
1
10
t, RECTANGULAR PULSE DURATION (sec)
Figure 26. Junction-to-Case Transient Thermal Response Curve
©2015 Fairchild Semiconductor Corporation
FDMD8900 Rev.1.1
9
www.fairchildsemi.com
FDMD8900 N-Channel PowerTrench® MOSFET
Typical Characteristics (Q2 N-Channel) TJ = 25 °C unless otherwise noted.
0.10 C
B
5.10
4.90
2X
6
KEEP-OUT
AREA
A
1
2.35
0.42 (12X)
0.65
6
1
0.42
0.79 (12X)
3.40
3.20
3.70
PIN#1
INDICATOR
7
1.44
0.72
0.10 C
12
0.26
7
12
0.43
SEE
DETAIL 'A'
3.67
4.70
5.10
LAND PATTERN
RECOMMENDATION
5.00±0.10
0.10
0.05
4.60±0.10
C A B
C
0.72
7
12
R0.15
0.36
0.20
3.30±0.10
1.34±0.10
0.52
0.64
0.44
6
1
(12X)
0.37 (12X)
0.27
0.65
0.53
NOTES: UNLESS OTHERWISE SPECIFIED
A) DOES NOT FULLY CONFORM TO JEDEC
REGISTRATION, MO-229 DATED 8/2012
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS OR
MOLD FLASH. MOLD FLASH OR BURRS
DOES NOT EXCEED 0.10MM.
0.80
0.70
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M-1994.
0.10 C
E) IT IS RECOMMENDED TO HAVE NO TRACES
OR VIAS WITHIN THE KEEP OUT AREA.
0.08 C
C
0.25
0.15
0.05
0.00
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