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FDMS3016DC
N-Channel Dual CoolTM 56 PowerTrench® MOSFET
30 V, 49 A, 6.0 mΩ
Features
Dual
CoolTM
General Description
Top Side Cooling PQFN package
This N-Channel MOSFET is produced using Fairchild
Semiconductor’s
advanced
PowerTrench®
process.
Advancements in both silicon and Dual CoolTM package
technologies have been combined to offer the lowest rDS(on)
while maintaining excellent switching performance by extremely
low Junction-to-Ambient thermal resistance.
Max rDS(on) = 6.0 mΩ at VGS = 10 V, ID = 12 A
Max rDS(on) = 9.0 mΩ at VGS = 4.5 V, ID = 10 A
High performance technology for extremely low rDS(on)
RoHS Compliant
Applications
Synchronous Rectifier for DC/DC Converters
Telecom Secondary Side Rectification
High End Server/Workstation
Pin 1
S
S
S
D
5
4
G
D
6
3
S
D
7
2
S
D
8
1
S
G
D
Dual Cool
Top
D
TM
D
D
56
Bottom
MOSFET Maximum Ratings TA = 25°C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current -Continuous (Package limited)
ID
TC = 25 °C
-Continuous (Silicon limited)
TC = 25 °C
-Continuous
TA = 25 °C
Ratings
30
Units
V
±20
V
49
78
(Note 1a)
-Pulsed
18
A
200
EAS
Single Pulse Avalanche Energy
(Note 3)
72
mJ
dv/dt
Peak Diode Recovery dv/dt
(Note 4)
1.3
V/ns
(Note 1a)
3.3
PD
TJ, TSTG
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
60
Operating and Storage Junction Temperature Range
-55 to +150
W
°C
Thermal Characteristics
RθJC
Thermal Resistance, Junction to Case
(Top Source)
5.7
RθJC
Thermal Resistance, Junction to Case
(Bottom Drain)
2.1
RθJA
Thermal Resistance, Junction to Ambient
(Note 1a)
38
RθJA
Thermal Resistance, Junction to Ambient
(Note 1b)
81
RθJA
Thermal Resistance, Junction to Ambient
(Note 1i)
16
RθJA
Thermal Resistance, Junction to Ambient
(Note 1j)
23
RθJA
Thermal Resistance, Junction to Ambient
(Note 1k)
11
°C/W
Package Marking and Ordering Information
Device Marking
3016
Device
FDMS3016DC
©2010 Fairchild Semiconductor Corporation
FDMS3016DC Rev.1.5
Package
Dual CoolTM 56
1
Reel Size
13’’
Tape Width
12 mm
Quantity
3000 units
www.fairchildsemi.com
FDMS3016DC N-Channel Dual CoolTM 56 PowerTrench® MOSFET
July 2013
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 μA, VGS = 0 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
1
μA
IGSS
Gate to Source Leakage Current
VGS = ±20 V, VDS = 0 V
±100
nA
3.0
V
30
V
17
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 μA
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 μA, referenced to 25 °C
rDS(on)
Static Drain to Source On Resistance
gFS
Forward Transconductance
1.0
1.9
-6
mV/°C
VGS = 10 V, ID = 12 A
5.0
6.0
VGS = 4.5 V, ID = 10 A
7.0
9.0
VGS = 10 V, ID = 12 A, TJ = 125 °C
7.5
9.4
VDS = 5 V, ID = 12 A
44
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
VDS = 15 V, VGS = 0 V,
f = 1 MHz
1038
1385
pF
513
685
pF
87
135
pF
Ω
0.9
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg
Total Gate Charge
VGS = 0 V to 10 V
Qg
Total Gate Charge
Qgs
Gate to Source Gate Charge
VGS = 0 V to 4.5 V VDD = 15 V,
ID = 12 A
Qgd
Gate to Drain “Miller” Charge
VDD = 15 V, ID = 12 A,
VGS = 10 V, RGEN = 6 Ω
9
18
ns
3
10
ns
19
35
ns
2
10
ns
16
23
nC
7.6
10.6
nC
3
nC
2.5
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
©2010 Fairchild Semiconductor Corporation
FDMS3016DC Rev.1.5
VGS = 0 V, IS = 12 A
VGS = 0 V, IS = 1.9 A
(Note 2)
(Note 2)
IF = 12 A, di/dt = 100 A/μs
2
0.82
1.3
0.73
1.2
V
25
45
ns
9
18
nC
www.fairchildsemi.com
FDMS3016DC N-Channel Dual CoolTM 56 PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
RθJC
Thermal Resistance, Junction to Case
(Top Source)
5.7
RθJC
Thermal Resistance, Junction to Case
(Bottom Drain)
2.1
RθJA
Thermal Resistance, Junction to Ambient
(Note 1a)
38
RθJA
Thermal Resistance, Junction to Ambient
(Note 1b)
81
RθJA
Thermal Resistance, Junction to Ambient
(Note 1c)
27
RθJA
Thermal Resistance, Junction to Ambient
(Note 1d)
34
RθJA
Thermal Resistance, Junction to Ambient
(Note 1e)
16
RθJA
Thermal Resistance, Junction to Ambient
(Note 1f)
19
RθJA
Thermal Resistance, Junction to Ambient
(Note 1g)
26
RθJA
Thermal Resistance, Junction to Ambient
(Note 1h)
61
RθJA
Thermal Resistance, Junction to Ambient
(Note 1i)
16
RθJA
Thermal Resistance, Junction to Ambient
(Note 1j)
23
RθJA
Thermal Resistance, Junction to Ambient
(Note 1k)
11
RθJA
Thermal Resistance, Junction to Ambient
(Note 1l)
13
°C/W
NOTES:
1. RθJA is determined with the device mounted on a FR-4 board using a specified pad of 2 oz copper as shown below. RθJC is guaranteed by design while RθCA is determined
by the user's board design.
b. 81 °C/W when mounted on
a minimum pad of 2 oz copper
a. 38 °C/W when mounted on
a 1 in2 pad of 2 oz copper
c. Still air, 20.9x10.4x12.7mm Aluminum Heat Sink, 1 in2 pad of 2 oz copper
d. Still air, 20.9x10.4x12.7mm Aluminum Heat Sink, minimum pad of 2 oz copper
e. Still air, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, 1 in2 pad of 2 oz copper
f. Still air, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, minimum pad of 2 oz copper
g. 200FPM Airflow, No Heat Sink,1 in2 pad of 2 oz copper
h. 200FPM Airflow, No Heat Sink, minimum pad of 2 oz copper
i. 200FPM Airflow, 20.9x10.4x12.7mm Aluminum Heat Sink, 1 in2 pad of 2 oz copper
j. 200FPM Airflow, 20.9x10.4x12.7mm Aluminum Heat Sink, minimum pad of 2 oz copper
k. 200FPM Airflow, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, 1 in2 pad of 2 oz copper
l. 200FPM Airflow, 45.2x41.4x11.7mm Aavid Thermalloy Part # 10-L41B-11 Heat Sink, minimum pad of 2 oz copper
2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
3. EAS of 72 mJ is based on starting TJ = 25 °C, L = 1 mH, IAS = 12 A, VDD = 27 V, VGS = 10 V.
4. ISD ≤ 12 A, di/dt ≤ 100 A/μs, VDD ≤ BVDSS, Starting TJ = 25 oC.
©2010 Fairchild Semiconductor Corporation
FDMS3016DC Rev.1.5
3
www.fairchildsemi.com
FDMS3016DC N-Channel Dual CoolTM 56 PowerTrench® MOSFET
Thermal Characteristics
50
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
6
VGS = 10V
ID, DRAIN CURRENT (A)
40
VGS = 4.5V
VGS = 3.5V
30
VGS = 4V
20
PULSE DURATION = 80Ps
DUTY CYCLE = 0.5%MAX
10
VGS = 3V
0
0
1
2
3
4
PULSE DURATION = 80Ps
DUTY CYCLE = 0.5%MAX
5
VGS = 3V
4
VGS = 3.5V
3
VGS = 4V
1
VGS = 10V
0
5
0
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
rDS(on), DRAIN TO
1.4
1.2
1.0
0.8
-25
0
25
50
75
100 125
TJ, JUNCTION TEMPERATURE (oC)
SOURCE ON-RESISTANCE (m:)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
40
50
50
ID = 12A
VGS = 10V
PULSE DURATION = 80Ps
DUTY CYCLE = 0.5%MAX
40
ID = 12A
30
20
TJ = 125oC
10
TJ = 25oC
0
150
2
4
6
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On- Resistance
vs Junction Temperature
Figure 4. On-Resistance vs Gate to
Source Voltage
50
IS, REVERSE DRAIN CURRENT (A)
50
PULSE DURATION = 80Ps
DUTY CYCLE = 0.5%MAX
40
ID, DRAIN CURRENT (A)
30
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.8
0.6
-50
20
ID, DRAIN CURRENT(A)
Figure 1. On-Region Characteristics
1.6
VGS = 4.5V
2
VDS = 5V
30
20
TJ = 150oC
TJ = 25oC
10
TJ = -55oC
0
1
2
3
4
VGS = 0V
10
TJ = 150oC
1
TJ = 25oC
0.1
TJ = -55oC
0.01
0.001
0.0
5
0.2
0.4
0.6
0.8
1.0
VGS, GATE TO SOURCE VOLTAGE (V)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
©2010 Fairchild Semiconductor Corporation
FDMS3016DC Rev.1.5
4
1.2
www.fairchildsemi.com
FDMS3016DC N-Channel Dual CoolTM 56 PowerTrench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
10
3000
VGS, GATE TO SOURCE VOLTAGE(V)
ID = 12A
Ciss
8
1000
CAPACITANCE (pF)
VDD = 10V
VDD = 15V
6
VDD = 20V
4
Coss
100
f = 1MHz
VGS = 0V
2
0
0
3
6
9
12
15
Crss
30
0.1
18
1
10
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE(nC)
Figure 7. Gate Charge Characteristics
Figure 8. Capacitance vs Drain
to Source Voltage
80
30
o
ID, DRAIN CURRENT (A)
IAS, AVALANCHE CURRENT(A)
RθJC = 2.1 C/W
10
TJ = 25oC
TJ = 125oC
1
0.01
0.1
1
10
60
VGS = 10 V
40
0
25
100
50
tAV, TIME IN AVALANCHE(ms)
P(PK), PEAK TRANSIENT POWER (W)
2000
1000
ID, DRAIN CURRENT (A)
100 us
10
1 ms
10 ms
100 ms
1s
THIS AREA IS
LIMITED BY rDS(on)
10 s
SINGLE PULSE
TJ = MAX RATED
DC
RθJA = 81 oC/W
TA = 25 oC
0.001
0.01
0.1
1
10
100 200
VDS, DRAIN to SOURCE VOLTAGE (V)
150
SINGLE PULSE
o
RθJA = 81 C/W
o
TA = 25 C
100
10
1
0.5
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, PULSE WIDTH (sec)
Figure 11. Forward Bias Safe
Operating Area
©2010 Fairchild Semiconductor Corporation
FDMS3016DC Rev.1.5
125
Figure 10. Maximum Continuous Drain
Current vs Case Temperature
100
0.01
100
o
500
0.1
75
TC, CASE TEMPERATURE ( C)
Figure 9. Unclamped Inductive
Switching Capability
1
VGS = 4.5 V
Limited by package
20
Figure 12. Single Pulse Maximum
Power Dissipation
5
www.fairchildsemi.com
FDMS3016DC N-Channel Dual CoolTM 56 PowerTrench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
2
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
0.01
t1
t2
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
o
RθJA = 81 C/W
0.001
0.0005
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
©2010 Fairchild Semiconductor Corporation
FDMS3016DC Rev.1.5
6
www.fairchildsemi.com
FDMS3016DC N-Channel Dual CoolTM 56 PowerTrench® MOSFET
Typical Characteristics TJ = 25°C unless otherwise noted
(2X)
A
.1 C
4.90
(2X)
A
(2.60)
(0.90)
5.10
.1 C
CL
8
0.77
B
5
CL
8
7
6
1.27
5
KEEPOUT
2.04 AREA
2.54
A
(3.30)
3.91
5.80
1.22
(2.08)
2.67
(0.82)
1
1.27
4
(1.05)
OPTIONAL PIN 1
INDICATOR
1
SEE
DETAIL A
2
3
4
0.61
1.27
3.81
LAND PATTERN
RECOMMENDATION
A 5.00
4.80
OPTIONAL DRAFT ANGLE
MAY APPEAR ON FOUR
A 0.41
(8X) SIDES OF THE PACKAGE
0.31
0.50 (8X)
0.40
7°
0.10
C A B
3.81
1.27
(0.34)
1
2
3
A 0.71 (4X)
0.44
4
A (1.40)
0.35
0.25
0.40
0.30
CHAMFER
CORNER
AS PIN #1
IDENT MAY
APPEAR AS
OPTIONAL
3.58
3.38
1.05
0.95
(0.50)
5.85 A
5.50
(0.20)
(8X)
8
7
6
5
0.65
0.45 (4X)
3.86
3.61
0.1 MAX
0.10 C
0.08 C
(1.02)
0.30
0.20
SCALE: 2:1
0.05
0.00
C
SEATING
PLANE
NOTES:
A) PACKAGE IS NOT FULLY COMPLIANT
TO JEDEC MO-240, VARIATION AA.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS
OR MOLD FLASH. MOLD FLASH OR
BURRS DOES NOT EXCEED 0.10MM.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M-2009.
E) IT IS RECOMMENDED TO HAVE NO TRACES
OR VIAS WITHIN THE KEEP OUT AREA.
F) DRAWING FILE NAME: PQFN08DREV4
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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