FDMS3D5N08LC
MOSFET, N-Channel
Shielded Gate,
POWERTRENCH)
80 V, 136 A, 3.5 mW
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General Description
T h i s N −C h a n n e l M V M O S F E T i s p r o d u c e d u s i n g
ON Semiconductor’s advanced POWERTRENCH® process that
incorporates Shielded Gate technology. This process has been
optimized to minimise on−state resistance and yet maintain superior
switching performance with best in class soft body diode.
D
5
4
G
D
6
3
S
Features
D
7
2
S
D
8
1
S
•
•
•
•
•
•
•
•
Shielded Gate MOSFET Technology
Max rDS(on) = 3.5 mW at VGS = 10 V, ID = 45 A
Max rDS(on) = 5.1 mW at VGS = 4.5 V, ID = 36 A
50% Lower Qrr than Other MOSFET Suppliers
Lowers Switching Noise/EMI
MSL1 Robust Package Design
100% UIL Tested
RoHS Compliant
N-Channel MOSFET
DD
G
Typical Applications
•
•
•
•
Parameter
Ratings
Unit
Drain to Source Voltage
80
V
VGS
Gate to Source Voltage
±20
V
Drain Current − Continuous TC = 25°C (Note 5)
136
A
− Continuous TC = 100°C
(Note 5)
86
− Continuous TA = 25°C
(Note 1a)
19
− Pulsed (Note 4)
745
EAS
Single Pulse Avalanche Energy
486
mJ
PD
Power dissipation TC = 25°C
125
W
Power dissipation TA = 25°C (Note 1a)
2.5
Operating and Storage Junction Temperature
Range
D
Pin 1
Bottom
MARKING DIAGRAM
VDS
TJ,
TSTG
S
D
Power 56
(PQFN8 5x6)
CASE 483AE
MOSFET MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
ID
SS
Top
Primary DC−DC MOSFET
Synchronous Rectifier in DC−DC and AC−DC
Motor Drive
Solar
Symbol
ELECTRICAL CONNECTION
$Y&Z&3&K
FDMS
3D5N08LC
$Y
&Z
&3
&K
FDMS3D5N08LC
= ON Semiconductor Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2
of this data sheet.
−55 to
+150
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
© Semiconductor Components Industries, LLC, 2013
October, 2018 − Rev. 0
1
Publication Order Number:
FDMS3D5N08LC/D
FDMS3D5N08LC
THERMAL CHARACTERISTICS
Symbol
Parameter
Ratings
Unit
°C/W
RqJC
Thermal Resistance, Junction to Case
1.0
RqJA
Thermal Resistance, Junction to Ambient (Note 1a)
50
PACKAGE MARKING AND ORDERING INFORMATION
Device Marking
Device
Package
Shipping†
FDMS3D5N08LC
FDMS3D5N08LC
PQFN8 5×6
(Pb−Free/Halogen Free)
3000 Units/
Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BVDSS
Drain to Source Breakdown Voltage
DBV DSS
DT J
Breakdown Voltage Temperature
Coefficient
ID = 250 mA, referenced to 25°C
IDSS
Zero Gate Voltage Drain Current
VDS = 64 V, VGS = 0 V
1
mA
IGSS
Gate−to−Source Leakage Current
VGS = ±20 V, VDS = 0 V
±100
nA
2.5
V
ID = 250 mA, VGS = 0 V
80
V
69
mV/°C
ON CHARACTERISTICS
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 mA
DV GS(th)
DT J
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 mA, referenced to 25°C
−5.2
Static Drain to Source On Resistance
VGS = 10 V, ID = 45 A
2.8
3.5
VGS = 4.5 V, ID = 36 A
4.0
5.1
VGS = 10 V, ID = 45 A, TJ = 125°C
4.8
6.0
VDS = 5 V, ID = 45 A
300
VDS = 40 V, VGS = 0 V, f = 1MHz
4375
6125
1025
1435
39
60
1.4
3
W
ns
rDS(on)
gFS
Forward Transconductance
1.0
1.4
mV/°C
mW
S
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
0.1
pF
SWITCHING CHARACTERISTICS
td(on)
tr
tD(off)
tf
Turn*On Delay Time
VDD = 40 V, ID = 45 A,
VGS = 10 V, RGEN = 6 W
12
22
20
36
Turn*Off Delay Time
70
112
Fall Time
22
35
59
82
28
39
Rise Time
Qg
Total Gate Charge
VGS = 0V to 10 V
Qg
Total Gate Charge
VGS = 0V to 4.5 V
VDD = 40 V,
iD = 45 A
Qgs
Gate to Source Charge
Qgd
Gate to Drain “Miller” Charge
Qoss
Output Charge
VDD = 40 V, VGS = 0 V
56
Qsync
Total Gate Charge Sync.
VDS = 0 V, ID = 45 A
55
nC
10
7
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2
nC
FDMS3D5N08LC
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (continued)
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
VGS = 0 V, IS = 2.1 A (Note 2)
0.7
1.2
V
VGS = 0 V, IS = 45 A (Note 2)
0.8
1.3
IF = 22 A, di/dt = 300 A/ms
25
39
ns
86
137
nC
DRAIN−SOURCE DIODE CHARACTERISTICS
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IF = 22 A, di/dt = 1000 A/ms
20
32
ns
186
297
nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
NOTES:
1. RqJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 × 1.5 in. board of FR−4 material. RqCA is determined
by the user’s board design.
a) 50°C/W when mounted on
a 1 in2 pad of 2 oz copper.
Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
EAS of 486 mJ is based on starting TJ = 25_C; N−ch: L = 3 mH, IAS = 18 A, VDD = 80 V, VGS = 10 V. 100% tested at L = 0.1 mH, IAS = 57 A.
Pulsed ID please refer to Figure 11 SOA graph for more details.
Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal &
electro−mechanical application board design.
TYPICAL CHARACTERISTICS TJ = 25°C unless otherwise noted
250
5
VGS = 10 V
NORMALIZED
DRAIN TO SOURCE ON−RESISTANCE
ID, DRAIN CURRENT (A)
2.
3.
4.
5.
b) 125°C/W when mounted on
a minimum pad of 2 oz copper.
VGS = 8 V
200
VGS = 6 V
150
VGS = 4.5 V
VGS = 3.5 V
100
VGS = 3 V
50
0
PULSE DURATIONV = 80 ms
DUTY CYCLE = 0.5% MAX
0
1
2
3
4
5
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = 3 V
VGS = 3.5 V
4
3
2
VGS = 4 V
1
0
PULSE DURATIONV = 80 ms
DUTY CYCLE = 0.5% MAX
0
50
100
VGS = 8 V
150
VGS = 6 V
VGS = 10 V
200
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
Figure 2. Normalized On−Resistance
vs. Drain Current and Gate Voltage
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3
250
FDMS3D5N08LC
TYPICAL CHARACTERISTICS TJ = 25°C unless otherwise noted (continued)
50
ID = 45 A
VGS = 10 V
1.8
rDS(on), DRAIN TO
1.6
1.4
1.2
1.0
0.8
0.6
−75
−50
−25
0
25
50
75
100
125
SOURCE ON−RESISTANCE (mW)
NORMALIZED
DRAIN TO SOURCE ON−RESISTANCE
2.0
PULSE DURATIONV = 80 ms
DUTY CYCLE = 0.5% MAX
40
ID = 45 A
30
20
TJ = 125°C
10
TJ = 25°C
0
150
0
2
o
TJ, JUNCTION TEMPERATURE ( C)
Figure 3. Normalized On Resistance
vs. Junction Temperature
250
PULSE DURATIONV = 80 ms
DUTY CYCLE = 0.5% MAX
200
VDS = 5 V
150
100
TJ = 150°C
TJ = 25°C
50
0
TJ = −55°C
0
1
2
3
4
TJ = 150°C
1
TJ = 25°C
0.1
0.01
0.001
5
TJ = −55°C
0.0
0.2
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Source to Drain Diode Forward
Voltage vs. Source Current
10000
ID = 45 A
VDD = 30 V
Ciss
8
CAPACITANCE (pF)
VGS, GATE TO SOURCE VOLTAGE (V)
10
10
Figure 5. Transfer Characteristics
VDD = 40 V
6
VDD = 50 V
4
2
0
8
VGS = 0 V
100
VGS, GATE TO SOURCE VOLTAGE (V)
10
6
Figure 4. On−Resistance vs. Gate
to Source Voltage
IS, REVERSE DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
250
4
VGS, GATE TO SOURCE VOLTAGE (V)
1000
Coss
100
Crss
10
f = 1 Mhz
VGS = 0 V
0
12
24
36
48
1
0.1
60
Qg, GATE CHARGE (nC)
1
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 8. Capacitance vs. Drain
to Source Voltage
Figure 7. Gate Charge Characteristics
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4
80
FDMS3D5N08LC
TYPICAL CHARACTERISTICS TJ = 25°C unless otherwise noted (continued)
150
ID, DRAIN CURRENT (A)
IAS, AVALANCHE CURRENT (A)
100
TJ = 25°C
10
TJ = 100°C
TJ = 125°C
1
0.001
0.01
0.1
1
10
100
RqJC = 1.0°C/W
120
VGS = 10 V
90
60
VGS = 4.5 V
30
0
1000
25
50
125
150
Figure 10. Maximum Continous Drain
Current vs. Case Temperature
100000
P(PK), PEAK TRANSIENT POWER (W)
1000
10 ms
ID, DRAIN CURRENT (A)
100
TC, CASE TEMPERATURE ( C)
Figure 9. Unclamped Inductive
Switching Capability
100
100 ms
10
THIS AREA IS
LIMITED BY rDS(on)
1
0.1
0.1
SINGLE PULSE
TJ = MAX RATED
RqJC = 1.0°C/W
TC = 25°C
1
1 ms
10 ms
CURVE BENT TO
MEASURED DATA
10
100 ms/DC
100
500
SINGLE PULSE
RqJC = 1.0°C/W
TC = 25°C
10000
1000
100
10
10−5
10−4
Figure 11. Unclamped Inductive
Switching Capability
2
1
0.1
10−3
10−2
10−1
1
t, PULSE WIDTH (sec)
VDS, DRAIN to SOURCE VOLTAGE (V)
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
75
o
tAV, TIME IN AVALANCHE (ms)
Figure 12. Maximum Continuous Drain
Current vs. Case Temperature
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
0.01
0.001
10−5
PDM
t1
t2
NOTES:
ZqJC (t) = r(t) × RqJC
RqJC = 1.0°C/W
PEAK TJ = PDM × ZqJC (t) + TC
Duty cycle, D = t1/t2
SINGLE PULSE
10−4
10−3
10−2
10−1
1
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction−to−Case Transient Thermal Response Curve
POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States
and/or other countries.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PQFN8 5X6, 1.27P
CASE 483AE
ISSUE B
DOCUMENT NUMBER:
DESCRIPTION:
98AON13655G
PQFN8 5X6, 1.27P
DATE 06 JUL 2021
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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