P-Channel PowerTrench® MOSFET
-30 V, -122 A, 3.2 mΩ
Features
General Description
Max rDS(on) = 3.2 mΩ at VGS = -10 V, ID = -21.1 A
The FDMS6681Z has been designed to minimize losses in load
switch applications. Advancements in both silicon and package
technologies have been combined to offer the lowest rDS(on) and
ESD protection.
Max rDS(on) = 5.0 mΩ at VGS = -4.5 V, ID = -15.7 A
Advanced Package and Silicon combination
for low rDS(on)
Applications
HBM ESD Protection Level of 8kV Typical(Note 3)
MSL1 Robust Package Design
Load Switch in Notebook and Server
RoHS Compliant
Notebook Battery Pack Power Management
Bottom
Top
S
D
D
D
Pin 1
S
S
G
D
D
5
4
G
D
6
3
S
D
7
2
S
D
8
1
S
Power 56
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted.
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current -Continuous
ID
TC = 25 °C
-Continuous
TC = 100 °C
-Continuous
TA = 25 °C
-Pulsed
PD
TJ, TSTG
(Note5)
Power Dissipation
TC = 25 °C
Power Dissipation
TA = 25 °C
(Note5)
Ratings
-30
Units
V
±25
V
-122
-77
(Note 1a)
-21.1
(Note4)
-600
A
73
(Note 1a)
Operating and Storage Junction Temperature Range
W
2.5
-55 to +150
°C
Thermal Characteristics
RθJC
Thermal Resistance, Junction to Case
RθJA
Thermal Resistance, Junction to Ambient
1.7
(Note 1a)
50
°C/W
Package Marking and Ordering Information
Device Marking
FDMS6681Z
Device
FDMS6681Z
©2009 Semiconductor Components Industries, LLC.
October-2017, Rev. 2
Package
Power 56
1
Reel Size
13 ’’
Tape Width
12 mm
Quantity
3000 units
Publication Order Number:
FDMS6681Z/D
FDMS6681Z P-Channel PowerTrench® MOSFET
FDMS6681Z
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = -250 μA, VGS = 0 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = -250 μA, referenced to 25 °C
IDSS
Zero Gate Voltage Drain Current
VDS = -24 V, VGS = 0 V
-1
μA
IGSS
Gate to Source Leakage Current
VGS = ±25 V, VDS = 0 V
±10
μA
-3
V
-30
V
20
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = -250 μA
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = -250 μA, referenced to 25 °C
rDS(on)
Static Drain to Source On Resistance
gFS
Forward Transconductance
-1
-1.7
-7
mV/°C
VGS = -10 V, ID = -22.1 A
2.7
3.2
VGS = -4.5 V, ID = -15.7 A
4.0
5.0
VGS = -10 V, ID = -22.1 A, TJ = 125 °C
3.9
5.0
VDD = -10 V, ID = -22.1 A
143
VDS = -15 V, VGS = 0 V,
f = 1 MHz
7803
10380
pF
1540
2050
pF
1345
2020
pF
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg
Total Gate Charge
VGS = 0 V to -10 V
Qg
Total Gate Charge
VGS = 0 V to -5 V
Qgs
Gate to Source Charge
Qgd
Gate to Drain “Miller” Charge
VDD = -15 V, ID = -22.1 A,
VGS = -10 V, RGEN = 6 Ω
VDD = -15 V,
ID = -22.1 A
15
24
ns
38
61
ns
260
416
ns
197
316
ns
172
241
nC
97
136
nC
22
nC
46
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = -2.1 A
(Note 2)
0.68
1.2
V
VGS = 0 V, IS = -22.1 A
(Note 2)
0.79
1.25
V
IF = -22.1 A, di/dt = 100 A/μs
44
71
ns
39
63
nC
NOTES:
1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by
the user's board design.
a. 50 °C/W when mounted on
a 1 in2 pad of 2 oz copper.
2.
3.
4.
5.
b. 125 °C/W when mounted on a
minimum pad of 2 oz copper.
Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%.
The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
Pulsed Id please refer to Fig 12 SOA graph for more details.
Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal electro-mechanical application board design.
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2
FDMS6681Z P-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted.
5
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
-ID, DRAIN CURRENT (A)
90
VGS = -3.5 V
75
VGS = -4 V
VGS = -4.5 V
60
VGS = -10V
45
30
VGS = -3 V
15
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
0
0
1
2
VGS = -3 V
4
VGS = -3.5 V
3
1
VGS = -10 V
0
3
0
15
30
45
60
75
90
-ID, DRAIN CURRENT (A)
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
Figure 1. On Region Characteristics
1.6
12
ID = -22.1 A
VGS = -10 V
rDS(on), DRAIN TO
1.4
1.2
1.0
0.8
0.6
-75
-50
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
VGS = -4 V
VGS = -4.5 V
2
-VDS, DRAIN TO SOURCE VOLTAGE (V)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
9
ID = -22.1 A
6
TJ = 125 oC
3
TJ = 25 oC
0
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
2
4
6
8
10
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 4. On-Resistance vs Gate to
Source Voltage
Figure 3. Normalized On Resistance
vs Junction Temperature
90
100
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
75
-IS, REVERSE DRAIN CURRENT (A)
-ID, DRAIN CURRENT (A)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5%MAX
VDS = -5 V
60
TJ
= 150 oC
45
30
TJ = 25 oC
15
TJ = -55 oC
0
VGS = 0 V
10
TJ = 150 oC
1
TJ = 25 oC
0.1
0.01
TJ = -55 oC
0.001
0
1
2
3
4
0
0.2
0.4
0.6
0.8
1.0
-VSD, BODY DIODE FORWARD VOLTAGE (V)
-VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
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3
1.2
FDMS6681Z P-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted.
20000
ID = -22.1 A
8
10000
VDD = -10 V
CAPACITANCE (pF)
-VGS, GATE TO SOURCE VOLTAGE (V)
10
6
VDD = -15 V
4
VDD = -20 V
2
Ciss
Coss
f = 1 MHz
0
0
50
100
150
600
0.1
200
Figure 7. Gate Charge Characteristics
30
10
Figure 8. Capacitance vs Drain
to Source Voltage
140
100
50
-ID, DRAIN CURRENT (A)
-IAS, AVALANCHE CURRENT (A)
1
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
TJ = 25 oC
TJ = 100 oC
TJ = 125
oC
120
VGS = -10 V
100
80
60
VGS = -4.5 V
40
20
o
1
0.001
RθJC = 1.7 C/W
0.01
0.1
1
10
0
25
100
tAV, TIME IN AVALANCHE (ms)
50
75
100
125
Figure 10. Maximum Continuous Drain
Current vs. Case Temperature
-4
10
1000
VGS = 0 V
10 us
-5
-ID, DRAIN CURRENT (A)
10
TJ = 150 oC
-6
10
-7
10
TJ = 25 oC
-8
10
100
100 us
10
1 ms
THIS AREA IS
LIMITED BY rDS(on)
10 ms
SINGLE PULSE
TJ = MAX RATED
1
DC
o
CURVE BENT TO
MEASURE DATA
-9
10
150
o
TC, CASE TEMPERATURE ( C)
Figure 9. Unclamped Inductive
Switching Capability
Ig, GATE LEAKAGE CURRENT (A)
Crss
1000 VGS = 0 V
0
5
10
15
20
25
30
0.1
0.1
1
RθJC = 1.7 C/W
TC = 25 oC
10
-VDS, DRAIN to SOURCE VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 11. Igss vs Vgss
Figure 12. Forward Bias Safe
Operating Area
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4
80
FDMS6681Z P-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted.
P(PK), PEAK TRANSIENT POWER (W)
100000
SINGLE PULSE
o
RθJC = 1.7 C/W
10000
o
TC = 25 C
1000
100
10
-5
10
-4
10
-3
10
-2
-1
10
10
1
t, PULSE WIDTH (s)
Figure 13. Single Pulse Maximum Power Dissipation
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
2
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
NOTES:
0.01
ZθJC(t) = r(t) x RθJC
RθJC = 1.7 oC/W
Peak TJ = PDM x ZθJC(t) + TC
Duty Cycle, D = t1 / t2
SINGLE PULSE
0.001
-5
10
-4
10
-3
10
-2
10
t, RECTANGULAR PULSE DURATION (s)
Figure 14. Transient Thermal Response Curve
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5
-1
10
1
FDMS6681Z P-Channel PowerTrench® MOSFET
Typical Characteristics TJ = 25 °C unless otherwise noted.
5 .2 0
4 .80
8
5 .10
3.9 1
A
PKG
CL
SEE
DETAIL B
B
5
0.64
8
7
6
1 .27
5
0.77
4.52
6.25
5.90
PKG CL
5 .85
5 .65
3.75
6 .6 1
KEEP O UT
AREA
1 .2 7
1
4
1
TO P V IEW
2
3
4
0.61
1 .2 7
3.8 1
OPTIONAL DRAFT
ANGLE MAY APPEAR
ON FO UR SIDES
OF THE PACKAGE
SEE
DETAIL C
5 .0 0
4 .80
LAN D PA TTE RN
REC OM MEND ATIO N
0 .3 5
0 .1 5
0 .10 C
0 .05
0 .00
S IDE V IEW
0 .08 C
1 .10
0 .9 0
SCALE: 2:1
1 .27
0.5 1 ( 8X)
0.3 1
( 0.34 )
0.10
2
3
C A B
4
0.7 6
0.4 4
(0 .52)
3.7 8
3.3 8
(0 .50)
(3.40 )
0 .3 5
0 .1 5
DE TAIL C
3.8 1
1
0.30
0.06
8X
(0 .30)
4.22
3.99
C
SEATING
P LA NE
DE TAIL B
SCALE: 2:1
N OTE S: UNLE SS OTHERWIS E SP ECIFIED
A . PACKAGE STAND ARD REFERENCE: JEDEC M O- 240 ,
ISSUE A, VAR. AA, DATED O CTOB ER 2 00 2.
B . DIMENSIO NS DO N OT INCLUDE BURRS OR MO LD FL ASH.
MO LD FLASH OR BURRS DOES NOT EXCEED 0.10 MM.
C . AL L DIMEN SIONS ARE IN MIL LIMETERS.
D . DIMENS IONING A ND TOL ER ANCING P ER ASME Y1 4.5M- 1994.
E . IT IS RECO MMENDED TO HAV E NO TRACE S OR
VIAS WITHIN TH E KEEP OUT AREA.
F. DRAW ING FIL E NAME: P QFN0 8A REV8
(2X )
8
7
6
3 .9 6
3 .6 1
5
0.64
0.34
B O TTO M VIE W
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6
FDMS6681Z P-Channel PowerTrench® MOSFET
Dimensional Outline and Pad Layout
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