FDMS7556S

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Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. FDMS7556S N-Channel PowerTrench® SyncFETTM 25 V, 130 A, 1.2 mΩ Features General Description „ Max rDS(on) = 1.2 mΩ at VGS = 10 V, ID = 35 A The FDMS7556S has been designed to minimize losses in power conversion application. Advancements in both silicon and package technologies have been combined to offer the lowest rDS(on) while maintaining excellent switching performance. This device has the added benefit of an efficient monolithic Schottky body diode. „ Max rDS(on) = 1.65 mΩ at VGS = 4.5 V, ID = 31 A „ Advanced Package and Silicon combination for low rDS(on) and high efficiency „ SyncFET Schottky Body Diode „ MSL1 robust package design Applications „ 100% UIL tested „ Synchronous Rectifier for Synchronous Buck Converters „ RoHS Compliant „ Notebook „ Server „ Telecom „ High Efficiency DC-DC Switch Mode Power Supplies Bottom Top Pin 1 S D D D S S G D 5 4 G D 6 3 D 7 2 S D 8 1 S S D Power 56 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage (Note 4) Drain Current -Continuous (Package limited) ID TC = 25 °C -Continuous (Silicon limited) TC = 25 °C -Continuous TA = 25 °C PD TJ, TSTG Units V ±20 V 130 222 (Note 1a) 35 (Note 3) 312 -Pulsed A 200 Single Pulse Avalanche Energy EAS Ratings 25 Power Dissipation TC = 25 °C Power Dissipation TA = 25 °C 96 (Note 1a) Operating and Storage Junction Temperature Range 2.5 -55 to +150 mJ W °C Thermal Characteristics RθJC Thermal Resistance, Junction to Case RθJA Thermal Resistance, Junction to Ambient 1.3 (Note 1a) 50 °C/W Package Marking and Ordering Information Device Marking FDMS7556S Device FDMS7556S ©2013 Fairchild Semiconductor Corporation FDMS7556S Rev.C4 Package Power 56 1 Reel Size 13 ’’ Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMS7556S N-Channel Power Trench® SyncFETTM October 2014 Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 1 mA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient 25 V ID = 10 mA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = 20 V, VGS = 0 V 500 μA IGSS Gate to Source Leakage Current, Forward VGS = 20 V, VDS = 0 V 100 nA 3.0 V 22 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 1 mA ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 10 mA, referenced to 25 °C rDS(on) Static Drain to Source On Resistance gFS Forward Transconductance 1.2 1.6 -5 mV/°C VGS = 10 V, ID = 35 A 0.95 1.2 VGS = 4.5 V, ID = 31 A 1.3 1.65 VGS = 10 V, ID = 35 A, TJ = 125 °C 1.2 1.6 VDS = 5 V, ID = 35 A 212 mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = 13 V, VGS = 0 V, f = 1 MHz 6740 8965 pF 1940 2580 pF 314 475 pF 0.6 1.3 Ω 20 36 ns 9 18 ns 48 77 ns Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg Total Gate Charge VGS = 0 V to 10 V Qg Total Gate Charge Qgs Gate to Source Gate Charge VGS = 0 V to 4.5 V VDD = 13 V ID = 35 A Qgd Gate to Drain “Miller” Charge VDD = 13 V, ID = 35 A, VGS = 10 V, RGEN = 6 Ω 5.3 11 ns 95 133 nC 43 60 nC 18.6 nC 8.8 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 2 A (Note 2) 0.37 0.7 VGS = 0 V, IS = 35 A (Note 2) 0.74 1.2 IF = 35 A, di/dt = 300 A/μs V 44 71 ns 68 109 nC Notes: 1. RθJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 50 °C/W when mounted on a 1 in2 pad of 2 oz copper. b. 125 °C/W when mounted on a minimum pad of 2 oz copper. 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. EAS of 312 mJ is based on starting TJ = 25 °C, L = 1 mH, IAS = 25 A, VDD = 23 V, VGS = 10 V. 100% test at L = 0.3 mH, IAS = 38 A. 4. As an N-ch device, the negative Vgs rating is for low duty cycle pulse occurrence only. No continuous rating is implied. ©2013 Fairchild Semiconductor Corporation FDMS7556S Rev.C4 2 www.fairchildsemi.com FDMS7556S N-Channel Power Trench® SyncFETTM Electrical Characteristics TJ = 25 °C unless otherwise noted VGS = 10 V PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX ID, DRAIN CURRENT (A) 160 VGS = 4.5 V VGS = 3.5 V 120 VGS = 3 V 80 40 14 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 200 VGS = 2.5 V VGS = 2.5 V 10 6 4 0.5 1.0 1.5 VDS, DRAIN TO SOURCE VOLTAGE (V) 0 2.0 40 80 120 160 200 ID, DRAIN CURRENT (A) Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage Figure 1. On-Region Characteristics 1.5 4 ID = 35 A VGS = 10 V rDS(on), DRAIN TO 1.3 1.2 1.1 1.0 0.9 0.8 -75 -50 SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 3.5 V VGS = 4.5 V VGS = 10 V 2 0 0 IS, REVERSE DRAIN CURRENT (A) 120 = 125 oC 80 TJ = 25 oC 40 TJ = -55 oC 1.5 2.0 2.5 3.0 1 TJ = 25 oC 200 100 4 6 8 10 VGS = 0 V 10 TJ = 125 oC 1 TJ = 25 oC TJ = -55 oC 0.1 0.01 0.0 3.5 0.2 0.4 0.6 0.8 1.0 VSD, BODY DIODE FORWARD VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics ©2013 Fairchild Semiconductor Corporation FDMS7556S Rev.C4 TJ = 125 oC Figure 4. On-Resistance vs Gate to Source Voltage VDS = 5 V 0 1.0 2 VGS, GATE TO SOURCE VOLTAGE (V) PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX TJ PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 3 2 200 160 ID = 35 A 0 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) Figure 3. Normalized On- Resistance vs Junction Temperature ID, DRAIN CURRENT (A) VGS = 3 V 8 0 1.4 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 12 Figure 6. Source to Drain Diode Forward Voltage vs Source Current 3 www.fairchildsemi.com FDMS7556S N-Channel Power Trench® SyncFETTM Typical Characteristics TJ = 25 °C unless otherwise noted 10000 ID = 35 A Ciss 8 CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = 10 V 6 VDD = 13 V 4 VDD = 16 V Coss 1000 2 0 0 20 40 60 80 100 0.1 100 Figure 7. Gate Charge Characteristics 30 225 ID, DRAIN CURRENT (A) TJ = 25 oC TJ = 100 oC 10 TJ = 125 oC 1 0.01 0.1 1 10 100 180 VGS = 10 V VGS = 4.5 V 135 90 Limited by Package o RθJC = 1.3 C/W 45 0 25 1000 50 75 100 125 150 o tAV, TIME IN AVALANCHE (ms) TC, CASE TEMPERATURE ( C) Figure 9. Unclamped Inductive Switching Capability Figure 10. Maximum Continuous Drain Current vs Case Temperature 1000 P(PK), PEAK TRANSIENT POWER (W) 300 100 1ms 10 10 ms 1 10 Figure 8. Capacitance vs Drain to Source Voltage 50 IAS, AVALANCHE CURRENT (A) 1 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) ID, DRAIN CURRENT (A) Crss f = 1 MHz VGS = 0 V THIS AREA IS LIMITED BY rDS(on) 0.1 100 ms 1s SINGLE PULSE TJ = MAX RATED 10 s RθJA = 125 oC/W DC o TA = 25 C 0.01 0.01 0.1 1 10 100 o RθJA = 125 C/W o TA = 25 C 100 VGS = 10V 10 1 0.5 -3 10 -2 10 -1 10 1 10 100 1000 t, PULSE WIDTH (sec) VDS, DRAIN to SOURCE VOLTAGE (V) Figure 12. Single Pulse Maximum Power Dissipation Figure 11. Forward Bias Safe Operating Area ©2013 Fairchild Semiconductor Corporation FDMS7556S Rev.C4 SINGLE PULSE 4 www.fairchildsemi.com FDMS7556S N-Channel Power Trench® SyncFETTM Typical Characteristics TJ = 25 °C unless otherwise noted PQFN8 5X6, 1.27P CASE 483AE ISSUE A 5.10 PKG CL 8 5.10 3.91 A SEE DETAIL B B 5 1.27 8 7 6 5 0.77 4.52 PKG CL 5.85 5.65 6.15 3.75 6.61 KEEP OUT AREA 1.27 1 4 1 TOP VIEW 2 3 4 0.61 1.27 3.81 OPTIONAL DRAFT ANGLE MAY APPEAR ON FOUR SIDES OF THE PACKAGE SEE DETAIL C 5.00 4.80 LAND PATTERN RECOMMENDATION 0.35 0.15 0.10 C 0.05 0.00 SIDE VIEW 8X 0.08 C 5.20 4.80 1.10 0.90 3.81 0.35 0.15 DETAIL C SCALE: 2:1 1.27 0.51 (8X) 0.31 (0.34) 0.10 1 2 3 C A B 4 0.76 0.51 (0.52) 6.25 5.90 3.48+0.30 -0.10 (0.50) (0.30) (2X) 8 0.20+0.10 -0.15 (8X) 7 6 3.96 3.61 BOTTOM VIEW 0.30 0.05 5 C SEATING PLANE DETAIL B SCALE: 2:1 NOTES: UNLESS OTHERWISE SPECIFIED A. PACKAGE STANDARD REFERENCE: JEDEC MO-240, ISSUE A, VAR. AA,. B. DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH. MOLD FLASH OR BURRS DOES NOT EXCEED 0.10MM. C. ALL DIMENSIONS ARE IN MILLIMETERS. D. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-2009. E. IT IS RECOMMENDED TO HAVE NO TRACES OR VIAS WITHIN THE KEEP OUT AREA. ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. 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