FDMS86252L

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This process has been optimized for the on-state resistance and yet maintain superior switching performance. „ Shielded Gate MOSFET Technology „ Max rDS(on) = 56 mΩ at VGS = 10 V, ID = 4.4 A „ Max rDS(on) = 71 mΩ at VGS = 6 V, ID = 3.8 A „ Max rDS(on) = 75 mΩ at VGS = 4.5 V, ID = 3.7 A Applications „ Advanced package and silicon combination for low rDS(on) and high efficiency „ OringFET / Load Switching „ Next generation enhanced body diode technology, engineered for soft recovery „ Synchronous Rectification „ DC-DC Conversion „ MSL1 robust package design „ 100% UIL tested „ RoHS Compliant Bottom Top Pin 1 S Pin 1 D D D S S G S D S D S D G D D Power 56 MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current -Continuous TC = 25 °C -Continuous TA = 25 °C ID -Pulsed Single Pulse Avalanche Energy EAS PD TJ, TSTG TC = 25 °C Power Dissipation TA = 25 °C Units V ±20 V 12 (Note 1a) 4.4 (Note 4) 30 (Note 3) Power Dissipation Ratings 150 73 50 (Note 1a) Operating and Storage Junction Temperature Range 2.5 -55 to +150 A mJ W °C Thermal Characteristics RθJC Thermal Resistance, Junction to Case RθJA Thermal Resistance, Junction to Ambient 2.5 (Note 1a) 50 °C/W Package Marking and Ordering Information Device Marking FDMS86252L Device FDMS86252L ©2013 Fairchild Semiconductor Corporation FDMS86252L Rev.C2 Package Power 56 1 Reel Size 13 ’’ Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMS86252L N-Channel Shielded Gate PowerTrench® MOSFET October 2014 Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = 120 V, VGS = 0 V 1 μA IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±100 nA 3 V 150 V 104 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C -6 VGS = 10 V, ID = 4.4 A 46 VGS = 6 V, ID = 3.8 A 48 71 VGS = 4.5 V, ID = 3.7 A 52 75 VGS = 10 V, ID = 4.4 A, TJ = 125 °C 90 110 VDS = 5 V, ID = 4.4 A 21 rDS(on) gFS Static Drain to Source On Resistance Forward Transconductance 1 1.5 mV/°C 56 mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = 75 V, VGS = 0 V, f = 1 MHz 0.1 952 1335 pF 74 105 pF 3 5 pF 0.6 1.8 Ω 6.8 14 ns 1.4 10 ns 19 34 ns Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time VDD = 75 V, ID = 4.4 A, VGS = 10 V, RGEN = 6 Ω tf Fall Time 2.9 10 ns Qg Total Gate Charge VGS = 0 V to 10 V 15 21 nC VGS = 0 V to 4.5 V VDD = 75 V, ID = 4.4 A 7.6 11 2.1 nC 2.3 nC Qg Total Gate Charge Qgs Gate to Source Charge Qgd Gate to Drain “Miller” Charge nC Drain-Source Diode Characteristics VSD Source-Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 1.9 A (Note 2) 0.7 1.2 VGS = 0 V, IS = 4.4 A (Note 2) 0.8 1.3 IF = 4.4 A, di/dt = 100 A/μs V 53 85 ns 51 82 nC Notes: 1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 50 °C/W when mounted on a 1 in2 pad of 2 oz copper b. 125 °C/W when mounted on a minimum pad of 2 oz copper. SS SF DS DF G SS SF DS DF G 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. EAS of 73 mJ is based on Starting TJ = 25 °C, L = 3 mH, IAS = 7 A, VDD = 150 V, VGS = 10 V. 100% tested at L =0.1 mH, IAS = 24 A. 4. Pulsed Id limited by junction temperature, td