DATA SHEET
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MOSFET – N-Channel,
POWERTRENCH)
80 V, 30 A, 22 mW
V(BR)DSS
RDS(ON) MAX
ID MAX
80 V
22 mW @ 10 V
30 A
ELECTRICAL CONNECTION
FDMS86381-F085
Features
•
•
•
•
•
Typ RDS(on) = 17.2 mW at VGS = 10 V; ID = 30 A
Typ Qg(tot) = 14 nC at VGS = 10 V; ID = 30 A
UIS Capability
AEC−Q101 Qualified and PPAP Capable
This Device is Pb−Free, Halogen Free/BFR Free and is RoHS
Compliant
N−Channel MOSFET
Top
Bottom
D
Applications
•
•
•
•
•
•
•
Automotive Engine Control
PowerTrain Management
Solenoid and Motor Drivers
Electronic Steering
Integrated Starter/Alternator
Distributed Power Architectures and VRM
Primary Switch for 12 V Systems
G
S
S
D
D
D
S
DFNW8
CASE 507AU
MARKING DIAGRAM
MOSFET MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Value
Unit
Drain−to−Source Voltage
Parameter
VDSS
80
V
Gate−to−Source Voltage
VGS
±20
V
ID
30
A
Continuous Drain Current
(VGS = 10 V) (Note 1)
TC = 25°C
Pulsed Drain Current
TC = 25°C
See
Figure 4
Single Pulse Avalanche Energy (Note 2)
EAS
11.5
mJ
Power Dissipation
PD
50
W
0.33
W/°C
TJ, TSTG
−55 to
+175
°C
Thermal Resistance (Junction−to−Case)
RqJC
3
°C/W
Maximum Thermal Resistance
(Junction−to−Ambient) (Note 3)
RqJA
50
°C/W
Derate above 25°C
Operating and Storage Temperature
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Current is limited by bondwire configuration.
2. Starting Tj = 25°C, L = 40 mH, IAS = 24 A, VDD = 80 V during inductor charging
and VDD = 0 V during time in avalanche.
3. RqJA is the sum of the junction−to−case and case−to−ambient thermal
resistance where the case thermal reference is defined as the solder
mounting surface of the drain pins. RqJC is guaranteed by design while RqJA
is determined by the user’s board design. The maximum rating presented
here is based on mounting on a 1 in2 pad of 2 oz copper.
© Semiconductor Components Industries, LLC, 2016
October, 2021 − Rev. 3
1
ON AYWWWL
FDMS
86381
A
Y
WW
WL
FDMS86381
= Assembly Location
= Year
= Work Week
= Assembly Lot
= Specific Device Code
ORDERING INFORMATION
Device
Package
Shipping†
FDMS86381−F085
DFNW8
(Power 56)
(Pb−Free)
3000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
FDMS86381−F085/D
FDMS86381−F085
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
OFF CHARACTERISTICS
BVDSS
IDSS
IGSS
Drain−to−Source Breakdown Voltage
ID = 250 mA, VGS = 0 V
80
−
−
V
Drain−to−Source Leakage Current
VDS = 80 V,
VGS = 0 V
TJ = 25°C
−
−
1
mA
TJ = 175°C (Note 4)
−
−
1
mA
−
−
±100
nA
2.0
2.9
4.0
V
TJ = 25°C
−
17.2
22.0
mW
TJ = 175°C (Note 4)
−
37.7
48.2
−
866
−
Gate−to−Source Leakage Current
VGS = ±20 V
ON CHARACTERISTICS
VGS(th)
Gate−to−Source Threshold Voltage
VGS = VDS, ID = 250 mA
RDS(on)
Drain−to−Source On−Resistance
ID = 30 A
VGS = 10 V
DYNAMIC CHARACTERISTICS
VDS = 40 V, VGS = 0 V, f = 1 MHz
pF
Ciss
Input Capacitance
Coss
Output Capacitance
−
176
−
Crss
Reverse Transfer Capacitance
−
7
−
−
2.3
−
W
−
14
21
nC
−
1.7
−
Rg
Gate Resistance
f = 1 MHz
Qg(tot)
Total Gate Charge
VGS = 0 to 10 V
Qg(th)
Threshold Gate Charge
VGS = 0 to 2 V
VDD = 40 V,
ID = 30 A
Qgs
Gate−to−Source Gate Charge
−
5.1
−
Qgd
Gate−to−Drain “Miller” Charge
−
3.8
−
−
−
23
−
9
−
Rise Time
−
6
−
Turn−Off Delay
−
14
−
Fall Time
−
5
−
Turn−Off Time
−
−
28
ISD = 30 A, VGS = 0 V
−
−
1.25
ISD = 15 A, VGS = 0 V
−
−
1.2
IF = 30 A, dISD/dt = 100 A/ms, VDD = 64 V
−
34
50
ns
−
27
40
nC
SWITCHING CHARACTERISTICS
ton
Turn−On Time
td(on)
Turn−On Delay
tr
td(off)
tf
toff
VDD = 40 V, ID = 30 A,
VGS = 10 V, RGEN = 6 W
ns
DRAIN−SOURCE DIODE CHARACTERISTICS
VSD
Source−to−Drain Diode Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. The maximum value is specified by design at TJ = 175°C. Product is not tested to this condition in production
POWERTRENCH is a registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United
States and/or other countries.
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2
FDMS86381−F085
TYPICAL CHARACTERISTICS
40
0.8
0.6
0.4
0.2
0.0
Current Limited
by Silicon Current Limited
35
1.0
ID, DRAIN CURRENT (A)
POWER DISSIPATION MULTIPLIER
1.2
by Package
30
25
20
15
10
5
0
25
50
75
100
125
150
0
175
25
50
TC, CASE TEMPERATURE (°C)
75
100
125
150
175
200
TC, CASE TEMPERATURE (°C)
Figure 2. Maximum Continuous Drain Current vs.
Case Temperature
Figure 1. Normalized Power Dissipation vs.
Case Temperature
ZqJC, NORMALIZED THERMAL IMPEDANCE
VGS = 10 V
2
DUTY CYCLE − DESCENDING ORDER
1
PDM
D = 0.50
0.20
0.10
0.05
0.02
0.01
0.1
t1
t2
DUTY CYCLE, D = t1/t2
Peak TJ = PDM x ZqJC x RqJC + TC
Single Pulse
0.01
10−5
10−4
10−3
10−2
10−1
100
101
t, RECTANGULAR PULSE DURATION (s)
Figure 3. Normalized Maximum Transient Thermal Impedance
1000
IDM, PEAK CURRENT (A)
VGS = 10 V
TC = 25°C
For temperatures above 25°C
derate peak current as follows:
ƪǸ
100
Single Pulse
10
10−5
10−4
10−3
10−2
t, RECTANGULAR PULSE DURATION (s)
Figure 4. Peak Current Capability
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3
10−1
ƫ
175 * T C
I + I 25
100
150
101
FDMS86381−F085
TYPICAL CHARACTERISTICS (Continued)
2000
1000
IAS, AVALANCHE CURRENT (A)
100
ID, DRAIN CURRENT (A)
100
10
100 ms
1
Operation in this area may
be limited by RDS(on)
0.1
0.01
1 ms
10 ms
100 ms
TC = 25°C
TJ = Max Rated
Single Pulse
1
0.1
10
100
If R = 0
tAV=(L)(IAS)/(1.3*Rated BVDSS − VDD)
If R ≠ 0
tAV=(L/R)In[(IAS*R)/(1.3*Rated BVDSS− VDD)+1]
Starting TJ = 25°C
10
Starting TJ = 150°C
1
0.001
500
0.01
VDS, DRAIN TO SOURCE VOLTAGE (V)
1
0.1
10
tAV, TIME IN AVALANCHE (ms)
(Note: Refer to onsemi Applications Notes AN7514 and
AN7515)
Figure 5. Forward Bias Safe Operating Area
Figure 6. Unclamped Inductive Switching Capability
100
Pulse Duration = 250 ms
Duty Cycle = 0.5% Max
80
IS, REVERSE DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
100
VDD = 5 V
60
40
TJ = 175°C
20
TJ = 25°C
3
5
6
7
8
9
1
0.0
0.4
0.6
0.8
1.0
1.4
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 7. Transfer Characteristics
Figure 8. Forward Diode Characteristics
VGS
15 V Top
10 V
8V
7V
6V
5.5 V
5 V Bottom
60
40
20
0
0.2
VGS, GATE TO SOURCE VOLTAGE (V)
250 ms Pulse Width
TJ = 25°C
80
0
TJ = 25°C
0.1
10
TJ = 175°C
10
100
100
ID, DRAIN CURRENT (A)
4
ID, DRAIN CURRENT (A)
0
TJ = −55°C
VGS = 0 V
1
2
3
VGS
15 V Top
10 V
8V
7V
6V
5.5 V
5 V Bottom
80
60
40
20
0
5
4
250 ms Pulse Width
TJ = 175°C
0
1
2
3
4
VDS, DRAIN SOURCE VOLTAGE (V)
VDS, DRAIN SOURCE VOLTAGE (V)
Figure 9. Saturation Characteristics
Figure 10. Saturation Characteristics
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4
1.6
5
FDMS86381−F085
TYPICAL CHARACTERISTICS (Continued)
Pulse Duration = 250 ms
Duty Cycle = 0.5% Max
120
ID = 30 A
100
80
60
TJ = 175°C
40
20
0
TJ = 25°C
7
6
5
Pulse Duration = 250 ms
Duty Cycle = 0.5% Max
2.0
1.5
1.0
ID = 30 A
VGS = 10 V
0.5
−80
10
9
8
2.5
NORMALIZED DRAIN TO SOURCE
ON−RESISTANCE
RDS(on), DRAIN TO SOURCE
ON−RESISTANCE (mW)
140
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
NORMALIZED GATE THRESHOLD VOLTAGE
0.9
0.7
0.5
0
−40
40
80
120
160
1.00
0.95
0.90
−80
200
VGS, GATE TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
40
80
120
160
200
TJ, JUNCTION TEMPERATURE (°C)
1000
Ciss
Coss
10
Crss
1
0
−40
Figure 14. Normalized Drain to Source
Breakdown Voltage vs. Junction Temperature
10000
1
0.1
200
1.05
Figure 13. Normalized Gate Threshold Voltage
vs. Temperature
f = 1 MHz
VGS = 0 V
160
ID = 5 mA
TJ, JUNCTION TEMPERATURE (°C)
100
120
1.10
VGS = VDS
ID = 250 mA
0.3
−80
80
Figure 12. Normalized RDS(on) vs. Junction
Temperature
Figure 11. RDS(on) vs. Gate Voltage
1.1
40
TJ, JUNCTION TEMPERATURE (°C)
VGS, GATE TO SOURCE VOLTAGE (V)
1.3
0
−40
10
100
10
ID = 30 A
VDD = 40 V
8
VDD = 32 V
6
VDD = 48 V
4
2
0
0
3
6
9
12
Qg, GATE CHARGE (nC)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 16. Gate Charge vs. Gate to Source
Voltage
Figure 15. Capacitance vs. Drain to Source
Voltage
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5
15
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DFNW8 5.2x6.3, 1.27P
CASE 507AU
ISSUE A
DATE 03 DEC 2019
GENERIC
MARKING DIAGRAM*
AWLYWW
XXXXXX
XXXX
A
WL
Y
WW
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present. Some products
may not follow the Generic Marking.
DOCUMENT NUMBER:
DESCRIPTION:
98AON98867G
DFNW8 5.2x6.3, 1.27P
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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