FDN361AN

FDN361AN N-Channel, Logic Level, PowerTrenchΤΜ General Description Features This N-Channel Logic Level MOSFET is produced using Fairchild Semiconductor's PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance. • 1.8 A, 30 V. RDS(on) = 0.100 Ω @ VGS = 10 V RDS(on) = 0.150 Ω @ VGS = 4.5 V. • Low gate charge ( 2.1nC typical ). • Fast switching speed. • High performance trench technology for extremely low RDS(on). • High power version of industry standard SOT-23 package. Identical pin out to SOT-23 with 30% higher power handling capability. Applications • DC/DC converter • Load switch • Motor drives D D S TM SuperSOT -3 Absolute Maximum Ratings Symbol S G G o TA=25 C unless otherwise noted Parameter FDN361AN Units VDSS Drain-Source Voltage 30 V VGSS Gate-Source Voltage - Continuous V ID Drain Current (Note 1a) ±20 1.8 PD Power Dissipation for Single Operation (Note 1a) 0.5 (Note 1b) 0.46 - Continuous - Pulsed 8 Operating and Storage Junction Temperature Range TJ, Tstg A -55 to +150 W °C Thermal Characteristics RθJA RθJC Thermal Resistance, Junction-to-Ambient (Note 1a) 250 °C/W Thermal Resistance, Junction-to-Case (Note 1) 75 °C/W Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity 361 FDN361AN 7’’ 8mm 3000 units 1998 Fairchild Semiconductor Corporation FDN361AN, Rev. C FDN361AN April 1999 Symbol Parameter TA = 25°C unless otherwise noted Test Conditions Min Typ Max Units Off Characteristics VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25°C BVDSS Drain-Source Breakdown Voltage ∆BVDSS ∆TJ IDSS Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V IGSSF Gate-Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 µA nA IGSSR Gate-Body Leakage, Reverse VGS = -20 V, VDS = 0 V -100 nA On Characteristics 30 V mV/°C 24 1 (Note 2) VDS = VGS, ID = 250 µA ID = 250 µA, Referenced to 25°C VGS(th) Gate Threshold Voltage ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance ID(on) On-State Drain Current VGS = 10 V, VDS = 5 V gFS Forward Transconductance VDS = 10 V, ID = 1.8 A 1 1.8 3 VGS = 10 V, ID = 1.8 A VGS = 10 V, ID = 1.8 A, TJ = 125°C VGS = 4.5 V, ID = 1.4 A 0.072 0.107 0.105 V mV/°C -4.2 0.1 0.16 0.15 8 Ω A 5 S Dynamic Characteristics Ciss Input Capacitance 220 pF Coss Output Capacitance 50 pF Crss Reverse Transfer Capacitance 20 pF Switching Characteristics VDS = 15 V, VGS = 0 V, f = 1.0 MHz (Note 2) td(on) Turn-On Delay Time VDD = 15 V, ID = 1 A, 3 6 ns t Turn-On Rise Time VGS = 10 V, RGEN = 6.0 Ω 11 22 ns td(off) Turn-Off Delay Time 7 14 ns tf Turn-Off Fall Time 3 6 ns Qg Total Gate Charge VDS = 15 V, ID = 1.8 A, 2.1 4 Qgs Gate-Source Charge VGS = 5 V 0.8 nC Qgd Gate-Drain Charge 0.7 nC nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 0.42 A (Note 2) 0.75 0.42 A 1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθJA is determined by the user's board design. a) 250°C/W when mounted on a 0.02 in2 pad of 2 oz. Cu. b) 270°C/W when mounted on a mininum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0% FDN361AN, Rev. C FDN361AN DMOS Electrical Characteristics (continued) 2.5 VGS= 10 V 6 .0V 4.5V R DS(ON ) , NORMALIZED 4.0V 6 3.5V 4 3.0V 2 0 DRAIN-SOURCE O N-RESISTANCE I D , DRAIN -SOURCE C URRENT (A) 8 FDN361AN Typical Characteristics 2 VGS = 3. 5V 4. 0V 1.5 4. 5V 7. 0V 10V 1 0.5 0 0.5 1 1.5 2 2.5 0 3 2 4 Figure 1. On-Region Characteristics. 10 0.3 I D = 1.8 A R D S(O N) , O N-RES IS TANCE (OHM) RD S(ON) , NORMALIZED 8 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.6 DRAIN-SO URCE ON-RES ISTANCE 6 I D , DRAIN CURRENT (A) VDS , DRAIN -SOURCE VOLTAGE (V) V GS = 10 V 1.4 1.2 1 0.8 0.6 -50 I D = 0.9A 0.25 0.2 0.15 TA = 125°C 0.1 0 -25 0 25 50 75 100 125 150 TA = 25°C 0.05 2 4 6 8 10 V GS , GATE TO SOURCE VOLT AGE (V) TJ , JUNCTION TEMPERAT URE (°C) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 10 8 IS , REVERSE DRAIN CURRENT (A) TJ = -55°C VD S =5.0V I D, DRAIN CURRENT (A) 5. 0V 25°C 6 1 25°C 4 2 0 1 2 3 4 VGS , GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 5 VGS= 0V TJ = 1 25° C 1 25° C 0.1 -55° C 0.01 0.001 0.2 0.4 V SD 0.6 0.8 1 1.2 , BODY DIODE FO RWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDN361AN, Rev. C (continued) 10 500 VD S = 5 V I D = 1 .8 A 8 10 V CAPACIT ANCE (pF) VGS , G ATE-SOURCE VOLTAG E (V) FDN361AN Typical Characteristics 15 V 6 4 C i ss 200 100 2 Co ss 50 f = 1 MHz VGS = 0 V 20 0 0 1 2 3 10 0.1 4 0.2 Crss 0.5 1 2 5 Figure 7. Gate-Charge Characteristics. 30 Figure 8. Capacitance Characteristics. 30 50 10 IT IM 10 m s 100 ms 1s 10 s DC 1 0.3 VGS = 10V SINGLE PULSE RθJ A=270°C/W TA = 25°C 0.1 0.03 0.01 0.1 0.2 0.5 SINGLE PULSE RθJA =27 0° C/W TA = 25°C 40 1m s POWER (W) L N) S(O RD 3 30 20 10 1 2 5 10 20 30 0 0.0001 50 0. 001 0. 01 0.1 1 10 100 300 SI NGLE PULSE TI ME (SEC) VD S , DRAIN-SOURCE VOLTAG E (V) Figure 10. Single Pulse Maximum Power Dissipation. Figure 9. Maximum Safe Operating Area. TRANSIEN TTHE RMAL RESISTANC E 1 r(t), NO RMALIZE D EFFECTIV E I D , DRAIN CURRENT (A) 10 V D S, DRAIN TO SOURCE VO LTAGE (V) Q g , GATE CHARGE (nC) 0.5 D = 0.5 0.2 0.1 0.05 0.02 0.01 0.2 R θJ A (t) = r(t) * RθJ A RθJ A = 270 °C /W 0.1 00 .5 00 .2 00 .1 P(p k ) t1 Si n g l e P u l s e t2 0.005 TJ - T A =P * R J A (t) θ 0.002 D u t y C y c l e, D = t / t 2 0.001 0.0001 1 0.001 0.01 0.1 1 10 100 300 t1, TIM E (s ec ) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient themal response will change depending on the circuit board design. FDN361AN, Rev. C TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ISOPLANAR™ MICROWIRE™ POP™ PowerTrench  QFET™ QS™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 ACEx™ CoolFET™ CROSSVOLT™ E2CMOSTM FACT™ FACT Quiet Series™ FAST® FASTr™ GTO™ HiSeC™ SyncFET™ TinyLogic™ UHC™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. D