FDN86501LZ

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ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. FDN86501LZ N-Channel Shielded Gate PowerTrench® MOSFET 60 V, 2.6 A, 116 mΩ Features General Description This N-Channel MOSFET is produced using Fairchild Semiconductor’s advanced PowerTrench® process that incorporates Shielded Gate technology. This process has been optimized for rDS(on), switching performance and ruggedness. „ Shielded Gate MOSFET Technology „ Max rDS(on) = 116 mΩ at VGS = 10 V, ID = 2.6 A „ Max rDS(on) = 173 mΩ at VGS = 4.5 V, ID = 2.1 A „ High performance trench technology for extremely low rDS(on) „ High power and current handling capability in a widely used surface mount package Applications „ Fast switching speed „ Primary DC-DC Switch „ 100% UIL tested „ Load Switch „ RoHS Compliant MOSFET Maximum Ratings TA = 25 °C unless otherwise noted. Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage -Continuous ID -Pulsed Single Pulse Avalanche Energy EAS PD TJ, TSTG Ratings 60 Units V ±20 V (Note 1a) 2.6 (Note 4) 24 (Note 3) 6 Power Dissipation (Note 1a) 1.5 Power Dissipation (Note 1b) 0.6 Operating and Storage Junction Temperature Range -55 to +150 A mJ W °C Thermal Characteristics RθJC Thermal Resistance, Junction-to-Case RθJA Thermal Resistance, Junction-to-Ambient (Note 1) 75 (Note 1a) 80 °C/W Package Marking and Ordering Information Device Marking 8650 Device FDN86501LZ ©2015 Fairchild Semiconductor Corporation FDN86501LZ Rev.1.1 Package SSOT-3 1 Reel Size 7 ’’ Tape Width 8 mm Quantity 3000 units www.fairchildsemi.com FDN86501LZ N-Channel Shielded Gate PowerTrench® MOSFET October 2015 Symbol Parameter Test Conditions Min. Typ. Max. Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = 48 V, VGS = 0 V 1 μA IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±10 μA 2.4 V 60 V 68 mV/°C On Characteristics (Note 2) VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C rDS(on) Static Drain to Source On Resistance gFS Forward Transconductance 1.0 1.9 -5 mV/°C VGS = 10 V, ID = 2.6 A 89 116 VGS = 4.5 V, ID = 2.1 A 121 173 VGS = 10 V, ID = 2.6 A, TJ = 125 °C 152 198 VDS = 10 V, ID = 2.6 A 8 mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = 30 V, VGS = 0 V, f = 1 MHz 0.1 236 335 pF 77 110 pF 4.9 10 pF 0.8 2.0 Ω 4.4 10 ns 1.2 10 ns 9.6 20 ns Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time 1.2 10 ns Qg Total Gate Charge VGS = 0 V to 10 V 3.8 5.4 nC Qg Total Gate Charge 2.7 Gate to Source Gate Charge VGS = 0 V to 4.5 V VDD = 30 V, ID = 2.6 A 1.9 Qgs 0.7 nC Qgd Gate to Drain “Miller” Charge 0.6 nC VDD = 30 V, ID = 2.6 A, VGS = 10 V, RGEN = 6 Ω nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 2.6 A (Note 2) IF = 2.6 A, di/dt = 100 A/μs 0.9 1.3 V 31 50 ns 19 31 nC Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. b) 180 °C/W when mounted on a minimum pad. a) 80 °C/W when mounted on a 1 in2 pad of 2 oz copper 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. EAS of 6 mJ is based on starting TJ = 25 °C, L = 3 mH, IAS = 2 A, VDD = 60 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 9 A. 4. Pulsed Id please refer to Fig 11 SOA graph for more details. ©2015 Fairchild Semiconductor Corporation FDN86501LZ Rev.1.1 2 www.fairchildsemi.com FDN86501LZ N-Channel Shielded Gate PowerTrench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted. VGS = 10 V NORMALIZED DRAIN TO SOURCE ON-RESISTANCE ID, DRAIN CURRENT (A) 10 VGS = 5.5 V 8 VGS = 4.5 V 6 VGS = 3.5 V 4 2 0 VGS = 3 V 0 1 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 2 3 4 5 5 VGS = 3 V 4 VGS = 3.5 V 3 2 VGS = 4.5 V 1 0 0 2 VDS, DRAIN TO SOURCE VOLTAGE (V) SOURCE ON-RESISTANCE (mΩ) rDS(on), DRAIN TO NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 1.4 1.2 1.0 300 TJ = 125 oC 200 0.6 -75 -50 0 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) IS, REVERSE DRAIN CURRENT (A) VDS = 5 V 6 TJ = 150 TJ = 25 oC 2 TJ = -55 2 3 oC 4 2 3 4 5 6 7 8 9 20 10 VGS = 0 V 1 TJ = 150 oC 0.1 TJ = 25 oC 0.01 TJ = -55 oC 0.001 0.0 5 0.2 0.4 0.6 0.8 1.0 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs. Source Current ©2015 Fairchild Semiconductor Corporation FDN86501LZ Rev.1.1 10 Figure 4. On-Resistance vs. Gate to Source Voltage PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX oC TJ = 25 oC VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On Resistance vs. Junction Temperature ID, DRAIN CURRENT (A) ID = 2.6 A 100 0.8 1 10 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 400 1.6 0 8 500 ID = 2.6 A VGS = 10 V 1.8 4 6 Figure 2. Normalized On-Resistance vs. Drain Current and Gate Voltage 2.0 8 4 ID, DRAIN CURRENT (A) Figure 1. On Region Characteristics 10 VGS = 5.5 V VGS = 10 V PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 3 1.2 www.fairchildsemi.com FDN86501LZ N-Channel Shielded Gate PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted. 1000 ID = 2.6 A Ciss VDD = 20 V 8 CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 VDD = 30 V 6 VDD = 40 V 4 100 Coss 10 Crss 2 0 f = 1 MHz VGS = 0 V 0 1 2 3 1 0.1 4 1 Figure 7. Gate Charge Characteristics -1 Ig, GATE LEAKAGE CURRENT (A) IAS, AVALANCHE CURRENT (A) 10 10 TJ = 25 oC TJ = 100 oC TJ = 125 oC VDS = 0 V -2 10 -3 10 -4 10 TJ = 125 oC -5 10 -6 10 TJ = 25 oC -7 10 -8 10 -9 1 0.001 0.01 0.1 1 10 10 0 6 tAV, TIME IN AVALANCHE (ms) 24 30 36 P(PK), PEAK TRANSIENT POWER (W) 1000 10 ID, DRAIN CURRENT (A) 18 Figure 10. Gate Leakage Current vs. Gate to Source Voltage 50 10 μs 100 μs 1 0.001 0.1 12 VGS, GATE TO SOURCE VOLTAGE (V) Figure 9. Unclamped Inductive Switching Capability 0.01 60 Figure 8. Capacitance vs. Drain to Source Voltage 20 0.1 10 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) 1 ms 10 ms 100 ms 1s 10 s DC THIS AREA IS LIMITED BY rDS(on) SINGLE PULSE TJ = MAX RATED RθJA = 180 oC/W TA = 25 oC CURVE BENT TO MEASURED DATA 1 10 100 300 TA = 25 oC 100 10 1 0.1 -5 10 -4 10 -3 10 -2 10 -1 10 1 100 1000 10 t, PULSE WIDTH (sec) VDS, DRAIN to SOURCE VOLTAGE (V) Figure 11. Forward Bias Safe Operating Area ©2015 Fairchild Semiconductor Corporation FDN86501LZ Rev.1.1 SINGLE PULSE RθJA = 180 oC/W Figure 12. Single Pulse Maximum Power Dissipation 4 www.fairchildsemi.com FDN86501LZ N-Channel Shielded Gate PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 2 1 0.1 0.01 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 0.001 0.0001 -5 10 NOTES: SINGLE PULSE -4 10 ZθJA(t) = r(t) x RθJA RθJA = 180 oC/W Peak TJ = PDM x ZθJA(t) + TA Duty Cycle, D = t1 / t2 -3 10 -2 -1 10 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 13. Junction-to-Ambient Transient Thermal Response Curve ©2015 Fairchild Semiconductor Corporation FDN86501LZ Rev.1.1 5 www.fairchildsemi.com FDN86501LZ N-Channel Shielded Gate PowerTrench® MOSFET Typical Characteristics TJ = 25 °C unless otherwise noted. 2.92±0.12 0.95 A 3 1.40 B 1.40±0.12 1 2.20 2 0.508 0.382 (0.29) 0.10 0.95 M 1.00 A B 1.90 1.90 LAND PATTERN RECOMMENDATION SEE DETAIL A 1.12 MAX 0.10 0.00 (0.94) 0.10 C M C 2.51±0.20 GAGE PLANE NOTES: UNLESS OTHERWISE SPECIFIED 0.178 0.102 0.20 0.43 0.33 (0.56) SCALE: 50:1 SEATING PLANE A) NO JEDEC REFERENCE AS OF AUGUST 2003 B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH AND TIE BAR EXTRUSIONS. D) DIMENSIONING AND TOLERANCING PER ASME Y14.5M - 2009. E) DRAWING FILE NAME: MKT-MA03BREV3 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 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