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MOSFET - Dual N‐Channel,
Asymmetric,
POWERTRENCH Power
Clip 30 V
FDPC5030SG
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General Description
This device includes two specialized N-Channel MOSFETs in
a dual package. The switch node has been internally connected to
enable easy placement and routing of synchronous buck converters.
The control MOSFET (Q1) and synchronous SyncFETt (Q2) have
been designed to provide optimal power efficiency.
ELECTRICAL CONNECTION
Features
Q1: N-Channel
• Max RDS(on) = 5.0 mW at VGS = 10 V, ID = 17 A
• Max RDS(on) = 6.5 mW at VGS = 4.5 V, ID = 14 A
N-Channel MOSFET
Q2: N-Channel
PIN1
• Max RDS(on) = 2.4 mW at VGS = 10 V, ID = 25 A
• Max RDS(on) = 3.0 mW at VGS = 4.5 V, ID = 22 A
• Low Inductance Packaging Shortens Rise/Fall Times, Resulting in
•
Bottom View
Power Clip 56
(PQFN8 5x6)
CASE 483AR
PIN ASSIGNMENT
Applications
• Computing
• Communications
• General Purpose Point of Load
HSG
*
GR
V+
V+
Table 1. PIN DESCRIPTION
Pin
Top View
GND(LSS)
PAD9
•
Lower Switching Losses.
MOSFET Integration Enables Optimum Layout for Lower Circuit
Inductance and Reduced Switch Node Ringing.
RoHS Compliant
LSG
SW
SW
SW
*PAD10 V+(HSD)
Name
Description
1
HSG
High Side Gate
2
GR
Gate Return
3, 4, 10
V+(HSD)
High Side Drain
5, 6, 7
SW
Switching Node, Low Side Drain
8
LSG
Low Side Gate
9
GND (LSS)
Low Side Source
MARKING DIAGRAM
$Y&Z&3&K
FDPC
5030SG
$Y
&Z
&3
&K
FDPC5030SG
= ON Semiconductor Logo
= Assembly Plant Code
= Numeric Date Code
= Lot Code
= Specific Device Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
© Semiconductor Components Industries, LLC, 2016
May, 2021 − Rev. 6
1
Publication Order Number:
FDPC5030SG/D
FDPC5030SG
MOSFET MAXIMUM RATINGS (TA = 25°C, Unless otherwise specified)
Symbol
Q1
Q2
Unit
Drain to Source Voltage
Parameter
30
30
V
Bvdsst (Transient) < 100 ns
36
36
V
+/−20
+/−12
V
Drain Current
− Continuous (TC = 25°C) (Note 5)
56
84
− Continuous (TC = 100°C) (Note 5)
35
53
17 (Note 1a)
25 (Note 1b)
− Pulsed (TA = 25°C) (Note 4)
227
503
EAS
Single Pulsed Avalanche Energy (Note 3)
54
96
PD
Power Dissipation for Single Operation
(TC = 25°C)
(TA = 25°C)
(TA = 25°C)
23
2.1 (Note 1a)
1.0 (Note 1c)
25
2.3 (Note 1b)
1.1 (Note 1d)
VDS
Bvdsst
VGS
Gate to Source Voltage
ID
− Continuous (TA = 25°C)
TJ, TSTG
Operating and Storage Junction Temperature Range
A
mJ
W
−55 to +150
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Symbol
Parameter
Q1
Q2
Unit
5.6
4.9
_C/W
RqJC
Thermal Resistance, Junction to Case
RqJA
Thermal Resistance, Junction to Ambient
60 (Note 1a)
55 (Note 1b)
_C/W
RqJA
Thermal Resistance, Junction to Ambient
130 (Note 1c)
120 (Note 1d)
_C/W
PACKAGE MARKING AND ORDERING INFORMATION
Device
Top Marking
Package
Reel Size
Tape Width
Quantity
FDPC5030SG
FDPC5030SG
Power Clip 56
13″
12 mm
3,000 Units
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max
Unit
OFF CHARACTERISTICS
Drain to Source Breakdown Voltage
ID = 250 mA, VGS = 0 V
ID = 1 mA, VGS = 0 V
Q1
Q2
30
30
−
−
−
−
V
DBVDSS/DTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 mA, referenced to 25_C
ID = 10 mA, referenced to 25_C
Q1
Q2
−
−
15
16
−
−
mV/_C
IDSS
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
VDS = 24 V, VGS = 0 V
Q1
Q2
−
−
−
−
1
500
mA
IGSS
Gate to Source Leakage Current,
Forward
VGS = ±20 V, VDS= 0 V
VGS = ±12 V, VDS= 0 V
Q1
Q2
−
−
−
−
±100
±100
nA
nA
BVDSS
ON CHARACTERISTICS
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 mA
VGS = VDS, ID = 1 mA
Q1
Q2
1.0
1.0
1.7
1.6
3.0
3.0
V
DVGS(th)/DTJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 1 mA, referenced to 25_C
ID = 10 mA, referenced to 25_C
Q1
Q2
−
−
−5
−3
−
−
mV/_C
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2
FDPC5030SG
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max
Unit
VGS = 10 V, ID = 17 A
VGS = 4.5 V, ID = 14 A
VGS = 10 V, ID = 17 A, TJ =125_C
Q1
−
−
−
4.1
5.4
5.7
5.0
6.5
7.0
mW
VGS = 10 V, ID = 25 A
VGS = 4.5 V, ID = 22 A
VGS = 10 V, ID = 25 A,TJ =125_C
Q2
−
−
−
1.9
2.4
2.7
2.4
3.0
3.4
VDS = 5 V, ID = 17 A
VDS = 5 V, ID = 25 A
Q1
Q2
−
−
93
139
−
−
S
Q1:
VDS = 15 V, VGS = 0 V,
f = 1 MHZ
Q2:
VDS = 15 V, VGS = 0 V,
f = 1 MHZ
Q1
Q2
−
−
1224
2730
1715
3825
pF
Q1
Q2
−
−
397
801
560
1125
pF
Q1
Q2
−
−
42
72
60
100
pF
Q1
Q2
0.1
0.1
0.5
1.1
1.5
2.2
W
Q1
Q2
−
−
8
10
16
19
ns
Q1
Q2
−
−
2
4
10
10
ns
Q1
Q2
−
−
18
30
33
48
ns
Q1
Q2
−
−
2
3
10
10
ns
ON CHARACTERISTICS
RDS(on)
gFS
Drain to Source On Resistance
Forward Transconductance
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
SWITCHING CHARACTERISTICS
td(on)
tr
td(off)
tf
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Q1:
VDD = 15 V, ID = 17 A,
RGEN = 6 W
Q2:
VDD = 15 V, ID = 25 A,
RGEN = 6 W
Fall Time
Qg
Total Gate Charge
VGS = 0 V to 10 V
Q1: VDD = 15 V, ID = 17 A
Q2: VDD = 15 V, ID = 25 A
Q1
Q2
−
−
17
39
24
55
nC
Qg
Total Gate Charge
VGS = 0 V to 4.5 V
Q1: VDD = 15 V, ID = 17 A
Q2: VDD = 15 V, ID = 25 A
Q1
Q2
−
−
8
18
11
26
nC
Qgs
Gate to Source Gate Charge
Q1: VDD = 15 V, ID = 17 A
Q2: VDD = 15 V, ID = 25 A
Q1
Q2
−
−
3.1
6.1
−
−
nC
Qgd
Gate to Drain “Miller” Charge
Q1: VDD = 15 V, ID = 17 A
Q2: VDD = 15 V, ID = 25 A
Q1
Q2
−
−
2.0
4.3
−
−
nC
Source to Drain Diode Forward
Voltage
VGS = 0 V, IS = 17 A (Note 2)
VGS = 0 V, IS = 25 A (Note 2)
Q1
Q2
−
0.8
0.8
1.2
1.2
V
trr
Reverse Recovery Time
Q1
Q2
−
23
27
37
44
ns
Qrr
Reverse Recovery Charge
Q1
IF = 17 A, di/dt = 100 A/ms
Q2
IF = 25 A, di/dt = 230 A/ms
Q1
Q2
−
8
31
16
50
nC
SOURCE-DRAIN DIODE CHARACTERISTICS
VSD
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
NOTES:
1. RqJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 × 1.5 in. board of FR−4 material. RqCA is determined
by the user’s board design.
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3
FDPC5030SG
a) 60°C/W when mounted on
a 1 in2 pad of 2 oz copper.
b) 55°C/W when mounted on
a 1 in2 pad of 2 oz copper.
SS
SF
DS
DF
G
SS
SF
DS
DF
G
c) 130°C/W when mounted on
a minimum pad of 2 oz copper.
d) 120°C/W when mounted on
a minimum pad of 2 oz copper.
SS
SF
DS
DF
G
SS
SF
DS
DF
G
2. Pulse Test: Pulse Width < 300 ms, Duty cycle < 2.0%.
3. Q1: EAS of 54 mJ is based on starting TJ = 25_C; L = 3 mH, IAS = 6 A, VDD = 30 V. VGS = 10 V, 100% tested at L = 0.1 mH, IAS = 20 A.
Q2: EAS of 96 mJ is based on starting TJ = 25_C; L = 3 mH, IAS = 8 A, VDD = 30 V. VGS = 10 V, 100% tested at L = 0.1 mH, IAS = 27 A.
4. Pulsed Id refer to Figure NO TAG and Figure NO TAG SOA graphs for more details.
5. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal &
electro-mechanical application board design.
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4
FDPC5030SG
TYPICAL CHARACTERISTICS (Q1 N-Channel)
60
VGS = 10 V
VGS = 4.5 V
VGS = 6 V
ID, DRAIN CURRENT (A)
NORMALIZED
DRAIN TO SOURCE ON−RESISTANCE
(TJ = 25°C unless otherwise noted)
VGS = 3.5 V
45
30
VGS = 3 V
15
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
0
0.0
0.2
0.4
0.6
0.8
1.0
6.0
4.5
3.0
VGS = 3.5 V
VGS = 4.5 V
1.5
VGS = 6 V
0.0
0
15
VDS, DRAIN TO SOURCE VOLTAGE (V)
rDS(on), DRAIN TO
1.3
1.2
1.1
1.0
0.9
60
PULSE DURATION = 80ms
DUTY CYCLE = 0.5% MAX
30
ID = 17 A
20
10
0
0.8
−75 −50 −25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATUREo(C)
TJ = 125 oC
TJ = 25 oC
2
3
4
5
6
7
8
9
10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance vs. Junction
Temperature
Figure 4. Normalized On Resistance vs. Gate to
Source Voltage
60
60
45
IS, REVERSE DRAIN CURRENT (A)
PULSE DURATION = 80ms
DUTY CYCLE = 0.5% MAX
ID, DRAIN CURRENT (A)
45
40
ID = 17 A
VGS = 10 V
1.4
VDS = 5 V
30
TJ = 150
oC
TJ = 25 oC
15
TJ =
0
30
Figure 2. Normalized On−Resistance vs. Drain
Current and Gate Voltage
SOURCE ON−RESISTANCE (mW)
NORMALIZED
DRAIN TO SOURCE ON−RESISTANCE
1.6
VGS = 10 V
ID, DRAIN CURRENT (A)
Figure 1. On Region Characteristics
1.5
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
VGS = 3 V
0
1
2
3
−55oC
4
VGS = 0 V
10
1
0.1
TJ = 25 oC
TJ = −55oC
0.01
0.001
0.0
5
TJ = 150 oC
VGS, GATE TO SOURCE VOLTAGE (V)
0.2
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
Figure 6. Source to Drain Diode Forward Voltage
vs. Source Current
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5
FDPC5030SG
TYPICAL CHARACTERISTICS (Q1 N-Channel)
(TJ = 25°C unless otherwise noted)
3000
ID = 17 A
Ciss
1000
8
VDD = 10 V
CAPACITANCE (pF)
VGS, GATE TO SOURCE VOLTAGE (V)
10
6
VDD = 15 V
VDD = 20 V
4
2
0
0
4
8
12
16
100
10
0.1
20
Crss
f = 1 MHz
VGS = 0 V
1
Figure 7. Gate Charge Characteristics
30
Figure 8. Capacitance vs. Drain to Source Voltage
60
ID, DRAIN CURRENT (A)
30
10
TJ = 25 oC
TJ = 125 oC
45
VGS = 10 V
30
VGS = 4.5 V
15
o
RqJC = 5.6 C/W
1
0.001
0.01
0.1
1
10
0
100
25
50
150
5000
P(PK), PEAK TRANSIENT POWER (W)
100
THIS AREA IS
LIMITED BY rDS(on)
100 m s
SINGLE PULSE
TJ = MAX RATED
RqJC = 5.6 oC/W
CURVE BENT TO
MEASURED DATA
TC = 25 oC
1
10
SINGLE PULSE
RqJC = 5.6 oC/W
1000
10 m s
0.1
0.1
125
Figure 10. Maximum Continuous Drain Current vs.
Case Temperature
500
1
100
TC, CASE TEMPERATURE (C)
Figure 9. Unclamped Inductive Switching
Capability
10
75
o
tAV, TIME IN AVALANCHE (ms)
ID, DRAIN CURRENT (A)
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
IAS, AVALANCHE CURRENT (A)
Coss
1 ms
10 ms
DC
TC = 25 oC
100
80
10
−5
10
−4
10
−3
10
−2
10
−1
10
t, PULSE WIDTH (sec)
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Forward Bias Safe Operating Area
Figure 12. Single Pulse Maximum Power
Dissipation
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6
1
FDPC5030SG
TYPICAL CHARACTERISTICS (Q1 N-Channel)
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
(TJ = 25°C unless otherwise noted)
2
1
0.1
0.01
0.001
−5
10
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
SINGLE PULSE
NOTES:
ZqJC(t) = r(t) x RqJC
RqJC = 5.6 oC/W
Peak T J = PDM x ZqJC(t) + TC
Duty Cycle, D = t1 / t2
−4
10
−3
−2
10
10
t, RECTANGULAR PULSE DURATION (sec)
Figure 13. Junction−to−Case Transient Thermal Response Curve
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7
−1
10
1
FDPC5030SG
TYPICAL CHARACTERISTICS (Q2 N-Channel)
(TJ = 25°C unless otherwise noted)
VGS = 10 V
90
VGS = 4.5 V
VGS = 3.5 V
60
VGS = 3 V
30
0
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
VGS = 2.5 V
0
1
2
10
NORMALIZED
DRAIN TO SOURCE ON−RESISTANCE
ID, DRAIN CURRENT (A)
120
PULSE DURATION = 80 ms
DUTY CYCLE = 0.5% MAX
8
VGS = 2.5 V
6
VGS = 3 V
4
VGS = 3.5 V
2
0
3
0
24
VDS, DRAIN TO SOURCE VOLTAGE (V)
96
120
Figure 15. Normalized on−Resistance vs. Drain
Current and Gate Voltage
ID = 25 A
VGS = 10 V
rDS(on), DRAIN TO
1.4
1.2
1.0
0.8
SOURCE ON−RESISTANCE (mW)
NORMALIZED
DRAIN TO SOURCE ON−RESISTANCE
72
20
1.6
IS, REVERSE DRAIN CURRENT (A)
PULSE DURATION = 80ms
DUTY CYCLE = 0.5% MAX
VDS = 5 V
80
TJ = 125 oC
60
TJ = 25 oC
40
TJ = −55oC
1.0
1.5
2.0
2.5
3.0
ID = 25 A
10
TJ = 125 oC
5
TJ = 25 oC
2
3
4
5
6
7
8
9
10
Figure 17. On−Resistance vs. Gate to Source
Voltage
120
20
15
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 16. Normalized On−Resistance vs. Junction
Temperature
100
PULSE DURATION = 80ms
DUTY CYCLE = 0.5% MAX
0
0.6
−75 −50 −25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATUREo(C)
ID, DRAIN CURRENT (A)
48
ID, DRAIN CURRENT (A)
Figure 14. On−Region Characteristics
0
VGS = 10 V
VGS = 4.5 V
200
100
10
TJ = 125 oC
1
TJ = 25 oC
0.1
TJ = −55oC
0.01
0.001
0.0
3.5
VGS = 0 V
VGS, GATE TO SOURCE VOLTAGE (V)
0.2
0.4
0.6
0.8
1.0
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 18. Transfer Characteristics
Figure 19. Source to Drain Diode Forward Voltage
vs. Source Current
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FDPC5030SG
TYPICAL CHARACTERISTICS (Q2 N-Channel)
(TJ = 25°C unless otherwise noted)
10000
ID = 25 A
8
VDD = 15 V
VDD = 10 V
6
CAPACITANCE (pF)
VGS, GATE TO SOURCE VOLTAGE (V)
10
VDD = 20 V
4
2
0
0
10
20
30
40
Ciss
1000
Coss
100
f = 1 MHz
VGS = 0 V
10
0.1
50
Figure 20. Gate Charge Characteristics
10
30
Figure 21. Capacitance vs. Drain to Source
Voltage
100
TJ
ID, DRAIN CURRENT (A)
100
IAS, AVALANCHE CURRENT (A)
1
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
= 25 oC
10
TJ = 100 oC
TJ = 125 oC
80
VGS = 10 V
60
VGS = 4.5 V
40
20
o
RqJC = 4.9 C/W
1
0.001
0.01
0.1
1
10
0
100
25
50
75
100
125
150
o
tAV, TIME IN AVALANCHE (ms)
TC, CASE TEMPERATURE (C)
Figure 22. Unclamped Inductive Switching
Capability
Figure 23. Maximum Continuous Drain Current
vs. Case Temperature
10000
100
10
1
10 m s
100 m s
SINGLE PULSE
TJ = MAX RATED
1 ms
10 ms
CURVE BENT TO
MEASURED DATA
TC = 25 oC
0.1
1
10
SINGLE PULSE
RqJC = 4.9 oC/W
TC = 25 oC
1000
THIS AREA IS
LIMITED BY r DS(on)
RqJC = 4.9 oC/W
0.1
P(PK), PEAK TRANSIENT POWER (W)
1000
ID, DRAIN CURRENT (A)
Crss
DC
100
100
10
−5
10
−4
10
−3
10
−2
10
−1
10
VDS, DRAIN to SOURCE VOLTAGE (V)
t, PULSE WIDTH (sec)
Figure 24. Forward Bias Safe Operating Area
Figure 25. Single Pulse Maximum Power
Dissipation
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1
FDPC5030SG
TYPICAL CHARACTERISTICS (Q2 N-Channel)
r(t), NORMALIZED EFFECTIVE TRANSIENT
THERMAL RESISTANCE
(TJ = 25°C unless otherwise noted)
2
1
0.1
DUTY CYCLE−DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
t2
NOTES:
0.01
0.001
−5
10
ZqJC(t) = r(t) x RqJC
RqJC = 4.9 oC/W
Peak TJ = PDM x ZqJC(t) + TC
Duty Cycle, D = t1 / t2
SINGLE PULSE
−4
10
−3
−2
10
10
−1
10
t, RECTANGULAR PULSE DURATION (sec)
Figure 26. Junction−to−Case Transient Thermal Response Curve
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1
FDPC5030SG
TYPICAL CHARACTERISTICS (continued)
SyncFET Schottky Body Diode Characteristics
ON’s SyncFET process embeds a Schottky diode in
parallel with PowerTrench MOSFET. This diode exhibits
similar characteristics to a discrete external Schottky diode
in parallel with a MOSFET. Figure 27 shows the reverse
recovery characteristic of the FDPC5030SG.
Schottky barrier diodes exhibit significant leakage at high
temperature and high reverse voltage. This will increase the
power in the device.
30
IDSS, REVERSE LEAKAGE CURRENT (A)
−2
25
CURRENT (A)
20
di/dt = 230 A/ms
15
10
5
0
−5
0
100
200
300
400
500
10
TJ = 125 oC
−3
10
TJ = 100 oC
−4
10
−5
10
TJ = 25 oC
−6
10
TIME (ns)
0
5
10
15
20
25
30
VDS, REVERSE VOLTAGE (V)
Figure 27. FDPC5030SG SyncFET Body Diode
Reverse Recovery Characteristics
Figure 28. SyncFET Body Diode Reverse
Leakage vs. Drain−Source Voltage
POWERTRENCH is a registered trademark and SyncFET is a trademark of Semiconductor Components Industries, LLC (SCILLC) or its
subsidiaries in the United States and/or other countries.
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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PQFN8 5x6, 1.27P
CASE 483AR
ISSUE A
DOCUMENT NUMBER:
DESCRIPTION:
98AON13666G
PQFN8 5x6, 1.27P
DATE 21 MAY 2021
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Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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