FDPC8014S

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The switch node has been internally connected to „ Max rDS(on) = 4.7 mΩ at VGS = 4.5 V, ID = 18 A enable easy placement and routing of synchronous buck Q2: N-Channel SyncFETTM (Q2) have been designed to provide optimal power converters. The control MOSFET (Q1) and synchronous „ Max rDS(on) = 1.2 mΩ at VGS = 10 V, ID = 41 A efficiency. „ Max rDS(on) = 1.4 mΩ at VGS = 4.5 V, ID = 37 A Applications „ Low inductance packaging shortens rise/fall times, resulting in lower switching losses „ Computing „ Communications „ MOSFET integration enables optimum layout for lower circuit inductance and reduced switch node ringing „ General Purpose Point of Load „ RoHS Compliant PAD10 V+(HSD) PIN1 PIN1 HSG SW GR PAD9 GND(LSS) V+ V+ Top LSG LSG HSG GR SW SW SW V+ SW SW V+ SW Bottom Power Clip 5X6 Pin Name Description 1 HSG High Side Gate 3,4,10 Pin V+(HSD) Name High Side Drain Description Pin 2 GR Gate Return 5,6,7 SW Switching Node, Low Side Drain 9 8 Name LSG Description Low Side Gate GND(LSS) Low Side Source MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDS Drain to Source Voltage Parameter VGS Gate to Source Voltage Drain Current ID PD TJ, TSTG Q2 25 Units V V ±12 ±12 -Continuous TC = 25 °C 60 110 -Continuous TA = 25 °C 20Note1a 41Note1b 75 160 -Pulsed EAS Q1 25Note5 TA = 25 °C (Note 4) Single Pulse Avalanche Energy (Note 3) 73 253 Power Dissipation for Single Operation TC = 25 °C 21 42 Power Dissipation for Single Operation TA = 25 °C 2.1Note1a 2.3 Note1b Operating and Storage Junction Temperature Range -55 to +150 A mJ W °C Thermal Characteristics RθJC Thermal Resistance, Junction to Case 6.0 3.0 RθJA Thermal Resistance, Junction to Ambient 60Note1a 55Note1b RθJA Thermal Resistance, Junction to Ambient 130Note1c 120Note1d ©2013 Fairchild Semiconductor Corporation FDPC8014S Rev.C7 1 °C/W www.fairchildsemi.com FDPC8014S PowerTrench® Power Clip April 2014 Device Marking 05OD/16OD Device FDPC8014S Package Power Clip 56 Reel Size 13 ” Tape Width 12 mm Quantity 3000 units Electrical Characteristics TJ = 25 °C unless otherwise noted Symbol Parameter Test Conditions Type Min 25 25 Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ID = 1 mA, VGS = 0 V Q1 Q2 ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C ID = 10 mA, referenced to 25 °C Q1 Q2 IDSS Zero Gate Voltage Drain Current VDS = 20 V, VGS = 0 V VDS = 20 V, VGS = 0 V Q1 Q2 1 500 μA μA IGSS Gate to Source Leakage Current, Forward VGS = 12 V/-8 V, VDS= 0 V VGS = 12 V/-8 V, VDS= 0 V Q1 Q2 ±100 ±100 nA nA 2.5 2.5 V V 24 24 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA VGS = VDS, ID = 1 mA Q1 Q2 ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C ID = 10 mA, referenced to 25 °C Q1 Q2 -4 -3 VGS = 10V, ID = 20 A VGS = 4.5 V, ID = 18 A VGS = 10 V, ID = 20 A,TJ =125 °C Q1 2.8 3.4 3.9 3.8 4.7 5.3 VGS = 10V, ID = 41 A VGS = 4.5 V, ID = 37 A VGS = 10 V, ID = 41 A ,TJ =125 °C Q2 0.9 1.0 1.1 1.2 1.4 1.5 VDS = 5 V, ID = 20 A VDS = 5 V, ID = 41 A Q1 Q2 182 315 Q1 Q2 1695 6580 2375 9870 pF Q1 Q2 495 1720 710 2580 pF Q1 Q2 54 204 100 370 pF 0.4 0.4 1.2 1.2 Ω rDS(on) gFS Drain to Source On Resistance Forward Transconductance 0.8 1.1 1.3 1.4 mV/°C mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance Q1: VDS = 13 V, VGS = 0 V, f = 1 MHZ Q2: VDS = 13 V, VGS = 0 V, f = 1 MHZ Q1 Q2 0.1 0.1 Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg Total Gate Charge Qg Total Gate Charge Qgs Gate to Source Gate Charge Qgd Gate to Drain “Miller” Charge ©2013 Fairchild Semiconductor Corporation FDPC8014S Rev.C7 Q1: VDD = 13 V, ID = 20 A, RGEN = 6 Ω Q2: VDD = 13 V, ID = 41 A, RGEN = 6 Ω VGS = 0 V to 10 V Q1 V = 13 V, ID VGS = 0 V to 4.5 V DD = 20 A Q2 VDD = 13 V, ID = 41 A 2 Q1 Q2 8 16 16 28 ns Q1 Q2 2 6 10 11 ns Q1 Q2 24 47 38 75 ns Q1 Q2 2 4 10 10 ns Q1 Q2 25 93 35 130 nC Q1 Q2 11 43 16 60 nC Q1 Q2 3.4 13 nC Q1 Q2 2.2 8.5 nC www.fairchildsemi.com FDPC8014S PowerTrench® Power Clip Package Marking and Ordering Information Symbol Parameter Test Conditions Type Min Typ Max Units Q1 Q2 0.8 0.8 1.2 1.2 V Q1 Q2 60 110 A Q1 Q2 75 160 A Q1 Q2 25 36 40 58 ns Q1 Q2 10 47 20 75 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage IS Diode continuous forward current VGS = 0 V, IS = 20 A VGS = 0 V, IS = 41 A (Note 2) (Note 2) TC = 25 °C IS,Pulse Diode pulse current trr Reverse Recovery Time Qrr Reverse Recovery Charge Q1 IF = 20 A, di/dt = 100 A/μs Q2 IF = 41 A, di/dt = 300 A/μs Notes: 1.RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. b. 55 °C/W when mounted on a 1 in2 pad of 2 oz copper a. 60 °C/W when mounted on a 1 in2 pad of 2 oz copper SS SF DS DF G SS SF DS DF G d. 120 °C/W when mounted on a minimum pad of 2 oz copper c. 130 °C/W when mounted on a minimum pad of 2 oz copper SS SF DS DF G SS SF DS DF G 2 Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. 3. Q1 :EAS of 73 mJ is based on starting TJ = 25 oC; N-ch: L = 3 mH, IAS = 7 A, VDD = 30 V, VGS = 10 V. 100% test at L= 0.1 mH, IAS = 24 A. Q2: EAS of 253 mJ is based on starting TJ = 25 oC; N-ch: L = 3 mH, IAS = 13 A, VDD = 25 V, VGS = 10 V. 100% test at L= 0.1 mH, IAS = 43 A. 4. Pulsed Id limited by junction temperature,td