FDPF2D3N10C

DATA SHEET www.onsemi.com MOSFET – N-Channel, Shielded Gate POWERTRENCH) VDS rDS(ON) MAX ID MAX 100 V 2.3 mW @ 10 V 222 A* *Drain current limited by maximum junction temperature. Package limitation current is 120 A. 100 V, 222 A, 2.3 mW FDP2D3N10C, FDPF2D3N10C TO−220 CASE 221A General Description This N−Channel MV MOSFET is produced using onsemi’s advanced POWERTRENCH process that incorporates Shielded Gate technology. This process has been optimized to minimize on−state resistance and yet maintain superior switching performance with best in class soft body diode. TO−220 Fullpack, 3−Lead / TO−220F−3SG CASE 221AT Features • • • • Max rDS(on) = 2.3 mW at VGS = 10 V, ID = 100 A Extremely Low Reverse Recovery Charge, Qrr 100% UIL Tested RoHS Compliant MARKING DIAGRAM Applications • Synchronous Rectification for ATX / Server / Telecom PSU • Motor Drives and Uninterruptible Power Supplies • Micro Solar Inverter $Y&Z&3&K XXX 2D3N10C $Y XXX2D3N10C &Z &3 &K = onsemi Logo = Device Code (XXX = FDP, FDPF) = Assembly Plant Code = 3−Digit Date Code Format = 2−Digits Lot Run Traceability Code ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2017 November, 2021 − Rev. 2 1 Publication Order Number: FDP2D3N10C/D FDP2D3N10C, FDPF2D3N10C MOSFET MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Parameter Symbol FDP2D3N10C FDPF2D3N10C Unit VDS Drain to Source Voltage 100 100 V VGS Gate to Source Voltage ±20 ±20 V − Continuous, TC = 25°C (Note 3) 222* 222* A − Continuous, TC = 100°C (Note 3) 157* 157* − Pulsed (Note 1) 888 ID Drain Current EAS Single Pulsed Avalanche Energy (Note 2) PD Power Dissipation TJ, TSTG 888 1176 TC = 25°C 214 45 TA = 25°C 2.4 2.4 Operating and Storage Junction Temperature Range A mJ −55 to +175 W °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. *Drain current limited by maximum junction temperature. Package limitation current is 120 A. 1. Pulsed Id please refer to Figure 11 and Figure 12 “Forward Bias Safe Operating Area” for more details. 2. EAS of 1176 mJ is based on starting TJ = 25°C, L = 3 mH, IAS = 28 A, VDD = 90 V, VGS = 10 V. 100% test at L = 0.1 mH, IAS = 89 A. 3. Computed continuous current limited to Max Junction Temperature only, actual continuous current will be limited by thermal & electro−mechanical application board design. THERMAL CHARACTERISTICS Symbol Parameter FDP2D3N10C FDPF2D3N10C Unit °C/W RqJC Thermal Resistance, Junction to Case, Max. 0.7 3.3 RqJA Thermal Resistance, Junction to Ambient, Max. 62.5 62.5 PACKAGE MARKING AND ORDERING INFORMATION Device Marking Device Package Shipping FDP2D3N10C FDP2D3N10C TO−220 50 units / Tube FDPF2D3N10C FDPF2D3N10C TO−220F 50 units / Tube www.onsemi.com 2 FDP2D3N10C, FDPF2D3N10C ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Parameter Test Conditions Min Typ Max Unit 100 − − V OFF CHARACTERISTICS BVDSS Drain to Source Breakdown Voltage ID = 250 mA, VGS = 0 V DBV DSS Breakdown Voltage Temperature Coefficient ID = 250 mA, referenced to 25°C − 70 − mV/°C Zero Gate Voltage Drain Current VDS = 80 V, VGS = 0 V − − 1 mA VDS = 80 V, TJ = 150°C − − 500 mA VGS = ±20 V, VDS = 0 V − − ±100 nA DT J IDSS IGSS Gate to Source Leakage Current ON CHARACTERISTICS VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 700 mA 2.0 3.0 4.0 V rDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 100 A − 2.1 2.3 mW Forward Transconductance VDS = 5 V, ID = 100 A − 222 − S VDS = 50 V, VGS = 0 V, f = 1 MHz gFS DYNAMIC CHARACTERISTICS Ciss Input Capacitance − 7980 11180 pF Coss Output Capacitance − 4490 6290 pF Crss Reverse Transfer Capacitance − 40 75 pF 0.1 0.8 1.8 W − 42 67 ns − 35 56 ns Turn−Off Delay Time − 74 118 ns Fall Time − 32 57 ns Rg Gate Resistance SWITCHING CHARACTERISTICS td(on) tr td(off) tf Turn−On Delay Time Rise Time VDD = 50 V, ID = 100 A, VGS = 10 V, RGEN = 6 W Qg Total Gate Charge VGS = 0 V to 10 V, VDD = 50 V, ID = 100 A − 108 152 nC Qgs Gate to Source Gate Charge VDD = 50 V, ID = 100 A − 36 − nC Qgd Gate to Drain “Miller” Charge − 22 − nC Qoss Output Charge − 297 − nC Maximum Continuous Drain to Source Diode Forward Current − − 222 A ISM Maximum Pulsed Drain to Source Diode Forward Current − − 888 A VSD Source to Drain Diode Forward Voltage VGS = 0 V, ISD = 100 A − 0.9 1.3 V trr Reverse Recovery Time − 107 172 ns Qrr Reverse Recovery Charge VGS = 0 V, VDD = 50 V, IF = 100 A, dIF/dt = 100 A/ms − 191 306 nC trr Reverse Recovery Time − 97 155 ns Qrr Reverse Recovery Charge VGS = 0 V, VDD = 50 V, IF = 100 A, dIF/dt = 300 A/ms − 492 788 nC VDD = 50 V, VGS = 0 V DRAIN−SOURCE DIODE CHARACTERISTICS IS Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 3 FDP2D3N10C, FDPF2D3N10C TYPICAL PERFORMANCE CHARACTERISTICS (TJ = 25°C unless otherwise noted) 7 VGS = 10 V PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX ID, Drain Current (A) 300 Normalized Drain to Source On−Resistance 360 VGS = 6 V 240 VGS = 5.5 V 180 120 VGS = 5 V 60 VGS = 4.5 V 0 0 1 2 6 VGS = 4.5 V PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX VGS = 5 V 5 4 VGS = 5.5 V 3 2 VGS = 6 V 1 0 0 3 VGS = 10 V 60 VDS, Drain to Source Voltage (V) rDS(on), Drain to Source On−Resistance (mW) Normalized Drain to Source On−Resistance 16 ID = 100 A VGS = 10 V −50 −25 0 25 50 TJ = 150°C 4 400 TJ = 25°C TJ = 175°C TJ = −55°C 4 5 6 6 7 8 9 10 Figure 4. On−Resistance vs. Gate to Source Voltage VDS = 5 V 3 5 VGS, Gate to Source Voltage (V) PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX 60 0 2 ID = 100 A 8 75 100 125 150 175 180 120 360 TJ = 25°C IS, Reverse Drain Current (A) ID, Drain Current (A) 240 300 PULSE DURATION = 80 ms DUTY CYCLE = 0.5% MAX 12 0 4 Figure 3. Normalized On−Resistance vs. Junction Temperature 300 240 Figure 2. Normalized On−Resistance vs. Drain Current and Gate Voltage TJ, Junction Temperature (°C) 360 180 ID, Drain Current (A) Figure 1. On−Region Characteristics 1.9 1.8 1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 −75 120 100 10 TJ = 175°C 1 TJ = 25°C 0.1 TJ = −55°C 0.01 0.001 0.0 7 VGS = 0 V VGS, Gate to Source Voltage (V) 0.2 0.4 0.6 0.8 1.0 VSD, Body Diode Forward Voltage (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs. Source Current www.onsemi.com 4 1.2 FDP2D3N10C, FDPF2D3N10C TYPICAL PERFORMANCE CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Continued) 10000 ID = 100 A 8 VDD = 50 V 6 Capacitance (pF) VGS, Gate to Source Voltage (V) 10 VDD = 30 V VDD = 75 V 4 10 f = 1 MHz VGS = 0 V 0 Crss 1 0.1 10 20 30 40 50 60 70 80 90 100 110 120 Qg, Gate Charge (nC) 1 10 100 VDS, Drain to Source Voltage (V) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs. Drain to Source Voltage 240 500 200 100 ID, Drain Current (A) IAS, Avalanche Current (A) Coss 100 2 0 Ciss 1000 TJ = 25°C TJ = 125°C 10 TJ = 150°C 1 0.01 0.1 1 VGS = 10 V 160 120 80 40 10 0 25 1000 100 tAV, Time in Avalanche (ms) RqJC = 0.7°C/W 50 75 100 125 150 Figure 9. Unclamped Inductive Switching Capability Figure 10. Maximum Continuous Drain Current vs. Case Temperature 2000 1000 2000 1000 ID, Drain Current (A) ID, Drain Current (A) 10 ms 100 THIS AREA IS 10 LIMITED BY rDS(on) 1 0.1 0.1 175 TC, Case Temperature (°C) 100 ms SINGLE PULSE TJ = MAX RATED RqJC = 0.7°C/W TC = 25°C CURVE BENT TO MEASURED AREA 1 10 1 ms 10 ms 100 ms 100 10 ms 100 THIS AREA IS 10 LIMITED BY rDS(on) 1 0.1 0.1 400 VDS, Drain to Source Voltage (V) 100 ms SINGLE PULSE TJ = MAX RATED RqJC = 3.3°C/W TC = 25°C CURVE BENT TO MEASURED AREA 1 10 1 ms 10 ms 100 ms 100 VDS, Drain to Source Voltage (V) Figure 11. Forward Bias Safe Operating Area for FDP2D3N10C Figure 12. Forward Bias Safe Operating Area for FDPF2D3N10C www.onsemi.com 5 400 FDP2D3N10C, FDPF2D3N10C TYPICAL PERFORMANCE CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Continued) 100000 SINGLE PULSE RqJC = 0.7°C/W TC = 25°C P(PK), Peak Transient Power (W) P(PK), Peak Transient Power (W) 100000 10000 1000 100 −5 10 −4 10 −3 10 −2 10 −1 10 0 10 1 10 SINGLE PULSE RqJC = 3.3°C/W TC = 25°C 10000 1000 100 10 −5 10 2 10 t, Pulse Width (s) r(t), Normalized Effective Transient Thermal Resistance −3 10 −2 10 −1 0 10 10 1 2 10 10 t, Pulse Width (s) Figure 13. Single Pulse Maximum Power Dissipation for FDP2D3N10C 2 −4 10 Figure 14. Single Pulse Maximum Power Dissipation for FDPF2D3N10C DUTY CYCLE−DESCENDING ORDER 1 D = 0.5 0.2 0.1 0.05 0.02 0.01 0.1 PDM t1 t2 NOTES: ZqJC(t) = r(t) x RqJC RqJC = 0.7°C/W Peak TJ = PDM x ZqJC(t) + TC Duty Cycle, D = t1 / t2 0.01 SINGLE PULSE 0.001 −5 10 −4 10 −3 −2 10 10 −1 10 0 10 1 2 10 10 t, Rectangular Pulse Duration (s) r(t), Normalized Effective Transient Thermal Resistance Figure 15. Junction−to−Case Transient Thermal Response Curve for FDP2D3N10C 2 1 DUTY CYCLE−DESCENDING ORDER 0.1 0.01 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 NOTES: ZqJC(t) = r(t) x RqJC RqJC = 3.3°C/W Peak TJ = PDM x ZqJC(t) + TC Duty Cycle, D = t1 / t2 SINGLE PULSE 0.001 0.0001 10−5 10−4 10−3 10−2 10−1 100 101 t, Rectangular Pulse Duration (s) Figure 16. Junction−to−Case Transient Thermal Response Curve for FDPF2D3N10C www.onsemi.com 6 102 FDP2D3N10C, FDPF2D3N10C POWERTRENCH is registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. www.onsemi.com 7 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TO−220 CASE 221A ISSUE AK DATE 13 JAN 2022 SCALE 1:1 STYLE 1: PIN 1. 2. 3. 4. BASE COLLECTOR EMITTER COLLECTOR STYLE 2: PIN 1. 2. 3. 4. BASE EMITTER COLLECTOR EMITTER STYLE 3: PIN 1. 2. 3. 4. CATHODE ANODE GATE ANODE STYLE 4: PIN 1. 2. 3. 4. MAIN TERMINAL 1 MAIN TERMINAL 2 GATE MAIN TERMINAL 2 STYLE 5: PIN 1. 2. 3. 4. GATE DRAIN SOURCE DRAIN STYLE 6: PIN 1. 2. 3. 4. ANODE CATHODE ANODE CATHODE STYLE 7: PIN 1. 2. 3. 4. CATHODE ANODE CATHODE ANODE STYLE 8: PIN 1. 2. 3. 4. CATHODE ANODE EXTERNAL TRIP/DELAY ANODE STYLE 9: PIN 1. 2. 3. 4. GATE COLLECTOR EMITTER COLLECTOR STYLE 10: PIN 1. 2. 3. 4. GATE SOURCE DRAIN SOURCE STYLE 11: PIN 1. 2. 3. 4. DRAIN SOURCE GATE SOURCE STYLE 12: PIN 1. 2. 3. 4. MAIN TERMINAL 1 MAIN TERMINAL 2 GATE NOT CONNECTED DOCUMENT NUMBER: DESCRIPTION: 98ASB42148B TO−220 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TO−220 Fullpack, 3−Lead / TO−220F−3SG CASE 221AT ISSUE B DATE 19 JAN 2021 Scale 1:1 DOCUMENT NUMBER: DESCRIPTION: 98AON67439E Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. TO−220 FULLPACK, 3−LEAD / TO−220F−3SG PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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