FDS3670
100V N-Channel PowerTrench MOSFET
General Description
Features
This N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers.
• 6.3 A, 100 V. RDS(ON) = 0.030 Ω @ VGS = 10 V
RDS(ON) = 0.033 Ω @ VGS = 6 V.
• Low gate charge (57 nC typical).
These MOSFETs feature faster switching and lower
gate charge than other MOSFETs with comparable
RDS(ON) specifications.
• Fast switching speed
• High performance trench technology for extremely
low RDS(ON) .
The result is a MOSFET that is easy and safer to drive
(even at very high frequencies), and DC/DC power
supply designs with higher overall efficiency.
D
D
• High power and current handling capability.
D
D
SO-8
S
S
S
Drain-Source Voltage
VGSS
Gate-Source Voltage
ID
Drain Current
– Continuous
(Note 1a)
7
2
8
1
Ratings
Units
100
V
±20
V
6.3
A
50
Power Dissipation for Single Operation
TJ, TSTG
3
o
– Pulsed
PD
6
TA=25 C unless otherwise noted
Parameter
VDSS
4
G
Absolute Maximum Ratings
Symbol
5
(Note 1a)
2.5
(Note 1b)
1.2
(Note 1c)
1.0
W
-55 to +150
°C
(Note 1a)
50
°C/W
(Note 1)
25
°C/W
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA
Thermal Resistance, Junction-to-Ambient
RθJC
Thermal Resistance, Junction-to-Case
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape width
Quantity
FDS3670
FDS3670
13’’
12mm
2500 units
1999 Fairchild Semiconductor Corporation
FDS3670 Rev B1 (W)
FDS3670
January 2000
PRELIMINARY
Symbol
Parameter
TA = 25°C unless otherwise noted
Test Conditions
Min
Typ
Max Units
Off Characteristics
BVDSS
Drain–Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
∆BVDSS
∆TJ
IDSS
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
ID = 250 µA,Referenced to 25°C
VDS = 80 V,
VGS = 0 V
25
µA
IGSSF
Gate–Body Leakage Current,
Forward
Gate–Body Leakage Current,
Reverse
VGS = 20 V,
VDS = 0 V
100
nA
VGS = –20 V
VDS = 0 V
–100
nA
IGSSR
On Characteristics
100
V
92
mV/°C
(Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
∆VGS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
ID = –250 µA,Referenced to 25°C
–7.2
VGS = 10 V,
VGS = 10 V,
0.022
0.039
0.030
0.060
0.033
On–State Drain Current
VGS = 6 V,
VGS = 10 V,
0.024
ID(on)
ID = 6.3 A
ID = 6.3 A
TJ = 125°C
ID = 5.7 A
VDS = 5 V
gFS
Forward Transconductance
VDS = 5 V,
ID = 6.3 A
31
S
VDS = 50 V,
f = 1.0 MHz
V GS = 0 V,
2490
pF
265
pF
80
pF
2
2.5
4
V
mV/°C
25
Ω
A
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
Turn–On Delay Time
tr
Turn–On Rise Time
td(off)
(Note 2)
VDD = 50 V,
VGS = 10 V,
16
26
10
18
ns
Turn–Off Delay Time
56
84
ns
tf
Turn–Off Fall Time
25
40
ns
Qg
Total Gate Charge
57
80
nC
Qgs
Gate–Source Charge
Qgd
Gate–Drain Charge
VDS = 50 V,
VGS = 10 V
ID = 1 A,
RGEN = 6 Ω
ID = 25 A,
ns
11
nC
15
nC
Drain–Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain–Source Diode Forward Current
VSD
Drain–Source Diode Forward
Voltage
VGS = 0 V,
IS = 2.1 A
(Note 2)
0.72
2.1
A
1.2
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 50 °C/W when
2
mounted on a 1in
pad of 2 oz copper
b) 105 °C/W when
mounted on a 0.04
2
in pad of 2 oz
copper
c) 125 °C/W when mounted on a
minimum pad.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDS3670 Rev B1 (W)
FDS3670
Electrical Characteristics
FDS3670
Typical Characteristics
2
60
I D, DRAIN CURRENT (A)
50
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
5.0V
4.5V
V GS = 10V
5.5V
40
30
4.0V
20
10
1.8
1.6
VGS = 4.0V
1.4
4.5V
1.2
5.0V
5.5V 7.0V
10V
1
3.5V
0.8
0
0
1
2
3
4
0
5
10
20
Figure 1. On-Region Characteristics.
50
60
0.06
ID = 7.2A
VGS = 10V
2
ID = 3.6A
R DS(ON), ON-RESISTANCE (Ω)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
40
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
2.2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.05
TA = 125 oC
0.04
0.03
0.02
TA = 25oC
0.01
0
-50
-25
0
25
50
75
100
125
150
3
4
5
o
6
7
8
9
10
VGS, GATE TO SOURCE VOLTAGE (V)
TJ, JUNCTION TEMPERATURE ( C)
Figure 3. On-Resistance Variation
withTemperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
60
I S, REVERSE DRAIN CURRENT (A)
V GS = 0V
VDS = 5V
50
I D, DRAIN CURRENT (A)
30
I D, DIRAIN CURRENT (A)
VDS, DRAIN-SOURCE VOLTAGE (V)
40
30
125oC
20
25oC
10
TA = -55oC
10
T A = 125oC
1
25oC
0.1
-55oC
0.01
0.001
0.0001
0
2
3
4
5
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
6
0
0.2
0.4
0.6
0.8
1
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS3670 Rev B1 (W)
FDS3670
Typical Characteristics
4500
I D = 25A
8
f = 1MHz
V GS = 0 V
4000
VDS = 20V
50V
3500
80V
CAPACITANCE (pF)
V GS, GATE-SOURCE VOLTAGE (V)
10
6
4
3000
C ISS
2500
2000
1500
1000
2
C RSS
C OSS
500
0
0
0
10
20
30
40
50
0
60
20
40
60
80
Figure 7. Gate Charge Characteristics.
Figure 8. Capacitance Characteristics.
50
100
SINGLE PULSE
R θJA = 125oC/W
RDS(ON) LIMIT
100µs
10
40
1ms
10ms
POWER (W)
I D, DRAIN CURRENT (A)
100
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
100ms
1
1s
10s
DC
V GS = 10V
SINGLE PULSE
RθJA = 125oC/W
0.1
T A = 25oC
30
20
10
TA = 25oC
0.01
0.1
1
10
100
0
0.001
1000
0.01
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
r(t), NORMALIZED EFFECTIVE
TRANSI ENT THER MAL RESISTANCE
0.1
1
10
100
1000
SINGLE PULSE TIME (SEC)
Figure 10. Single Pulse Maximum
Power Dissipation.
1
0.5
0.2
0.1
0.05
D = 0.5
R θJA (t) = r(t) * R θJA
R θJA = 125°C/ W
0.2
0.1
0.05
P(pk)
0.02
0.02
t1
0.01
0.01
S in gle Pulse
t2
TJ - TA = P * RθJA (t)
0.005
D u t y C y c l e, D = t 1 /t 2
0.002
0.001
0.0001
0.001
0.01
0.1
1
10
100
300
t 1 , TI ME (s e c)
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
FDS3670 Rev B1 (W)
SO-8 Tape and Reel Data and Package Dimensions
SOIC(8lds) Packaging
Configuration: Figure 1.0
Packaging Description:
EL ECT ROST AT IC
SEN SIT IVE DEVICES
DO NO T SHI P OR STO RE N EAR ST RO NG EL ECT ROST AT IC
EL ECT RO M AGN ETI C, M AG NET IC O R R ADIO ACT IVE FI ELD S
TNR D ATE
PT NUMB ER
PEEL STREN GTH MIN ___ __ ____ __ ___gms
MAX ___ ___ ___ ___ _ gms
Antistatic Cover Tape
ESD Label
SOIC-8 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
2,500 units per 13" or 330cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 units per 7" or
177cm diameter reel. This and some other options are
further described in the Packaging Information table.
These full reels are individually barcode labeled and
placed inside a standard intermediate box (illustrated in
figure 1.0) made of recyclable corrugated brown paper.
One box contains two reels maximum. And these boxes
are placed inside a barcode labeled shipping box which
comes in different sizes depending on the number of parts
shipped.
Static Dissipative
Embossed Carrier Tape
F63TNR
Label
Customized
Label
F852
NDS
9959
F852
NDS
9959
F852
NDS
9959
F852
NDS
9959
F852
NDS
9959
Pin 1
SOIC (8lds) Packaging Information
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Standard
(no flow code)
TNR
2,500
L86Z
F011
D84Z
Rail/Tube
TNR
TNR
95
4,000
500
13" Dia
-
13" Dia
7" Dia
343x64x343
530x130x83
343x64x343
184x187x47
Max qty per Box
5,000
30,000
8,000
1,000
Weight per unit (gm)
0.0774
0.0774
0.0774
0.0774
Weight per Reel (kg)
0.6060
-
0.9696
0.1182
Reel Size
Box Dimension (mm)
SOIC-8 Unit Orientation
Note/Comments
343mm x 342mm x 64mm
Standard Intermediate box
ESD Label
F63TNR Label sample
F63TNLabel
F63TN Label
LOT: CBVK741B019
QTY: 2500
FSID: FDS9953A
SPEC:
D/C1: D9842
D/C2:
QTY1:
QTY2:
SPEC REV:
CPN:
N/F: F
ESD Label
(F63TNR)3
SOIC(8lds) Tape Leader and Trailer
Configuration: Figure 2.0
Carrier Tape
Cover Tape
Components
Trailer Tape
640mm minimum or
80 empty pockets
Leader Tape
1680mm minimum or
210 empty pockets
July 1999, Rev. B
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC(8lds) Embossed Carrier Tape
Configuration: Figure 3.0
P0
D0
T
E1
F
K0
Wc
W
E2
B0
Tc
A0
D1
P1
User Direction of Feed
Dimensions are in millimeter
Pkg type
A0
B0
SOIC(8lds)
(12mm)
6.50
+/-0.10
5.30
+/-0.10
W
12.0
+/-0.3
D0
D1
E1
E2
1.55
+/-0.05
1.60
+/-0.10
1.75
+/-0.10
F
10.25
min
5.50
+/-0.05
P1
P0
8.0
+/-0.1
4.0
+/-0.1
K0
2.1
+/-0.10
Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481
rotational and lateral movement requirements (see sketches A, B, and C).
T
Wc
0.450
+/0.150
9.2
+/-0.3
0.06
+/-0.02
0.5mm
maximum
20 deg maximum
Typical
component
cavity
center line
B0
Tc
0.5mm
maximum
20 deg maximum component rotation
Typical
component
center line
Sketch A (Side or Front Sectional View)
A0
Component Rotation
Sketch C (Top View)
Component lateral movement
Sketch B (Top View)
SOIC(8lds) Reel Configuration: Figure 4.0
Component Rotation
W1 Measured at Hub
Dim A
Max
Dim A
max
See detail AA
Dim N
7" Diameter Option
B Min
Dim C
See detail AA
W3
13" Diameter Option
Dim D
min
W2 max Measured at Hub
DETAIL AA
Dimensions are in inches and millimeters
Tape Size
Reel
Option
Dim A
Dim B
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
2.165
55
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 – 0.606
11.9 – 15.4
0.059
1.5
512 +0.020/-0.008
13 +0.5/-0.2
0.795
20.2
7.00
178
0.488 +0.078/-0.000
12.4 +2/0
0.724
18.4
0.469 – 0.606
11.9 – 15.4
12mm
7" Dia
7.00
177.8
12mm
13" Dia
13.00
330
1998 Fairchild Semiconductor Corporation
Dim C
Dim D
Dim N
Dim W1
Dim W2
Dim W3 (LSL-USL)
July 1999, Rev. B
SO-8 Tape and Reel Data and Package Dimensions, continued
SOIC-8 (FS PKG Code S1)
1:1
Scale 1:1 on letter size paper
Dimensions shown below are in:
inches [millimeters]
Part Weight per unit (gram): 0.0774
9
September 1998, Rev. A
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ISOPLANAR™
MICROWIRE™
POP™
PowerTrench
QFET™
QS™
Quiet Series™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
ACEx™
CoolFET™
CROSSVOLT™
E2CMOSTM
FACT™
FACT Quiet Series™
FAST®
FASTr™
GTO™
HiSeC™
SyncFET™
TinyLogic™
UHC™
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. D
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