FDS6898AZ-F085

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Other names and brands may be claimed as the property of others. Dual N-Channel Logic Level PWM Optimized PowerTrench MOSFET General Description Features These N-Channel Logic Level MOSFETs are produced using ON Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. • 9.4 A, 20 V RDS(ON) = 14 mΩ @ VGS = 4.5 V RDS(ON) = 18 mΩ @ VGS = 2.5 V • Low gate charge (16 nC typical) • ESD protection diode (note 3) These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required. • High performance trench technology for extremely low RDS(ON) • High power and current handling capability • Qualified to AEC Q101 • RoHS Compliant DD1 DD1 D2 D 5 DD2 6 SO-8 Pin 1 SO-8 G2 S2 S S Symbol 3 Q1 7 G1 S1 G S Absolute Maximum Ratings 4 8 2 Q2 1 o TA=25 C unless otherwise noted Ratings Units VDSS Drain-Source Voltage Parameter 20 V VGSS Gate-Source Voltage ± 12 V ID Drain Current 9.4 A PD Power Dissipation for Dual Operation – Continuous (Note 1a) – Pulsed 38 2 Power Dissipation for Single Operation TJ, TSTG (Note 1a) W 1.6 (Note 1b) 1 (Note 1c) 0.9 –55 to +150 °C (Note 1a) 78 °C/W (Note 1) 40 °C/W Operating and Storage Junction Temperature Range Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient RθJC Thermal Resistance, Junction-to-Case Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity FDS6898AZ FDS6898AZ-F085 13’’ 12mm 2500 units ©2010 Semiconductor Components Industries, LLC. September-2017, Rev. 1 1 FDS6898AZ-F085 Dual N-Channel Logic Level PWM Optimized PowerTrench® MOSFET FDS6898AZ-F085 Publication Order Number: FDS6898AZ-F085/D Symbol Parameter TA = 25°C unless otherwise noted Test Conditions Min VGS = 0 V, ID = 250 µA ID = 250 µA, Referenced to 25°C 20 Typ Max Units Off Characteristics BVDSS ∆BVDSS ∆TJ IDSS Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current VDS = 16 V, V mV/°C 21 VGS = 0 V 1 µA IGSSF Gate–Body Leakage, Forward VGS = 12 V, VDS = 0 V 10 µA IGSSR Gate–Body Leakage, Reverse VGS = –12 V, VDS = 0 V –10 µA 1 –3.5 1.5 V mV/°C 10 13 14 14 18 21 mΩ On Characteristics (Note 2) VDS = VGS, ID = 250 µA ID = 250 µA, Referenced to 25°C VGS(th) ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance 0.5 ID(on) On–State Drain Current VGS = 4.5 V, ID = 9.4 A VGS = 2.5 V, ID = 8.3 A VGS = 4.5 V, ID = 9.4 A,TJ = 125°C VGS = 4.5V, VDS = 5 V gFS Forward Transconductance VDS = 5 V, ID = 9.4 A 47 S VDS = 10 V, f = 1.0 MHz V GS = 0 V, 1821 pF 19 A Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time td(off) 440 pF 208 pF (Note 2) 10 20 ns 15 27 ns Turn–Off Delay Time 34 55 ns tf Turn–Off Fall Time 16 29 ns Qg Total Gate Charge 16 23 nC Qgs Gate–Source Charge Qgd Gate–Drain Charge VDD = 10 V, VGS = 4.5 V, VDS = 10 V, VGS = 4.5 V ID = 1 A, RGEN = 6 Ω ID = 9.4 A, 3 nC 4 nC Drain–Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain–Source Diode Forward Current VSD Drain–Source Diode Forward Voltage VGS = 0 V, IS = 1.3 A 0.7 (Note 2) 1.3 A 1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 78°C/W when 2 mounted on a 0.5in pad of 2 oz copper b) 125°C/W when mounted on a 0.02 2 in pad of 2 oz copper c) 135°C/W when mounted on a minimum mounting pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% 3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied www.onsemi.com 2 FDS6898AZ-F085 Dual N-Channel Logic Level PWM Optimized PowerTrench® MOSFET Electrical Characteristics 2.2 VGS = 4.5V 3.0V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID, DRAIN CURRENT (A) 40 2.5V 30 2.0V 20 10 2 VGS = 2.0V 1.8 1.6 1.4 2.5V 1.2 3.0V 1 0 0.5 1 1.5 0 2 10 Figure 1. On-Region Characteristics. 1.6 20 30 40 I D, DRAIN CURRENT (A) VDS, DRAIN-SOURCE VOLTAGE (V) Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.038 I D = 9.4A VGS = 4.5V RDS(ON) , ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 4.5V 0.8 0 1.4 1.2 1 0.8 0.6 ID = 4.7A 0.03 0.022 TA = 125oC 0.014 TA = 25o C 0.006 -50 -25 0 25 50 75 100 125 150 1 2 3 4 5 VGS, GATE TO SOURCE VOLTAGE (V) o TJ, JUNCTION TEMPERATURE ( C) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 40 25o C IS, REVERSE DRAIN CURRENT (A) TA = -55o C VDS = 5V ID, DRAIN CURRENT (A) 4.0V 125o C 30 20 10 0 0.5 1 1.5 2 2.5 VGS = 0V 10 25o C 0.1 -55oC 0.01 0.001 0.0001 0 VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. TA = 125oC 1 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. www.onsemi.com 3 FDS6898AZ-F085 Dual N-Channel Logic Level PWM Optimized PowerTrench® MOSFET Typical Characteristics 2500 VDS = 5V ID = 9.4A 10V 8 6 4 1500 1000 2 500 0 0 C OSS CRSS 0 5 10 15 20 25 30 0 35 5 10 Figure 7. Gate Charge Characteristics. 40 P(pk), PEAK TRANSIENT POWER (W) 100µs RDS(ON) LIMIT 1ms 10 10ms 100ms 1s 10s DC 1 VGS = 10V SINGLE PULSE RθJA = 135o C/W 0.1 TA = 25o C 0.01 0.01 0.1 1 20 Figure 8. Capacitance Characteristics. 100 10 SINGLE PULSE RθJA =135°C/W TA = 25°C 30 20 10 0 0.001 100 0.01 0.1 VDS, DRAIN-SOURCE VOLTAGE (V) 1 10 100 t1, TIME (sec) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 15 VDS, DRAIN TO SOURCE VOLTAGE (V) Q g, GATE CHARGE (nC) ID, DRAIN CURRENT (A) f = 1MHz VGS = 0 V CISS 2000 15V CAPACITANCE (pF) VGS, GATE-SOURCE VOLTAGE (V) 10 Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) * RθJA RθJA = 135 °C/W 0.2 0.1 0.1 0.05 P(pk) 0.02 0.01 t1 0.01 t2 TJ - TA = P * RθJA(t) Duty Cycle, D = t 1 / t 2 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 1 10 t , TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. www.onsemi.com 4 100 1000 FDS6898AZ-F085 Dual N-Channel Logic Level PWM Optimized PowerTrench® MOSFET Typical Characteristics ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 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