FDT439N
N-Channel 2.5V Specified Enhancement Mode Field Effect Transistor
General Description
Features
This N-Channel Enhancement mode field effect transistor
is produced using Fairchild Semiconductor's proprietary,
high cell density, DMOS technology. This very high
density process is especially tailored to minimize onstate resistance, and provide superior switching
performance. These products are well suited to low
voltage, low current applications such as notebook
computer power management, battery powered
circuits, and DC motor control.
6.3 A, 30 V. RDS(on) = 0.045 Ω @ VGS = 4.5 V
RDS(on) = 0.058 Ω @ VGS = 2.5 V
Fast switching speed.
High power and current handling capabitlity in a
widely used surface mount package.
Applications
DC/DC converter
Load switch
Motor driving
D
D
D
D
S
S
D
G
SOT-223
D
G
Absolute Maximum Ratings
Symbol
S
SOT-223 *
Drain-Source Voltage
VGSS
Gate-Source Voltage
ID
Drain Current
- Continuous
(Note 1a)
- Pulsed
PD
Power Dissipation for Single Operation
S
FDT439N
Units
30
V
±8
6.3
V
A
20
(Note 1a)
3
(Note 1b)
1.3
(Note 1c)
TJ, Tstg
G
TA = 25°C unless otherwise noted
Parameter
VDSS
G
(J23Z)
Operating and Storage Junction Temperature Range
W
1.1
-55 to +150
°C
°C/W
°C/W
Thermal Characteristics
RθJA
RθJC
Thermal Resistance, Junction-to-Ambient
(Note 1a)
42
Thermal Resistance, Junction-to-Case
(Note 1)
12
Package Marking and Ordering Information
Device Marking
Device
Reel Size
Tape Width
Quantity
FDT439N
FDT439N
13’’
12mm
2500 units
©1999 Semiconductor Components Industries, LLC.
October-2017, Rev. 3
Publication Order Number:
FDT439N/D
FDT439N
June 1999
Symbol
TA = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max Units
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
∆BVDSS
∆TJ
IDSS
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, Referenced to 25°C
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
1
IGSSF
Gate-Body Leakage Current, Forward
VGS = 8 V, VDS = 0 V
100
µA
nA
IGSSR
Gate-Body Leakage Current, Reverse
VGS = -8 V, VDS = 0 V
-100
nA
1
V
On Characteristics
30
V
40
mV/°C
(Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
∆VGS(th)
∆TJ
RDS(on)
Gate Threshold Voltage
Temperature Coefficient
ID = 250 µA, Referenced to 25°C
-2.2
Static Drain-Source
On-Resistance
0.038
0.055
0.048
ID(on)
On-State Drain Current
VGS = 4.5 V, ID = 6.3 A
VGS = 4.5 V, ID = 6.3 A, TJ=125°C
VGS = 2.5 V, ID = 5.5A
VGS = 4.5 V, VDS = 5 V
gFS
Forward Transconductance
VDS = 5 V, ID = 6.3 A
17
S
VDS = 15 V, VGS = 0 V,
f = 1.0 MHz
500
pF
0.4
0.67
mV/°C
0.045
0.072
0.058
10
Ω
A
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
185
pF
43
pF
(Note 2)
VDD = 15 V, ID = 1 A,
VGS = 4.5 V, RGEN = 6 Ω
6
12
ns
10
18
ns
Turn-Off Delay Time
30
48
ns
tf
Turn-Off Fall Time
10
18
ns
Qg
Total Gate Charge
10.7
15
nC
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDS = 15 V, ID = 6.3 A,
VGS = 4.5 V,
0.9
nC
3.7
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
VSD
Drain-Source Diode Forward Voltage
VGS = 0 V, IS = 2.5 A
(Note 2)
0.8
2.5
A
1.2
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 42° C/W when
mounted on a 1 in2
pad of 2 oz. copper.
b) 95° C/W when
mounted on a 0.066 in2
pad of 2 oz. copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0%
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2
c) 110° C/W when
mounted on a minimum
mounting pad.
FDT439N
Electrical Characteristics
FDT439N
Typical Characteristics
2
VGS = 4.5V
2.5V
3.0V
16
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
ID, DRAIN-SOURCE CURRENT (A)
20
2.0V
12
8
1.5V
4
1.8
1.6
VGS = 2.0V
1.4
2.5V
1.2
3.0V
3.5V
4.5V
1
0.8
0
0
1
2
3
0
4
4
8
Figure 1. On-Region Characteristics.
20
0.14
ID = 6.3A
VGS = 4.5V
1.5
RDS(ON), ON-RESISTANCE (OHM)
RDS(ON), NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
16
Figure 2. On-Resistance Variation
with Drain Current and Gate Voltage.
1.6
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
ID = 3.2A
0.12
0.1
0.08
o
TA = 125 C
0.06
0.04
o
TA = 25 C
0.02
0
-50
-25
0
25
50
75
100
125
150
1
2
o
3
4
5
VGS, GATE TO SOURCE VOLTAGE (V)
TJ, JUNCTION TEMPERATURE ( C)
Figure 3. On-Resistance Variation
with Temperature.
Figure 4. On-Resistance Variation
with Gate-To-Source Voltage.
100
VDS = 5V
IS, REVERSE DRAIN CURRENT (A)
20
ID, DRAIN CURRENT (A)
12
ID, DRAIN CURRENT (A)
VDS, DRAIN-SOURCE VOLTAGE (V)
o
TA = -55 C
o
25 C
16
o
125 C
12
8
4
VGS = 0V
10
o
TA = 125 C
1
o
25 C
o
-55 C
0.1
0.01
0.001
0.0001
0
0
0.5
1
1.5
2
2.5
0
3
0.2
0.4
0.6
0.8
1
VSD, BODY DIODE FORWARD VOLTAGE (V)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
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1.2
(continued)
1500
5
ID = 6.3A
VDS = 5V
f = 1MHz
VGS = 0 V
10V
4
1200
15V
CAPACITANCE (pF)
VGS, GATE-SOURCE VOLTAGE (V)
FDT439N
Typical Characteristics
3
2
900
600
CISS
1
300
0
0
0
2
4
6
8
10
COSS
CRSS
0
12
5
10
15
20
25
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 7. Gate-Charge Characteristics.
Figure 8. Capacitance Characteristics.
100
200
o
100µs
RθJA = 110 C/W
160
o
TA = 25 C
1ms
1s
10s
DC
1
VGS = 4.5V
SINGLE PULSE
0.1
POWER (W)
10ms
100ms
120
o
80
40
RθJA = 110 C/W
o
TA = 25 C
0
0.01
0.1
1
10
0.0001
100
0.001
0.01
0.1
1
10
100
1000
SINGLE PULSE TIME (SEC)
VDS, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
TRANSIENT THERMAL RESISTANCE
1
r(t), NORMALIZED EFFECTIVE
ID, DRAIN CURRENT (A)
SINGLE PULSE
RDS(ON) LIMIT
10
0.5
D = 0.5
0.2
0.2
0.1
0.05
0.02
R θJA (t) = r(t) * R θJA
R θJA = 110°C/W
0.1
0.05
0.02
P(pk)
0.01
0.01
0.005
t1
Single Pulse
t2
TJ - TA = P * R θJA (t)
0.002
0.001
0.0001
Duty Cycle, D = t1 / t 2
0.001
0.01
0.1
t1 , TIME (sec)
1
Figure 11. Transient Thermal Response Curve.
10
Thermal characterization performed using the conditions described in Note 1.
Transient themal response will change depending on the circuit board design.
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100
300
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