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FDW2512NZ

FDW2512NZ

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    TSSOP8_3X4.4MM

  • 描述:

    MOSFET 2N-CH 20V 6A 8-TSSOP

  • 数据手册
  • 价格&库存
FDW2512NZ 数据手册
May 2008 FDW2512NZ Dual N-Channel 2.5V Specified PowerTrench® MOSFET Features ! 6A, 20V General Description rDS(ON) = 0.028Ω, VGS = 4.5V This N-Channel MOSFET is produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain low gate charge for superior switching performance. These devices are well suited for portable electronics applications. rDS(ON) = 0.036Ω, VGS = 2.5V ! Extended VGS range (±12 V) for battery applications ! HBM ESD Protection Level of 3.5kV Typical (note 3) ! High performance trench technology for extremely low rDS(ON) ! Low profile TSSOP-8 package Applications ! Load switch ! Battery charge ! Battery disconnect circuits D1 D2 G2 S2 S2 D2 G1 S1 S1 D1 G1 G2 S1 S2 Pin 1 TSSOP-8 ©2008 Fairchild Semiconductor Corporation FDW2512NZ Rev. A1 1 www.fairchildsemi.com FDW2512NZ Dual N-Channel 2.5V Specified PowerTrench® MOSFET e Symbol VDSS Drain to Source Voltage Ratings 20 Units V VGS Gate to Source Voltage ±12 V Drain Current Continuous (TC = 25oC, VGS = 4.5V, RθJA = 77oC/W) Continuous (TC = 100oC, VGS = 2.5V, RθJA = 77oC/W) 6.0 A 3.3 A ID Parameter Figure 4 A PD Power dissipation Pulsed 1.6 W Derate above 25°C 13 mW/oC TJ, TSTG Operating and Storage Temperature o -55 to 150 C Thermal Characteristics RθJA Thermal Resistance Junction to Ambient (Note 1) 77 RθJA Thermal Resistance Junction to Ambient (Note 2) 114 o C/W oC/W Package Marking and Ordering Information Device Marking 2512NZ Device FDW2512NZ Package TSSOP-8 Reel Size 13” Tape Width 12 mm Quantity 2500 units 2 Electrical Characteristics TA = 25°C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units 20 - - - V - 1 - - 5 µA - - Off Characteristics BVDSS Drain to Source Breakdown Voltage IDSS Zero Gate Voltage Drain Current IGSS Gate to Source Leakage Current ID = 250µA, VGS = 0V VDS = 16V TA=100oC VGS = 0V VGS = ±12V VGS = ±4.5V ±10 µA ±250 nA On Characteristics VGS(TH) rDS(ON) Gate to Source Threshold Voltage Drain to Source On Resistance VGS = VDS, ID = 250µA 0.6 0.8 1.5 V ID = 6.0A, VGS = 4.5V - 0.017 0.028 Ω ID = 5.9A, VGS = 4.0V - 0.018 0.029 ID = 5.3A, VGS = 3.1V - 0.019 0.035 ID = 5.3A, VGS = 2.5V - 0.022 0.036 - 670 - - 170 - pF - 115 - pF Dynamic Characteristics CISS Input Capacitance COSS Output Capacitance CRSS Reverse Transfer Capacitance RG Gate Resistance VGS = 0.5V, f = 1MHz - 4.2 - Ω Qg(TOT) Total Gate Charge at 4.5V VGS = 0V to 4.5V - 8 12 nC Qg(2.5) Total Gate Charge at 2.5V VGS = 0V to 2.5V - 5.1 7.6 nC Qgs Gate to Source Gate Charge - 1.1 - nC Qgd Gate to Drain “Miller” Charge - 2.2 - nC FDW2512NZ Rev. A1 VDS = 10V, VGS = 0V, f = 1MHz 2 VDD = 10V ID = 6.0A Ig = 1.0mA pF www.fairchildsemi.com FDW2512NZ Dual N-Channel 2.5V Specified PowerTrench® MOSFET Absolute Maximum Ratings TA=25°C unless otherwise noted (VGS = 4.5V) tON Turn-On Time - - 98 td(ON) Turn-On Delay Time - 8 - ns tr Rise Time - 57 - ns td(OFF) Turn-Off Delay Time - 47 - ns tf Fall Time - 58 - ns tOFF Turn-Off Time - - 158 ns VDD = 10V, ID = 6.0A VGS = 4.5V, RGS = 16Ω ns Drain-Source Diode Characteristics VSD Source to Drain Diode Voltage ISD = 1.3A - 0.7 1.2 V trr Reverse Recovery Time ISD = 6.0A, dISD/dt = 100A/µs - - 24 ns QRR Reverse Recovered Charge ISD = 6.0A, dISD/dt = 100A/µs - - 13 nC Notes: 1. RθJA is 77 oC/W (steady state) when mounted on a 1 inch2 copper pad on FR-4. 2. RθJA is 114 oC/W (steady state) when mounted on a mininum copper pad on FR-4. 3. The diode connected to the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. 4 FDW2512NZ Rev. A1 3 www.fairchildsemi.com FDW2512NZ Dual N-Channel 2.5V Specified PowerTrench® MOSFET Switching Characteristics TA = 25°C unless otherwise noted 8 1.2 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER 1.0 0.8 0.6 0.4 6 VGS = 4.5V 4 VGS = 2.5V 2 0.2 0 0 0 25 50 75 100 125 150 25 50 TA , AMBIENT TEMPERATURE (oC) 75 100 125 150 TA, AMBIENT TEMPERATURE (oC) Figure 1. Normalized Power Dissipation vs Ambient Temperature Figure 2. Maximum Continuous Drain Current vs Ambient Temperature 2 DUTY CYCLE - DESCENDING ORDER 0.5 0.2 0.1 0.05 0.02 0.01 ZθJA, NORMALIZED THERMAL IMPEDANCE 1 PDM 0.1 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA 0.01 10-5 10-4 10-3 10-2 10-1 100 101 102 103 t, RECTANGULAR PULSE DURATION (s) Figure 3. Normalized Maximum Transient Thermal Impedance IDM, PEAK CURRENT (A) 400 TA = 25oC TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: 100 I = I25 150 - TA 125 VGS = 2.5V 10 5 10-5 10-4 10-3 10-2 10-1 100 101 102 103 t, PULSE WIDTH (s) Figure 4. Peak Current Capability FDW2512NZ Rev. A1 4 www.fairchildsemi.com FDW2512NZ Dual N-Channel 2.5V Specified PowerTrench® MOSFET Typical Characteristic 40 400 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDD = 10V 100µs ID , DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 100 1ms 10 10ms OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 30 20 TJ = 150oC TJ = 25oC 10 TJ = -55oC SINGLE PULSE TJ = MAX RATED TA = 25oC 1 0 0.5 0.1 1 10 1.0 30 1.5 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 5. Forward Bias Safe Operating Area 60 VGS = 10V VGS = 2.5V rDS(ON), DRAIN TO SOURCE ON RESISTANCE (mΩ) ID, DRAIN CURRENT (A) 2.5 Figure 6. Transfer Characteristics 40 30 VGS = 4.5V PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 20 TA = 25oC 10 VGS = 1.8V 0 ID = 6A PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 45 ID = 1A 30 15 0 0.5 1.0 1.5 1 VDS , DRAIN TO SOURCE VOLTAGE (V) 2 3 4 5 VGS, GATE TO SOURCE VOLTAGE (V) Figure 7. Saturation Characteristics Figure 8. Drain to Source On Resistance vs Gate Voltage and Drain Current 1.25 1.50 VGS = VDS, ID = 250µA PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX NORMALIZED GATE THRESHOLD VOLTAGE NORMALIZED DRAIN TO SOURCE ON RESISTANCE 2.0 VGS , GATE TO SOURCE VOLTAGE (V) 1.25 1.00 1.00 0.75 VGS = 4.5V, ID = 6A 0.75 0.50 -80 -40 0 40 80 120 -80 160 TJ, JUNCTION TEMPERATURE (oC) 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC) Figure 9. Normalized Drain to Source On Resistance vs Junction Temperature FDW2512NZ Rev. A1 -40 Figure 10. Normalized Gate Threshold Voltage vs Junction Temperature 5 www.fairchildsemi.com FDW2512NZ Dual N-Channel 2.5V Specified PowerTrench® MOSFET Typical Characteristic (Continued) TA = 25°C unless otherwise noted 1000 ID = 250µA C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.10 1.05 1.00 CISS = CGS + CGD COSS ≅ CDS + CGD 200 CRSS = CGD VGS = 0V, f = 1MHz 70 0.95 -80 -40 0 40 80 120 160 0.1 1 TJ , JUNCTION TEMPERATURE (oC) 10 20 VDS , DRAIN TO SOURCE VOLTAGE (V) Figure 11. Normalized Drain to Source Breakdown Voltage vs Junction Temperature Figure 12. Capacitance vs Drain to Source Voltage VGS , GATE TO SOURCE VOLTAGE (V) 4.5 VDD = 10V 3.0 1.5 WAVEFORMS IN DESCENDING ORDER: ID = 1A ID = 6A 0 0 2 4 6 8 10 Qg, GATE CHARGE (nC) Figure 13. Gate Charge Waveforms for Constant Gate Currents FDW2512NZ Rev. A1 6 www.fairchildsemi.com FDW2512NZ Dual N-Channel 2.5V Specified PowerTrench® MOSFET Typical Characteristic (Continued) TA = 25°C unless otherwise noted VDS BVDSS tP L VDS VARY tP TO OBTAIN IAS + RG REQUIRED PEAK IAS VDD VDD - VGS DUT tP IAS 0V 0 0.01Ω tAV Figure 14. Unclamped Energy Test Circuit Figure 15. Unclamped Energy Waveforms VDS RL VDD Qg(TOT) VDS VGS VGS VGS = 5V + Qgs2 VDD DUT VGS = 1V Ig(REF) 0 Qg(TH) Qgs Qgd Ig(REF) 0 Figure 16. Gate Charge Test Circuit Figure 17. Gate Charge Waveforms tON RL td(OFF) VDS VGS tOFF td(ON) tr VDS + VGS tf 90% 90% 0V RGS 90% VGS 0 Figure 18. Switching Time Test Circuit FDW2512NZ Rev. A1 10% 10% 0 DUT 50% 10% 50% PULSE WIDTH Figure 19. Switching Time Waveforms 7 www.fairchildsemi.com FDW2512NZ Dual N-Channel 2.5V Specified PowerTrench® MOSFET Test Circuits and Waveforms RLDRAIN 2 5 10 RLGATE 1 9 14.9 RLSOURCE 3 7 2.0 LDRAIN DRAIN 2 10 RLDRAIN DBREAK RSLC1 51 RSLC2 5 51 ESLC 11 RDRAIN 16 6 8 ESG EVTHRES + 19 8 + EVTEMP 9 RGATE + 18 22 20 17 18 EBREAK DBODY - 21 6 MWEAK MMED MSTRO DESD1 91 DESD2 RBREAK 17 18 RBREAKMOD 1 RDRAIN 50 16 RDRAINMOD 13.1e-3 RGATE 9 20 5.57 CA RSLC1 5 51 RSLCMOD 1e-6 RSLC2 5 50 1e3 RSOURCE 8 7 RSOURCEMOD 2e-4 RVTHRES 22 8 RVTHRESMOD 1 RVTEMP 18 19 RVTEMPMOD 1 + 50 - MMED 16 6 8 8 MMEDMOD MSTRO 16 6 8 8 MSTROMOD MWEAK 16 21 8 8 MWEAKMOD S1A S1B S2A S2B 5 DPLCAP - DBODY 5 7 DBODYMOD DBREAK 5 11 DBREAKMOD DPLCAP 10 5 DPLCAPMOD DESD1 91 9 DESD1MODE DESD2 91 7 DESD2MOD EBREAK 7 11 17 18 22.2 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 8 6 1 EVTHRES 6 21 19 8 1 EVTEMP 6 20 18 22 1 LGATE IT 8 17 1 GATE LDRAIN 2 5 1e-9 1 LGATE 1 9 1.49e-9 RLGATE LSOURCE 3 7 0.2e-9 rev July 2004 + .SUBCKT FDW2512NZ 2 1 3 ; CA 12 8 8.8e-10 CB 15 14 8.8e-10 CIN 6 8 0.5e-9 LSOURCE CIN SOURCE 3 7 8 RSOURCE RLSOURCE S1A 12 S2A S1B RBREAK 15 14 13 13 8 17 18 RVTEMP S2B 13 CB 6 8 EGS 19 VBAT 5 8 EDS - - - IT 14 + + + 8 22 RVTHRES 6 12 13 8 S1AMOD 13 12 13 8 S1BMOD 6 15 14 13 S2AMOD 13 15 14 13 S2BMOD VBAT 22 19 DC 1 ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*120),2.5))} .MODEL DBODYMOD D (IS = 7.3e-12 N=0.93 RS = 20.6e-3 IKF=0.2 TRS1 = 1.7e-3 TRS2 = 2e-6 XTI=0.2 TIKF=0.001 CJO =2.0e-10 TT=1.05e-8 M = 0.58) .MODEL DBREAKMOD D (RS = 1e-1 TRS1 = 9e-3 TRS2 = -2e-5) .MODEL DPLCAPMOD D (CJO = 0.37e-9 IS = 1e-30 N = 10 M = 0.51) MODEL DESD1MOD D (BV=14 RS=1) MODEL DESD2MOD D (BV=14 N=1.3 RS=1) .MODEL MMEDMOD NMOS (VTO = 0.96 KP = 1.98 IS=1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 5.57) .MODEL MSTROMOD NMOS (VTO = 1.2 KP = 72 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL MWEAKMOD NMOS (VTO = 0.72 KP = 0.02 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 55.7 RS = 0.1) .MODEL RBREAKMOD RES (TC1 = 6e-4 TC2 = -5e-7) .MODEL RDRAINMOD RES (TC1 = 6e-4 TC2 = 1.2e-5) .MODEL RSLCMOD RES (TC1 = 1e-9 TC2 = 1e-8) .MODEL RSOURCEMOD RES (TC1 = 8.2e-2 TC2 = 1e-6) .MODEL RVTHRESMOD RES (TC1 = -13e-4 TC2 = -2.5e-6) .MODEL RVTEMPMOD RES (TC1 = -1.0e-3 TC2 = 1e-6) .MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -5 VOFF= -1.5) .MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -1.5 VOFF= -5) .MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -0.4 VOFF= 0.4) .MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 0.4 VOFF= -0.4) ENDS Note: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley. FDW2512NZ Rev. A1 8 www.fairchildsemi.com FDW2512NZ Dual N-Channel 2.5V Specified PowerTrench® MOSFET PSPICE Electrical Model REV July 2004 template fdw2512nz n2,n1,n3 electrical n2,n1,n3 { var i iscl dp..model dbodymod = (isl = 7.3e-12, nl=0.93, rs = 20.6e-3, trs1 = 1.7e-3, trs2 = 2e-6, xti=0.2, cjo = 2.0e-10, ikf=0.2, tt = 1.05e-8, m = 0.58, tikf=0.001) dp..model dbreakmod = (rs = 1e-1, trs1 = 9e-3, trs2 = -2.0e-5) dp..model dplcapmod = (cjo = 0.37e-9, isl=10e-30, nl=10, m=0.51) dp..model desd1mod = (bv=14, rs=1) dp..model desd2mod = (bv=14, nl=1.3, rs=1) m..model mmedmod = (type=_n, vto = 0.96, kp=1.98, is=1e-30, tox=1) m..model mstrongmod = (type=_n, vto = 1.2, kp = 72, is = 1e-30, tox = 1) m..model mweakmod = (type=_n, vto = 0.72, kp = 0.02, is = 1e-30, tox = 1, rs=0.1) sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = -5, voff = -1.5) LDRAIN DPLCAP 5 sw_vcsp..model s1bmod = (ron = 1e-5, roff = 0.1, von = -1.5, voff = -5 ) DRAIN 2 sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = -0.4, voff = 0.4) 10 sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = 0.4, voff = -0.4) RLDRAIN RSLC1 51 c.ca n12 n8 = 8.8e-10 c.cb n15 n14 = 8.8e-10 c.cin n6 n8 = 0.5e-9 RSLC2 ISCL - dp.dbody n7 n5 = model=dbodymod dp.dbreak n5 n11 = model=dbreakmod dp.dplcap n10 n5 = model=dplcapmod dp.desd1 n91 n9 = model=desd1mod dp.desd2 n91 n7 = model=desd2mod RDRAIN 6 8 ESG EVTHRES + 19 8 + LGATE GATE 1 spe.ebreak n11 n7 n17 n18 = 22.2 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 spe.evthres n6 n21 n19 n8 = 1 DBREAK 50 EVTEMP RGATE + 18 22 9 20 RLGATE DESD1 91 DESD2 21 11 DBODY 16 MWEAK 6 EBREAK + 17 18 MMED MSTRO CIN - 8 LSOURCE 7 SOURCE 3 RSOURCE RLSOURCE S1A 12 S2A S1B i.it n8 n17 = 1 l.ldrain n2 n5 = 1e-9 l.lgate n1 n9 = 1.49e-9 l.lsource n3 n7 = 0.2e-9 17 18 RVTEMP S2B 13 CA 15 14 13 13 8 RBREAK CB 6 8 - - IT 14 + + EGS 19 VBAT 5 8 EDS - res.rldrain n2 n5 = 10 res.rlgate n1 n9 = 14.9 res.rlsource n3 n7 = 2.0 + 8 22 RVTHRES m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u res.rbreak n17 n18 = 1, tc1 = 6e-4, tc2 = -5e-7 res.rdrain n50 n16 = 13.1e-3, tc1 = 6e-4, tc2 = 1.2e-5 res.rgate n9 n20 = 5.57 res.rslc1 n5 n51= 1e-6, tc1 = 1e-9, tc2 =1e-8 res.rslc2 n5 n50 = 1e3 res.rsource n8 n7 = 2e-4, tc1 = 8.2e-2, tc2 =1e-6 res.rvtemp n18 n19 = 1, tc1 = -1.0e-3, tc2 = 1e-6 res.rvthres n22 n8 = 1, tc1 = -13e-4, tc2 = -2.5e-6 sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod v.vbat n22 n19 = dc=1 equations { i (n51->n50) +=iscl iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/120))** 2.5)) } } FDW2512NZ Rev. A1 9 www.fairchildsemi.com FDW2512NZ Dual N-Channel 2.5V Specified PowerTrench® MOSFET SABER Electrical Model th REV July 2004 FDW2512NZ_JA Junction Ambient Minimum copper pad area CTHERM1 Junction c2 5.7e-4 CTHERM2 c2 c3 5.72e-4 CTHERM3 c3 c4 5.8e-4 CTHERM4 c4 c5 4.7e-3 CTHERM5 c5 c6 5.1e-3 CTHERM6 c6 c7 0.02 CTHERM7 c7 c8 0.2 CTHERM8 c8 Ambient 6 RTHERM1 CTHERM1 2 RTHERM2 RTHERM1 Junction c2 0.003 RTHERM2 c2 c3 0.25 RTHERM3 c3 c4 1.0 RTHERM4 c4 c5 1.1 RTHERM5 c5 c6 7.5 RTHERM6 c6 c7 33.6 RTHERM7 c7 c8 33.7 RTHERM8 c8 Ambient 33.8 CTHERM2 3 RTHERM3 CTHERM3 4 RTHERM4 CTHERM4 5 SABER Thermal Model SABER thermal model FDW2512NZ Minimum copper pad area template thermal_model th tl thermal_c th, tl { ctherm.ctherm1 th c2 = 5.7e-4 ctherm.ctherm2 c2 c3 = 5.72e-4 ctherm.ctherm3 c3 c4 = 5.8e-4 ctherm.ctherm4 c4 c5 = 4.7e-3 ctherm.ctherm5 c5 c6 = 5.1e-3 ctherm.ctherm6 c6 c7 = 0.02 ctherm.ctherm7 c7 c8 = 0.2 ctherm.ctherm8 c8 tl = 6 RTHERM5 CTHERM5 6 RTHERM6 CTHERM6 7 RTHERM7 rtherm.rtherm1 th c2 = 0.003 rtherm.rtherm2 c2 c3 = 0.25 rtherm.rtherm3 c3 c4 = 1.0 rtherm.rtherm4 c4 c5 = 1.1 rtherm.rtherm5 c5 c6 = 7.5 rtherm.rtherm6 c6 c7 = 33.6 rtherm.rtherm7 c7 c8 = 33.7 rtherm.rtherm8 c8 tl = 33.8 } CTHERM7 8 RTHERM8 CTHERM8 tl FDW2512NZ Rev. A1 JUNCTION 10 AMBIENT www.fairchildsemi.com FDW2512NZ Dual N-Channel 2.5V Specified PowerTrench® MOSFET SPICE Thermal Model TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidianries, and is not intended to be an exhaustive list of all such trademarks. ACEx® Build it Now™ CorePLUS™ CorePOWER™ CROSSVOLT™ CTL™ Current Transfer Logic™ EcoSPARK® EfficentMax™ EZSWITCH™ * FPS™ F-PFS™ FRFET® Global Power ResourceSM Green FPS™ Green FPS™ e-Series™ GTO™ IntelliMAX™ ISOPLANAR™ MegaBuck™ MICROCOUPLER™ MicroFET™ MicroPak™ MillerDrive™ MotionMax™ Motion-SPM™ OPTOLOGIC® OPTOPLANAR® ™ ® Fairchild® Fairchild Semiconductor® FACT Quiet Series™ FACT® FAST® FastvCore™ FlashWriter® * ® PDP-SPM™ Power-SPM™ PowerTrench® Programmable Active Droop™ QFET® QS™ Quiet Series™ RapidConfigure™ Saving our world 1mW at a time™ SmartMax™ SMART START™ SPM® STEALTH™ SuperFET™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SuperMOS™ ® The Power Franchise® tm TinyBoost™ TinyBuck™ TinyLogic® TINYOPTO™ TinyPower™ TinyPWM™ TinyWire™ µSerDes™ UHC® Ultra FRFET™ UniFET™ VCX™ VisualMax™ tm * EZSWITCH™ and FlashWriter® are trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production This datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I34 FDW2512NZ Rev. A1 WWW. fairchildsemicom
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