FHP3194
4:1 High-Speed Multiplexer
Features
Description
■ 0.1dB gain flatness to 90MHz @ 2Vpp
The FHP3194 is a 4:1 analog multiplexer designed for
high-speed video applications. The output amplifier is a
high-speed current feedback amplifier that offers stellar
large signal performance of 500MHz -3dB bandwidth and
90MHz 0.1dB bandwidth. The gain of the output amplifier
is selectable through two external resistors (Rf and Rg),
allowing further design flexibility. The 2Vpp bandwidth
performance and 2200V/μs slew rate exceed the
requirements of high-definition television (HDTV) and
other multimedia applications. The output amplifier also
provides ample output current to drive multiple video loads.
■ 0.02%/0.05˚ differential gain/phase error
■ 500MHz large signal -3dB bandwidth at G = 2
■ 2200V/µs slew rate
■ 75mA output current (easily drives two video loads)
■ 70dB channel-to-channel isolation
■ 13mA supply current
■ 3.5mA supply current in disable mode
■ 2.5mA supply current in shutdown mode
■ Fully specified at ±5V supplies
■ Lead-free SOIC-14 and TSSOP-14 packages
Two address bits (A0 and A1) are used to select one of the
four inputs. The FHP3194 offers better than 70dB channel
isolation.
Applications
■ Video switchers and routers
■ Multiple input HDTV switching
The FHP3194 offers both shutdown and disable capability.
During shutdown, the FHP3194 consumes only 2.5mA
of supply current. During disable mode, only the output
amplifier is disabled, reducing output glitches and allowing
for multiplexer expansion.
■ Picture-in-picture video switch
■ Multi-channel ADC driver
Functional Block Diagram
FHP3194
SOIC/TSSOP
1
14
+Vs
GND
2
13
OUT
IN2
3
12
-VIN
GND
4
11
SD
IN3
5
10
EN
-Vs
6
9
A1
IN4
7
8
A0
LOGIC
IN1
Ordering Information
Part Number
FHP3194IM14X
FHP3194IMTC14X
Package
Pb-Free
Operating
Temperature Range
Packaging
Method
SOIC-14
TSSOP-14
Yes
Yes
-40°C to +85°C
-40°C to +85°C
Reel
Reel
Moisture sensitivity level for all parts is MSL-1.
© 2006 Fairchild Semiconductor Corporation
FHP3194 Rev. 1.0.1
www.fairchildsemi.com
FHP3194 4:1 High-Speed Multiplexer
October 2006
FHP3194 4:1 High-Speed Multiplexer
Pin Configuration
FHP3194
SOIC/TSSOP
1
14
+Vs
GND
2
13
OU T
IN2
3
12
-VIN
GND
4
11
SD
IN3
5
10
EN
-Vs
6
9
A1
IN4
7
8
A0
LOGIC
IN1
Pin Assignments
Pin#
Pin Name
1
IN1
2
GND
Description
Input, channel 1
Must be connected to ground
3
IN2
4
GND
Input, channel 2
5
IN3
Input, channel 3
6
-Vs
Negative supply
7
IN4
Input, channel 4
8
A0
Logic input A0
9
A1
Logic input A1
10
EN
Enable pin, “1” = Disable, “0” = Enable; Enabled when left floating
Shutdown pin, “1” = Shutdown, “0” = Active; Active when left floating
Must be connected to ground
11
SD
12
-VIN
Inverting Input of output amplifier
13
OUT
Output
14
+Vs
Positive supply
Truth Table
A0
A1
EN
SD
OUT
1
1
0
0
CH4
0
1
0
0
CH3
1
0
0
0
CH2
0
0
0
0
CH1
X
X
1
0
Disable
X
X
X
1
Shutdown
© 2006 Fairchild Semiconductor Corporation
FHP3194 Rev. 1.0.1
www.fairchildsemi.com
The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The
device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not
guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table defines the conditions
for actual device operation.
Parameter
Min.
Max.
Unit
0
12.6
V
-Vs -0.5V
+Vs +0.5V
V
Supply Voltage
Input Voltage Range
Reliability Information
Parameter
Min.
Typ.
Junction Temperature
Storage Temperature Range
-65
Lead Temperature (Soldering, 10s)
Max.
Unit
150
°C
150
°C
300
°C
Package Thermal Resistance
14-Lead TSSOP1
113
°C/W
14-Lead SOIC
125
°C/W
1
Notes:
1. Package thermal resistance (qJA), JDEC standard, multi-layer test boards, still air.
ESD Protection
Product
SOIC-14
TSSOP-14
3.5kV
3kV
2kV
2kV
Human Body Model (HBM)
Charged Device Model (CDM)
Recommended Operating Conditions
Parameter
Min.
Operating Temperature Range
Supply Voltage Range
© 2006 Fairchild Semiconductor Corporation
FHP3194 Rev. 1.0.1
Max.
Unit
-40
Typ.
+85
°C
5
12
V
www.fairchildsemi.com
FHP3194 4:1 High-Speed Multiplexer
Absolute Maximum Ratings
TA = 25°C, Vs = ±5V, Rf = 475Ω, RL =150Ω, G = 2; unless otherwise noted.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
Frequency Domain Response
UGBW
-3dB Bandwidth
G = +1, Rf = 1.5kΩ
VOUT = 0.2Vpp
1200
MHz
BWSS
-3dB Bandwidth
G = +2, VOUT = 0.2Vpp
800
MHz
BWLS
Full Power Bandwidth
G = +2, VOUT = 2Vpp
500
MHz
0.1dB Gain Flatness
G = +2, VOUT = 0.2Vpp
200
MHz
G = +2, VOUT = 2Vpp
90
MHz
0.1dB Gain Flatness
Time Domain Response
tR, tF
Rise and Fall Time
VOUT = 2V step; (10% to 90%)
1
ns
tS
Settling Time to 0.1%
VOUT = 2V step
15
ns
OS
Overshoot
VOUT = 0.2V step
4
%
SR
Slew Rate
4V step
2200
V/µs
Distortion / Noise Response
HD2
2nd Harmonic Distortion
2Vpp, 5MHz, worst channel
-68
dBc
HD3
3rd Harmonic Distortion
2Vpp, 5MHz, worst channel
-89
dBc
THD
Total Harmonic Distortion
2Vpp, 5MHz, worst channel
-67
dB
DG
Differential Gain
NTSC (3.58MHz), DC-coupled
0.02
%
DP
Differential Phase
NTSC (3.58MHz), DC-coupled
0.05
°
en
Input Voltage Noise
> 1MHz
7
nV/√Hz
in+
Input Current Noise (+)
> 1MHz
22
pA/Hz
in-
Input Current Noise (-)
> 1MHz
16
pA/Hz
XTALK
All Hostile Crosstalk
Channel-to-channel 5MHz/
30MHz, worst CH combination
-68/-53
dB
DC Performance
VIO
dVIO
Input Offset Voltage(1)
-9
Average Drift
1
+9
8.5
mV
µ����
V/°C
VIOM
Input Offset Voltage Matching(1)
Channel-to-channel
-5
0.8
5
mV
Ibn
Input Bias Current Non-inverting(1)
Pins 1,3,5,7
-30
4
30
µ�
A
Pin 12
-35
dIbn
Ibi
dIbni
Average Drift
25
Input Bias Current Inverting(1)
Average Drift
GM
Gain Matching
Channel-to-channel
PSRR
Power Supply Rejection Ratio
IS
Supply Current(1)
IEN
Disable Supply Current(1)
ISD
Shutdown Supply Current(1)
(1)
DC
54
13
nA���
/°C
35
µ�
A
20
nA���
/°C
0.02
%
65
dB
13
18
mA
Disable mode
3.5
6
mA
Shutdown mode
2.5
5
mA
Switching Characteristics
Switching Time 50% Logic to:
TS
VSW
Channel-to-channel
90% output (10% output
settling)(2)
IN1, IN3 = +0.5V;
IN2, IN4 = -0.5V
25
ns
99% output (1% output
settling)(2)
IN1, IN3 = +0.5V;
IN2, IN4 = -0.5V
40
ns
All inputs grounded
375
mVpp
Channel Switch. Trans. (Glitch)
Notes:
1. 100% tested at 25°C
© 2006 Fairchild Semiconductor Corporation
FHP3194 Rev. 1.0.1
www.fairchildsemi.com
FHP3194 4:1 High-Speed Multiplexer
Electrical Characteristics at ±5V
TA = 25°C, Vs = ±5V, Rf = 475Ω, RL =150Ω, and G = 2 unless otherwise noted.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
Digital Inputs
VIH
Logic-High Threshold
A0, A1, EN, and SD pins
2.0
V
VIL
Logic-Low Threshold
A0, A1, EN, and SD pins
IIH
Logic Pin Input Current High
A0, A1, EN, and SD pins
Logic input =0V
22
μA
IIL
Logic Pin Input Current Low
A0, A1, EN, and SD pins
Logic input =0V
0
μA
0.8
V
Disable Characteristics
ENISO
Disable Isolation
5MHz/30MHz, worst comb.
-76/-61
dB
SDISO
Shutdown Isolation
5MHz/30MHz, worst comb.
-76/-61
dB
CHISO
CH-to-CH Isolation
5MHz/30MHz, worst comb.
-70/-55
dB
ENTON
Turn-on time (Disable to ON)
VIN = 500mV
30
ns
ENTOFF
Turn-off time (ON to Disable)
VIN = 500mV
65
ns
SDTON
Turn-on time (Shutdown to ON)
VIN = 500mV
32
ns
SDTOFF
Turn-off time (ON to Shutdown)
VIN = 500mV
66
ns
kW
pF
(3)
Input Characteristics
RIN
Input Resistance
188
CIN
Input Capacitance
1.7
CMIR
Input Common Mode V Range
CMRR
Common Mode Rejection Ratio(1)
DC
50
±3.1
V
60
dB
±4.0
±3.8
V
V
±75
mA
±100
mA
0.1
Ω
1
kΩ
3.7
pF
Output Characteristics
RL = 2kW
VOUT
Output Voltage Swing
IOUT
Linear Output Current
RL = 150W
VIN = 0
ISC
Short-Circuit Output Current
VOUT = GND, RL = 0Ω
ROUT
Output Resistance
COUT
Output Capacitance
(1)
Enabled
Disabled
±3.2
Notes:
1. 100% tested at 25°C
2. SD and EN pins are grounded. IN1 and IN3 = +0.5V, IN2 and IN4 = -0.5V, see truth table to properly set A0 and A1 based on the channels driven. Switching time is the transition
time from 50% of A0 or A1 input value (+2.5V) to the time at which the switched channel is at 90% (or 99%) of its final value.
3. Driving one channel and looking at worst case value from remaining channels.
© 2006 Fairchild Semiconductor Corporation
FHP3194 Rev. 1.0.1
www.fairchildsemi.com
FHP3194 4:1 High-Speed Multiplexer
Electrical Characteristics at ±5V (Continued)
TA = 25°C, Vs = ±5V, Rf = 475Ω, RL =150Ω, and G = 2 unless otherwise noted.
6
0.1
3
-0.1
VS = 5V
Normalized Gain (dB)
Normalized Gain (dB)
0
G=1
RF = 1.5kΩ
0
G=2
RF = 475Ω
-3
G=5
RF = 300Ω
-6
G = 10
RF = 150Ω
-9
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
-0.8
-0.9
Vo = 0.2Vpp
-12
Vo = 2Vpp
-1
0.1
1
10
100
1000
10000
0.1
1
Frequency (MHz)
Figure 1. Non-Inverting Freq. Response
1000
0.1
0
Normalized Gain (dB)
1400
1200
1000
Rf Value
100
Figure 2. Gain Flatness vs. Frequency
1600
800
600
400
200
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
-0.8
-0.9
0
Vo = 2Vpp
-1
1
2
3
4
5
6
7
8
9
10
0.1
1
Gain (V/V)
3
2
1
0
-1
-2
-3
-4
-5
-6
-7
-8
-9
10
100
1000
Frequency (MHz)
Figure 3. Recommended Rf vs. Gain
Figure 4. Gain Flatness vs. Frequency
3
Normalized Gain (dB)
Normalized Gain (dB)
10
Frequency (MHz)
CL = 20pF
Rs = 26Ω
CL = 56pF
Rs = 13Ω
CL = 100pF
Rs = 16Ω
Vo = 0.2Vpp
0
-3
-6
-9
VOUT = 4Vpp
-12
VOUT = 2Vpp
-15
VOUT = 1Vpp
-18
0.1
1
10
100
1000
0.1
Frequency (MHz)
10
100
1000
10000
Frequency (MHz)
Figure 5. Frequency Response vs. CL
© 2006 Fairchild Semiconductor Corporation
FHP3194 Rev. 1.0.1
1
Figure 6. Frequency Response vs. VOUT
www.fairchildsemi.com
FHP3194 4:1 High-Speed Multiplexer
Typical Performance Characteristics
TA = 25°C, Vs = ±5V, Rf = 475Ω, RL =150Ω, and G = 2 unless otherwise noted.
60
Worst Channel
60
50
50
40
CMRR (dB)
PSRR (dB)
70
40
30
20
30
20
10
10
0
10k
100k
1M
10M
100M
1G
10k
100k
Frequency (Hz)
Figure 7. PSRR vs. Frequency
0
-45
-55
104
-200
10
2
HD2 (dBc)
100
Phase (deg)
Transimpedance (Ω)
Phase
Transimpedance
10
100M
1G
RL = 150Ω
Vo = 2Vpp
-50
3
10M
Figure 8. CMRR vs. Frequency
���������
106
105
1M
Frequency (Hz)
Worst CH
-60
-65
-70
Best CH
-75
-80
-300
10k
100k
1M
10M
100M
-85
1G
1
10
Frequency (Hz)
Figure 9. Open Loop Transimpedance
Gain and Phase
-60
Figure 10. HD2 vs. Frequency
-40
RL = 150Ω
Vo = 2Vpp
-65
Worst CH 50MHz
Worst CH 30MHz
-45
All Channels
-50
HD2 (dBc)
-70
HD2 (dBc)
30
Frequency (MHz)
-75
-80
-55
-60
Best CH 30MHz
-65
Worst CH 5MHz
-70
Best CH 50MHz
-75
-85
Best CH 5MHz
-80
-90
-85
-95
-90
1
10
30
1
Frequency (MHz)
2
2.5
3
3.5
4
4.5
5
VOUT (Vpp)
Figure 11. HD3 vs. Frequency
© 2006 Fairchild Semiconductor Corporation
FHP3194 Rev. 1.0.1
1.5
Figure 12. HD2 vs. VOUT
www.fairchildsemi.com
FHP3194 4:1 High-Speed Multiplexer
Typical Performance Characteristics
TA = 25°C, Vs = ±5V, Rf = 475Ω, RL =150Ω, and G = 2 unless otherwise noted.
-55
0.008
All Channels
Differential Gain (%)
0.004
HD3 (dBc)
-65
-70
0.008
AC Coupled, 220µF
30MHz
-75
-80
0
-0.004
-0.004
Gain
-0.008
-0.008
Phase
-0.012
-0.012
-0.016
-0.016
-0.020
-0.020
-90
-0.024
-0.024
-95
-0.028
5MHz
-85
1
1.5
2
2.5
3
3.5
4
4.5
5
-0.028
-0.7
-0.5
-0.3
VOUT (Vpp)
4
0.02
0.01
Gain
0
0
Differential Phase (deg)
5
0.05
0.04
0.03
Phase
0.02
0.01
0.06
0
-0.02
-0.03
-0.04
-0.04
-4
-0.05
-0.05
-5
-0.1
0.1
0.3
0.5
RL = 10kΩ
RL = 100Ω
-1
-0.02
-0.03
-0.3
0.7
1
-0.01
-0.5
0.5
RL = 150Ω
2
-0.01
-0.7
0.3
3
VOUT (V)
DC Coupled
0.03
0.1
Figure 14. Differential Gain and Phase
0.06
0.05
0.04
-0.1
Input Amplitude (V)
Figure 13. HD3 vs. VOUT
Differential Gain (%)
0.004
0
Differential Phase (deg)
-60
50MHz
RL = 75Ω
-2
-3
0.7
RL = 1kΩ
-5
-4
-3
-2
Input Amplitude (V)
-1
0
1
2
3
4
5
VIN (V)
Figure 15. Differential Gain and Phase
Figure 16. Output Swing vs. RL
2.5
1.5
2.0
1.0
1.5
0.5
Output (V)
Output (V)
Vs = 5V
1.0
0.5
0
0
-0.5
-1.0
-0.5
-1.5
0
10
20
30
40
50
60
70
80
90 100
0
Time (ns)
20
30
40
50
60
70
80
90 100
Time (ns)
Figure 17. Pulse Response
© 2006 Fairchild Semiconductor Corporation
FHP3194 Rev. 1.0.1
10
Figure 18. Pulse Response
www.fairchildsemi.com
FHP3194 4:1 High-Speed Multiplexer
Typical Performance Characteristics
TA = 25°C, Vs = ±5V, Rf = 475Ω, RL =150Ω, and G = 2 unless otherwise noted.
6
12
1.5
10
1.0
A0 Input (V)
2
2.0
0
-2
8
0.5
6
-0.5
-1.5
-2
0
20
40
60
80
100
120
140
-2.0
0
Time (ns)
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Time (ns)
Figure 19. Pulse Response
Figure 20. Channel Switching Time
0.6
6
5
0.5
5
4
0.4
4
0.4
3
0.3
3
0.3
2
0.2
2
0.2
1
0.1
A0 Input
0
0
0.6
0.5
A1 Input
1
0.1
Output
0
Output (V)
Output
A1 Input (V)
6
Output (V)
A0 Input (V)
-1.0
Output
0
-6
0
-1
-0.1
-1
-0.1
-2
-0.2
-2
-0.2
-3
-0.3
-3
0
100 200 300 400 500 600 700 800 900 1000
-0.3
0
Time (ns)
100 200 300 400 500 600 700 800 900 1000
Time (ns)
Figure 21. A0 Switching Glitch
Figure 22. A1 Switching Glitch
1.6
8
0.7
14
1.4
7
0.6
12
1.2
6
10
1.0
5
6
0.6
SD Input
0.5
SD Input
0.4
4
0.3
3
0.2
2
0.1
Output
Output (V)
0.8
8
SD Input (V)
16
Output (V)
SD Input (V)
0
A0 Input
4
2
-4
Output (V)
Output (V)
4
14
4
0.4
2
0.2
0
-0.1
0
-1
-0.2
-0.2
-2
Output
0
-2
0
100
200
300
400
500
600
700
0
-0.3
0
Time (ns)
100 200 300 400 500 600 700 800 900 1000
Time (ns)
Figure 23. Shutdown Switching Time
© 2006 Fairchild Semiconductor Corporation
FHP3194 Rev. 1.0.1
1
Figure 24. Shutdown Switching Glitch
www.fairchildsemi.com
FHP3194 4:1 High-Speed Multiplexer
Typical Performance Characteristics
TA = 25°C, Vs = ±5V, Rf = 475Ω, RL =150Ω, and G = 2 unless otherwise noted.
6
14
1.4
5
12
1.2
4
0.4
10
1.0
3
0.3
8
0.8
2
0.2
EN Input (V)
0.6
1
0.1
Output
0
0.4
2
0.2
-1
-0.1
0
-2
-0.2
-0.2
-3
Output
-2
0
100
200
300
400
500
600
-0.3
700
0
100 200 300 400 500 600 700 800 900 1000
Time (ns)
Time (ns)
Figure 25. Enable Switching Time
-40
Figure 26. Enable Switching Glitch
-20
Selected input to output
-45
Unselected input to output
Worst condition shown
-30
-50
-55
-60
Crosstalk (dB)
Off Isolation (dB)
0
4
0
SD
-65
EN
-70
-75
-80
-40
-50
-60
-70
-80
-85
-90
-90
1
10
100
1
10
Frequency (MHz)
100
1000
Frequency (MHz)
Figure 27. Off Isolation vs. Frequency
Figure 28. Crosstalk vs. Frequency
104
100
90
103
80
70
Disabled
102
60
IZi (Ω)
Input Voltage Noise (nV/√Hz)
0.5
EN Input
Output (V)
0.6
Output (V)
6
EN Input
EN Input (V)
1.6
16
50
40
101
100
30
20
10-1
Enabled
10
0
0.001
10-2
0.01
0.1
1
10
100
10k
Frequency (MHz)
1M
10M
100M
1G
Frequency (Hz)
Figure 29. Input Voltage Noise
© 2006 Fairchild Semiconductor Corporation
FHP3194 Rev. 1.0.1
100k
Figure 30. Closed-Loop Output Impedance
10
www.fairchildsemi.com
FHP3194 4:1 High-Speed Multiplexer
Typical Performance Characteristics
Circuit Diagrams
+5V
6.8µF
6dB (G = 2) Configuration
IN1
1
14
2
13
3
12
4
11
0.1µF
75Ω
IN2
75Ω
IN3
75Ω
LOGIC
75Ω
5
6.8µF
6
OUT
RF = 475Ω
SD
RT*
10
A1
9
0.1µF
-5V
EN
RT*
RT*
A0
8
7
RG = 475Ω
RT*
IN4
75Ω
*Termination resistors (RT = 50Ω) are optional.
Figure 31. Typical Application Circuit 6dB Gain (G = 2)
+5V
6.8µF
0dB (G = 1) Configuration
IN1
1
14
2
13
0.1µF
75Ω
75Ω
75Ω
75Ω
6.8µF
3
12
4
11
5
6
LOGIC
IN2
IN3
OUT
RF = 1.5k
0.1µF
10
-5V
A1
9
8
7
SD
RT*
A0
EN
RT*
RT*
RT*
IN4
75Ω
*Termination resistors (RT = 50Ω) are optional.
Figure 32. Typical Application Circuit 0dB Gain (G = 1)
© 2006 Fairchild Semiconductor Corporation
FHP3194 Rev. 1.0.1
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FHP3194 4:1 High-Speed Multiplexer
Application Information
General Description
The FHP3194 4:1 multiplexer has four analog switches
that drive the positive input of a high-speed current
feedback amplifier. It is designed so that only one channel
is on at a time. Tie unused inputs to ground.
Driving Video
Figures 31 and 32 show typical application circuits for the
FHP3194 in 6dB (G = 2) and 0dB (G = 1) configurations.
The FHP3194 is designed to drive high-speed video.
90MHz 0.1dB bandwidth at 2Vpp output, 0.02˚/0.05%
differential gain/phase, and ±75mA output current make
the FHP3194 suitable for driving standard-definition, highdefinition, or PC graphics video.
Rf and Rg Selection
Driving Video with a Single 5V Supply
The output of the FHP3194 is a current feedback amplifier.
The gain of this amplifier is set by two external resistors:
Rf and Rg. The frequency response and closed-loop
bandwidth of the current feedback amplifier are highly
dependant on the value of Rf. For a gain of two, use Rf =
475Ω. For other gains, refer to the Rf vs. GAIN plot
in Figure 3. In general, a lower Rf peaks the frequency
response and increases bandwidth, while a higher Rf will
decrease bandwidth and roll off the frequency response.
A feedback resistor is required for unity gain (G = 1); the
recommended value is 1.5kΩ.
The FHP3194 drives video signals from a single 5V supply
at G = 1 only. At higher gains, the CMIR and Vo range is
not suitable for passing video without clipping the signal.
Driving Capacitive Loads
The FREQUENCY RESPONSE VS. CL plot in Figure 5,
illustrates the response of the FHP3194. A small series
resistance (Rs) at the output of the amplifier, illustrated in
Figure 33, improves stability and settling performance. Rs
values in the FREQUENCY RESPONSE VS. CL plot were
chosen to achieve maximum bandwidth with less than 1dB
of peaking. For maximum flatness, use a larger Rs.
A0, A1
The A0 and A1 logic pins are TTL/CMOS compatible and
are used to select which of the four inputs connects to
the output. Refer to the TRUTH TABLE on page 2 for
more information. Channel 1 is selected if both pins are
left floating.
+
-
Rf
CL
RL
Rg
EN, SD
Figure 33. Typical Topology for Driving
Capacitive Loads
The FHP3194 offers both shutdown and disable capability.
The EN (enable) pin is active low. During disable mode
(EN = 1), only the output amplifier is disabled, reducing
output glitches and allowing for multiplexer expansion.
The FHP3194 is enabled when the EN pin is left floating
or grounded.
Power Dissipation
The maximum internal power dissipation allowed is
directly related to the maximum junction temperature. If
the maximum junction temperature exceeds 150˚C for an
extended time, device failure may occur. The FHP3194 is
short-circuit protected; however, this may not guarantee
that the maximum junction temperature (+150˚C) is not
exceeded under all conditions. RMS power dissipation
can be calculated using the following equation:
The SD (shutdown) pin is active high. During shutdown
(SD = 1), the FHP3194 consumes only 2.5mA of supply
current. The FHP3194 is enabled when the SD pin is left
floating or grounded.
Supply Voltage
Power Dissipation =
Is * (Vs+ - Vs-) + (Vs+ - Vo(RMS)) * IOUT(RMS)
The FHP3194 operates from a single supply of 5V to
12V or dual supplies of ±2.5V to ±6.0V. For low supply
voltage operation, ensure that the common mode input
voltage range (CMIR) or output voltage range (Vo) are not
exceeded. Exceeding the CMIR or Vo range puts the
FHP3194 into an overdrive condition. For example, the
typical CMIR for the FHP3194 is ±3.1V at ±5V supply,
which means 1.9V of headroom is required from each supply.
© 2006 Fairchild Semiconductor Corporation
FHP3194 Rev. 1.0.1
Rs
where Is is the supply current, Vs+ is the positive supply
pin voltage, Vs- is the negative supply pin voltage, Vo(RMS)
is the RMS output voltage, and IOUT(RMS) is the RMS
output current delivered to the load. Follow the maximum
power derating curves shown in Figure 34 to ensure proper
operation.
12
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FHP3194 4:1 High-Speed Multiplexer
At a single 5V supply, the CMIR becomes 1.9V to 3.1V. The
same theory can be applied to the VOUT range.
Application Information
3.5
SOIC-14
Output Pos_AV+5
2.5
1.4
Amplitude (V)
Maximum Power Dissipation (W)
4.5
1.6
1.2
TSSOP-14
1.0
0.8
0.6
1.5
-0.5
-2.5
0.2
-3.5
0
-4.5
-20
0
20
40
60
Input Neg_1Vpp
-1.5
0.4
-40
Input Pos_1Vpp
0.5
Output Neg_AV+5
0
80
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Time (µs)
Ambient Temperature (°C)
Figure 35. Overdrive Recovery
Figure 34. Maximum Power Derating
Overdrive Recovery
For an amplifier, an overdrive condition occurs when the
output and/or input ranges are exceeded. The recovery
time varies based on whether the input or output is
overdriven and by how much the ranges are exceeded.
The FHP3194 typically recovers in less than 75ns from an
overdrive condition. Figure 35 shows the FHP3194 in an
overdriven condition.
Layout Considerations
General layout and supply bypassing play major roles in
high-frequency performance. Fairchild has evaluation
boards to use as a guide for high-frequency layout and
as aid in device testing and characterization. Follow the
guidelines below as a basis for high-frequency layout:
Avoid the use of vias near the device; vias add unwanted
inductance.
If traces of greater than one inch are required, use stripline
or microstrip techniques designed with characteristic impedances of 50Ω or 75Ω that are properly terminated with
impedance-matching elements at each end.
■ Include 6.8µF and 0.1µF ceramic capacitors.
Refer to the evaluation board layouts for more information.
■ Place the 6.8µF capacitor within 0.75 inches of the
power pin.
Evaluation Board Information
The following evaluation boards are available to aid in the
testing and layout of these devices:
■ Place the 0.1µF capacitor within 0.1 inches of the
power pin.
Evaluation Board
■ Remove the ground plane under and around the part,
especially near the input and output pins and under Rf
and Rg, to reduce parasitic capacitance.
Products
KEB022
FHP3194IM14X
KEB025
FHP3194IMTC14X
■ Minimize all trace lengths to reduce series inductances.
For current feedback amplifiers, stray capacitance from the
inverting input (pin 12) to ground or to the output (pin 13)
increases peaking in the AC response. For optimum
performance, place Rf and Rg as close to the FHP3194
as possible. Small-size surface-mount resistors are
recommended.
© 2006 Fairchild Semiconductor Corporation
FHP3194 Rev. 1.0.1
13
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FHP3194 4:1 High-Speed Multiplexer
1.8
FHP3194 4:1 High-Speed Multiplexer
Figure 36. KEB022 Top-Side
Figure 38. KEB025 Top-Side
Figure 37. KEB022 Bottom-Side
Figure 39. KEB025 Bottom-Side
VCC
R1-1
75Ω
C1
6.8µF
-
+
IN1
C3
0.1µF
-
IN2
IN3
R1-3
75Ω
C2 6.8µF +
+
C4
0.1µF
+
R1-2
75Ω
OUT
ROUT
75Ω
FHP3194
1
NI1
VS+
14
2
GND1
OUT
13
3
NI2
VINV
12
4
GND2
SD
11
5
NI3
EN
10
6
VEE
A1
9
7
NI4
A0
8
RG
475Ω
SD
R5
50Ω
R1-4
A1
EN
R3
75Ω
VEE
PWR
RF
475Ω
50Ω
IN4
R2
50Ω
R4
50Ω
A0
*Choose R1-1, R1-2, R1-3, R1-4, and ROUT for proper impedance matching. R2, R3, R4, and R5 are optional.
Figure 40. FHP3194 Schematic Diagram
© 2006 Fairchild Semiconductor Corporation
FHP3194 Rev. 1.0.1
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FHP3194 4:1 High-Speed Multiplexer
Mechanical Dimensions
Figure 41. SOIC-14 Package
© 2006 Fairchild Semiconductor Corporation
FHP3194 Rev. 1.0.1
15
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FHP3194 4:1 High-Speed Multiplexer
Mechanical Dimensions
Figure 42. TSSOP-14 Package
© 2006 Fairchild Semiconductor Corporation
FHP3194 Rev. 1.0.1
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FHP3194 4:1 High-Speed Multiplexer
Rev. I20
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©2006 Fairchild Semiconductor Corporation
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